1 //===-- ARMConstantIslandPass.cpp - ARM constant islands --------*- C++ -*-===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file contains a pass that splits the constant pool up into 'islands'
11 // which are scattered through-out the function. This is required due to the
12 // limited pc-relative displacements that ARM has.
14 //===----------------------------------------------------------------------===//
16 #define DEBUG_TYPE "arm-cp-islands"
18 #include "ARMMachineFunctionInfo.h"
19 #include "ARMInstrInfo.h"
20 #include "llvm/CodeGen/MachineConstantPool.h"
21 #include "llvm/CodeGen/MachineFunctionPass.h"
22 #include "llvm/CodeGen/MachineInstrBuilder.h"
23 #include "llvm/Target/TargetData.h"
24 #include "llvm/Target/TargetMachine.h"
25 #include "llvm/Support/Compiler.h"
26 #include "llvm/Support/Debug.h"
27 #include "llvm/ADT/SmallVector.h"
28 #include "llvm/ADT/STLExtras.h"
29 #include "llvm/ADT/Statistic.h"
32 STATISTIC(NumCPEs, "Number of constpool entries");
33 STATISTIC(NumSplit, "Number of uncond branches inserted");
34 STATISTIC(NumCBrFixed, "Number of cond branches fixed");
35 STATISTIC(NumUBrFixed, "Number of uncond branches fixed");
38 /// ARMConstantIslands - Due to limited PC-relative displacements, ARM
39 /// requires constant pool entries to be scattered among the instructions
40 /// inside a function. To do this, it completely ignores the normal LLVM
41 /// constant pool; instead, it places constants wherever it feels like with
42 /// special instructions.
44 /// The terminology used in this pass includes:
45 /// Islands - Clumps of constants placed in the function.
46 /// Water - Potential places where an island could be formed.
47 /// CPE - A constant pool entry that has been placed somewhere, which
48 /// tracks a list of users.
49 class VISIBILITY_HIDDEN ARMConstantIslands : public MachineFunctionPass {
50 /// BBSizes - The size of each MachineBasicBlock in bytes of code, indexed
51 /// by MBB Number. The two-byte pads required for Thumb alignment are
52 /// counted as part of the following block (i.e., the offset and size for
53 /// a padded block will both be ==2 mod 4).
54 std::vector<unsigned> BBSizes;
56 /// BBOffsets - the offset of each MBB in bytes, starting from 0.
57 /// The two-byte pads required for Thumb alignment are counted as part of
58 /// the following block.
59 std::vector<unsigned> BBOffsets;
61 /// WaterList - A sorted list of basic blocks where islands could be placed
62 /// (i.e. blocks that don't fall through to the following block, due
63 /// to a return, unreachable, or unconditional branch).
64 std::vector<MachineBasicBlock*> WaterList;
66 /// CPUser - One user of a constant pool, keeping the machine instruction
67 /// pointer, the constant pool being referenced, and the max displacement
68 /// allowed from the instruction to the CP.
73 CPUser(MachineInstr *mi, MachineInstr *cpemi, unsigned maxdisp)
74 : MI(mi), CPEMI(cpemi), MaxDisp(maxdisp) {}
77 /// CPUsers - Keep track of all of the machine instructions that use various
78 /// constant pools and their max displacement.
79 std::vector<CPUser> CPUsers;
81 /// CPEntry - One per constant pool entry, keeping the machine instruction
82 /// pointer, the constpool index, and the number of CPUser's which
83 /// reference this entry.
88 CPEntry(MachineInstr *cpemi, unsigned cpi, unsigned rc = 0)
89 : CPEMI(cpemi), CPI(cpi), RefCount(rc) {}
92 /// CPEntries - Keep track of all of the constant pool entry machine
93 /// instructions. For each original constpool index (i.e. those that
94 /// existed upon entry to this pass), it keeps a vector of entries.
95 /// Original elements are cloned as we go along; the clones are
96 /// put in the vector of the original element, but have distinct CPIs.
97 std::vector<std::vector<CPEntry> > CPEntries;
99 /// ImmBranch - One per immediate branch, keeping the machine instruction
100 /// pointer, conditional or unconditional, the max displacement,
101 /// and (if isCond is true) the corresponding unconditional branch
105 unsigned MaxDisp : 31;
108 ImmBranch(MachineInstr *mi, unsigned maxdisp, bool cond, int ubr)
109 : MI(mi), MaxDisp(maxdisp), isCond(cond), UncondBr(ubr) {}
112 /// ImmBranches - Keep track of all the immediate branch instructions.
114 std::vector<ImmBranch> ImmBranches;
116 /// PushPopMIs - Keep track of all the Thumb push / pop instructions.
118 SmallVector<MachineInstr*, 4> PushPopMIs;
120 /// HasFarJump - True if any far jump instruction has been emitted during
121 /// the branch fix up pass.
124 const TargetInstrInfo *TII;
125 ARMFunctionInfo *AFI;
129 ARMConstantIslands() : MachineFunctionPass(&ID) {}
131 virtual bool runOnMachineFunction(MachineFunction &Fn);
133 virtual const char *getPassName() const {
134 return "ARM constant island placement and branch shortening pass";
138 void DoInitialPlacement(MachineFunction &Fn,
139 std::vector<MachineInstr*> &CPEMIs);
140 CPEntry *findConstPoolEntry(unsigned CPI, const MachineInstr *CPEMI);
141 void InitialFunctionScan(MachineFunction &Fn,
142 const std::vector<MachineInstr*> &CPEMIs);
143 MachineBasicBlock *SplitBlockBeforeInstr(MachineInstr *MI);
144 void UpdateForInsertedWaterBlock(MachineBasicBlock *NewBB);
145 void AdjustBBOffsetsAfter(MachineBasicBlock *BB, int delta);
146 bool DecrementOldEntry(unsigned CPI, MachineInstr* CPEMI);
147 int LookForExistingCPEntry(CPUser& U, unsigned UserOffset);
148 bool LookForWater(CPUser&U, unsigned UserOffset,
149 MachineBasicBlock** NewMBB);
150 MachineBasicBlock* AcceptWater(MachineBasicBlock *WaterBB,
151 std::vector<MachineBasicBlock*>::iterator IP);
152 void CreateNewWater(unsigned CPUserIndex, unsigned UserOffset,
153 MachineBasicBlock** NewMBB);
154 bool HandleConstantPoolUser(MachineFunction &Fn, unsigned CPUserIndex);
155 void RemoveDeadCPEMI(MachineInstr *CPEMI);
156 bool RemoveUnusedCPEntries();
157 bool CPEIsInRange(MachineInstr *MI, unsigned UserOffset,
158 MachineInstr *CPEMI, unsigned Disp,
160 bool WaterIsInRange(unsigned UserOffset, MachineBasicBlock *Water,
162 bool OffsetIsInRange(unsigned UserOffset, unsigned TrialOffset,
163 unsigned Disp, bool NegativeOK);
164 bool BBIsInRange(MachineInstr *MI, MachineBasicBlock *BB, unsigned Disp);
165 bool FixUpImmediateBr(MachineFunction &Fn, ImmBranch &Br);
166 bool FixUpConditionalBr(MachineFunction &Fn, ImmBranch &Br);
167 bool FixUpUnconditionalBr(MachineFunction &Fn, ImmBranch &Br);
168 bool UndoLRSpillRestore();
170 unsigned GetOffsetOf(MachineInstr *MI) const;
172 void verify(MachineFunction &Fn);
174 char ARMConstantIslands::ID = 0;
177 /// verify - check BBOffsets, BBSizes, alignment of islands
178 void ARMConstantIslands::verify(MachineFunction &Fn) {
179 assert(BBOffsets.size() == BBSizes.size());
180 for (unsigned i = 1, e = BBOffsets.size(); i != e; ++i)
181 assert(BBOffsets[i-1]+BBSizes[i-1] == BBOffsets[i]);
183 for (MachineFunction::iterator MBBI = Fn.begin(), E = Fn.end();
185 MachineBasicBlock *MBB = MBBI;
187 MBB->begin()->getOpcode() == ARM::CONSTPOOL_ENTRY)
188 assert((BBOffsets[MBB->getNumber()]%4 == 0 &&
189 BBSizes[MBB->getNumber()]%4 == 0) ||
190 (BBOffsets[MBB->getNumber()]%4 != 0 &&
191 BBSizes[MBB->getNumber()]%4 != 0));
196 /// print block size and offset information - debugging
197 void ARMConstantIslands::dumpBBs() {
198 for (unsigned J = 0, E = BBOffsets.size(); J !=E; ++J) {
199 DOUT << "block " << J << " offset " << BBOffsets[J] <<
200 " size " << BBSizes[J] << "\n";
204 /// createARMConstantIslandPass - returns an instance of the constpool
206 FunctionPass *llvm::createARMConstantIslandPass() {
207 return new ARMConstantIslands();
210 bool ARMConstantIslands::runOnMachineFunction(MachineFunction &Fn) {
211 MachineConstantPool &MCP = *Fn.getConstantPool();
213 TII = Fn.getTarget().getInstrInfo();
214 AFI = Fn.getInfo<ARMFunctionInfo>();
215 isThumb = AFI->isThumbFunction();
219 // Renumber all of the machine basic blocks in the function, guaranteeing that
220 // the numbers agree with the position of the block in the function.
223 /// Thumb functions containing constant pools get 2-byte alignment. This is so
224 /// we can keep exact track of where the alignment padding goes. Set default.
225 AFI->setAlign(isThumb ? 1U : 2U);
227 // Perform the initial placement of the constant pool entries. To start with,
228 // we put them all at the end of the function.
229 std::vector<MachineInstr*> CPEMIs;
230 if (!MCP.isEmpty()) {
231 DoInitialPlacement(Fn, CPEMIs);
236 /// The next UID to take is the first unused one.
237 AFI->initConstPoolEntryUId(CPEMIs.size());
239 // Do the initial scan of the function, building up information about the
240 // sizes of each block, the location of all the water, and finding all of the
241 // constant pool users.
242 InitialFunctionScan(Fn, CPEMIs);
245 /// Remove dead constant pool entries.
246 RemoveUnusedCPEntries();
248 // Iteratively place constant pool entries and fix up branches until there
250 bool MadeChange = false;
253 for (unsigned i = 0, e = CPUsers.size(); i != e; ++i)
254 Change |= HandleConstantPoolUser(Fn, i);
256 for (unsigned i = 0, e = ImmBranches.size(); i != e; ++i)
257 Change |= FixUpImmediateBr(Fn, ImmBranches[i]);
264 // After a while, this might be made debug-only, but it is not expensive.
267 // If LR has been forced spilled and no far jumps (i.e. BL) has been issued.
268 // Undo the spill / restore of LR if possible.
269 if (!HasFarJump && AFI->isLRSpilledForFarJump() && isThumb)
270 MadeChange |= UndoLRSpillRestore();
283 /// DoInitialPlacement - Perform the initial placement of the constant pool
284 /// entries. To start with, we put them all at the end of the function.
285 void ARMConstantIslands::DoInitialPlacement(MachineFunction &Fn,
286 std::vector<MachineInstr*> &CPEMIs){
287 // Create the basic block to hold the CPE's.
288 MachineBasicBlock *BB = Fn.CreateMachineBasicBlock();
291 // Add all of the constants from the constant pool to the end block, use an
292 // identity mapping of CPI's to CPE's.
293 const std::vector<MachineConstantPoolEntry> &CPs =
294 Fn.getConstantPool()->getConstants();
296 const TargetData &TD = *Fn.getTarget().getTargetData();
297 for (unsigned i = 0, e = CPs.size(); i != e; ++i) {
298 unsigned Size = TD.getTypePaddedSize(CPs[i].getType());
299 // Verify that all constant pool entries are a multiple of 4 bytes. If not,
300 // we would have to pad them out or something so that instructions stay
302 assert((Size & 3) == 0 && "CP Entry not multiple of 4 bytes!");
303 MachineInstr *CPEMI =
304 BuildMI(BB, TII->get(ARM::CONSTPOOL_ENTRY))
305 .addImm(i).addConstantPoolIndex(i).addImm(Size);
306 CPEMIs.push_back(CPEMI);
308 // Add a new CPEntry, but no corresponding CPUser yet.
309 std::vector<CPEntry> CPEs;
310 CPEs.push_back(CPEntry(CPEMI, i));
311 CPEntries.push_back(CPEs);
313 DOUT << "Moved CPI#" << i << " to end of function as #" << i << "\n";
317 /// BBHasFallthrough - Return true if the specified basic block can fallthrough
318 /// into the block immediately after it.
319 static bool BBHasFallthrough(MachineBasicBlock *MBB) {
320 // Get the next machine basic block in the function.
321 MachineFunction::iterator MBBI = MBB;
322 if (next(MBBI) == MBB->getParent()->end()) // Can't fall off end of function.
325 MachineBasicBlock *NextBB = next(MBBI);
326 for (MachineBasicBlock::succ_iterator I = MBB->succ_begin(),
327 E = MBB->succ_end(); I != E; ++I)
334 /// findConstPoolEntry - Given the constpool index and CONSTPOOL_ENTRY MI,
335 /// look up the corresponding CPEntry.
336 ARMConstantIslands::CPEntry
337 *ARMConstantIslands::findConstPoolEntry(unsigned CPI,
338 const MachineInstr *CPEMI) {
339 std::vector<CPEntry> &CPEs = CPEntries[CPI];
340 // Number of entries per constpool index should be small, just do a
342 for (unsigned i = 0, e = CPEs.size(); i != e; ++i) {
343 if (CPEs[i].CPEMI == CPEMI)
349 /// InitialFunctionScan - Do the initial scan of the function, building up
350 /// information about the sizes of each block, the location of all the water,
351 /// and finding all of the constant pool users.
352 void ARMConstantIslands::InitialFunctionScan(MachineFunction &Fn,
353 const std::vector<MachineInstr*> &CPEMIs) {
355 for (MachineFunction::iterator MBBI = Fn.begin(), E = Fn.end();
357 MachineBasicBlock &MBB = *MBBI;
359 // If this block doesn't fall through into the next MBB, then this is
360 // 'water' that a constant pool island could be placed.
361 if (!BBHasFallthrough(&MBB))
362 WaterList.push_back(&MBB);
364 unsigned MBBSize = 0;
365 for (MachineBasicBlock::iterator I = MBB.begin(), E = MBB.end();
367 // Add instruction size to MBBSize.
368 MBBSize += TII->GetInstSizeInBytes(I);
370 int Opc = I->getOpcode();
371 if (I->getDesc().isBranch()) {
378 // A Thumb table jump may involve padding; for the offsets to
379 // be right, functions containing these must be 4-byte aligned.
381 if ((Offset+MBBSize)%4 != 0)
382 MBBSize += 2; // padding
383 continue; // Does not get an entry in ImmBranches
385 continue; // Ignore other JT branches
406 // Record this immediate branch.
407 unsigned MaxOffs = ((1 << (Bits-1))-1) * Scale;
408 ImmBranches.push_back(ImmBranch(I, MaxOffs, isCond, UOpc));
411 if (Opc == ARM::tPUSH || Opc == ARM::tPOP_RET)
412 PushPopMIs.push_back(I);
414 // Scan the instructions for constant pool operands.
415 for (unsigned op = 0, e = I->getNumOperands(); op != e; ++op)
416 if (I->getOperand(op).isCPI()) {
417 // We found one. The addressing mode tells us the max displacement
418 // from the PC that this instruction permits.
420 // Basic size info comes from the TSFlags field.
423 unsigned TSFlags = I->getDesc().TSFlags;
424 switch (TSFlags & ARMII::AddrModeMask) {
426 // Constant pool entries can reach anything.
427 if (I->getOpcode() == ARM::CONSTPOOL_ENTRY)
429 if (I->getOpcode() == ARM::tLEApcrel) {
430 Bits = 8; // Taking the address of a CP entry.
433 assert(0 && "Unknown addressing mode for CP reference!");
434 case ARMII::AddrMode1: // AM1: 8 bits << 2
436 Scale = 4; // Taking the address of a CP entry.
438 case ARMII::AddrMode2:
439 Bits = 12; // +-offset_12
441 case ARMII::AddrMode3:
442 Bits = 8; // +-offset_8
444 // addrmode4 has no immediate offset.
445 case ARMII::AddrMode5:
447 Scale = 4; // +-(offset_8*4)
449 case ARMII::AddrModeT1:
450 Bits = 5; // +offset_5
452 case ARMII::AddrModeT2:
454 Scale = 2; // +(offset_5*2)
456 case ARMII::AddrModeT4:
458 Scale = 4; // +(offset_5*4)
460 case ARMII::AddrModeTs:
462 Scale = 4; // +(offset_8*4)
466 // Remember that this is a user of a CP entry.
467 unsigned CPI = I->getOperand(op).getIndex();
468 MachineInstr *CPEMI = CPEMIs[CPI];
469 unsigned MaxOffs = ((1 << Bits)-1) * Scale;
470 CPUsers.push_back(CPUser(I, CPEMI, MaxOffs));
472 // Increment corresponding CPEntry reference count.
473 CPEntry *CPE = findConstPoolEntry(CPI, CPEMI);
474 assert(CPE && "Cannot find a corresponding CPEntry!");
477 // Instructions can only use one CP entry, don't bother scanning the
478 // rest of the operands.
483 // In thumb mode, if this block is a constpool island, we may need padding
484 // so it's aligned on 4 byte boundary.
487 MBB.begin()->getOpcode() == ARM::CONSTPOOL_ENTRY &&
491 BBSizes.push_back(MBBSize);
492 BBOffsets.push_back(Offset);
497 /// GetOffsetOf - Return the current offset of the specified machine instruction
498 /// from the start of the function. This offset changes as stuff is moved
499 /// around inside the function.
500 unsigned ARMConstantIslands::GetOffsetOf(MachineInstr *MI) const {
501 MachineBasicBlock *MBB = MI->getParent();
503 // The offset is composed of two things: the sum of the sizes of all MBB's
504 // before this instruction's block, and the offset from the start of the block
506 unsigned Offset = BBOffsets[MBB->getNumber()];
508 // If we're looking for a CONSTPOOL_ENTRY in Thumb, see if this block has
509 // alignment padding, and compensate if so.
511 MI->getOpcode() == ARM::CONSTPOOL_ENTRY &&
515 // Sum instructions before MI in MBB.
516 for (MachineBasicBlock::iterator I = MBB->begin(); ; ++I) {
517 assert(I != MBB->end() && "Didn't find MI in its own basic block?");
518 if (&*I == MI) return Offset;
519 Offset += TII->GetInstSizeInBytes(I);
523 /// CompareMBBNumbers - Little predicate function to sort the WaterList by MBB
525 static bool CompareMBBNumbers(const MachineBasicBlock *LHS,
526 const MachineBasicBlock *RHS) {
527 return LHS->getNumber() < RHS->getNumber();
530 /// UpdateForInsertedWaterBlock - When a block is newly inserted into the
531 /// machine function, it upsets all of the block numbers. Renumber the blocks
532 /// and update the arrays that parallel this numbering.
533 void ARMConstantIslands::UpdateForInsertedWaterBlock(MachineBasicBlock *NewBB) {
534 // Renumber the MBB's to keep them consequtive.
535 NewBB->getParent()->RenumberBlocks(NewBB);
537 // Insert a size into BBSizes to align it properly with the (newly
538 // renumbered) block numbers.
539 BBSizes.insert(BBSizes.begin()+NewBB->getNumber(), 0);
541 // Likewise for BBOffsets.
542 BBOffsets.insert(BBOffsets.begin()+NewBB->getNumber(), 0);
544 // Next, update WaterList. Specifically, we need to add NewMBB as having
545 // available water after it.
546 std::vector<MachineBasicBlock*>::iterator IP =
547 std::lower_bound(WaterList.begin(), WaterList.end(), NewBB,
549 WaterList.insert(IP, NewBB);
553 /// Split the basic block containing MI into two blocks, which are joined by
554 /// an unconditional branch. Update datastructures and renumber blocks to
555 /// account for this change and returns the newly created block.
556 MachineBasicBlock *ARMConstantIslands::SplitBlockBeforeInstr(MachineInstr *MI) {
557 MachineBasicBlock *OrigBB = MI->getParent();
558 MachineFunction &MF = *OrigBB->getParent();
560 // Create a new MBB for the code after the OrigBB.
561 MachineBasicBlock *NewBB = MF.CreateMachineBasicBlock(OrigBB->getBasicBlock());
562 MachineFunction::iterator MBBI = OrigBB; ++MBBI;
563 MF.insert(MBBI, NewBB);
565 // Splice the instructions starting with MI over to NewBB.
566 NewBB->splice(NewBB->end(), OrigBB, MI, OrigBB->end());
568 // Add an unconditional branch from OrigBB to NewBB.
569 // Note the new unconditional branch is not being recorded.
570 BuildMI(OrigBB, TII->get(isThumb ? ARM::tB : ARM::B)).addMBB(NewBB);
573 // Update the CFG. All succs of OrigBB are now succs of NewBB.
574 while (!OrigBB->succ_empty()) {
575 MachineBasicBlock *Succ = *OrigBB->succ_begin();
576 OrigBB->removeSuccessor(Succ);
577 NewBB->addSuccessor(Succ);
579 // This pass should be run after register allocation, so there should be no
580 // PHI nodes to update.
581 assert((Succ->empty() || Succ->begin()->getOpcode() != TargetInstrInfo::PHI)
582 && "PHI nodes should be eliminated by now!");
585 // OrigBB branches to NewBB.
586 OrigBB->addSuccessor(NewBB);
588 // Update internal data structures to account for the newly inserted MBB.
589 // This is almost the same as UpdateForInsertedWaterBlock, except that
590 // the Water goes after OrigBB, not NewBB.
591 MF.RenumberBlocks(NewBB);
593 // Insert a size into BBSizes to align it properly with the (newly
594 // renumbered) block numbers.
595 BBSizes.insert(BBSizes.begin()+NewBB->getNumber(), 0);
597 // Likewise for BBOffsets.
598 BBOffsets.insert(BBOffsets.begin()+NewBB->getNumber(), 0);
600 // Next, update WaterList. Specifically, we need to add OrigMBB as having
601 // available water after it (but not if it's already there, which happens
602 // when splitting before a conditional branch that is followed by an
603 // unconditional branch - in that case we want to insert NewBB).
604 std::vector<MachineBasicBlock*>::iterator IP =
605 std::lower_bound(WaterList.begin(), WaterList.end(), OrigBB,
607 MachineBasicBlock* WaterBB = *IP;
608 if (WaterBB == OrigBB)
609 WaterList.insert(next(IP), NewBB);
611 WaterList.insert(IP, OrigBB);
613 // Figure out how large the first NewMBB is. (It cannot
614 // contain a constpool_entry or tablejump.)
615 unsigned NewBBSize = 0;
616 for (MachineBasicBlock::iterator I = NewBB->begin(), E = NewBB->end();
618 NewBBSize += TII->GetInstSizeInBytes(I);
620 unsigned OrigBBI = OrigBB->getNumber();
621 unsigned NewBBI = NewBB->getNumber();
622 // Set the size of NewBB in BBSizes.
623 BBSizes[NewBBI] = NewBBSize;
625 // We removed instructions from UserMBB, subtract that off from its size.
626 // Add 2 or 4 to the block to count the unconditional branch we added to it.
627 unsigned delta = isThumb ? 2 : 4;
628 BBSizes[OrigBBI] -= NewBBSize - delta;
630 // ...and adjust BBOffsets for NewBB accordingly.
631 BBOffsets[NewBBI] = BBOffsets[OrigBBI] + BBSizes[OrigBBI];
633 // All BBOffsets following these blocks must be modified.
634 AdjustBBOffsetsAfter(NewBB, delta);
639 /// OffsetIsInRange - Checks whether UserOffset (the location of a constant pool
640 /// reference) is within MaxDisp of TrialOffset (a proposed location of a
641 /// constant pool entry).
642 bool ARMConstantIslands::OffsetIsInRange(unsigned UserOffset,
643 unsigned TrialOffset, unsigned MaxDisp, bool NegativeOK) {
644 // On Thumb offsets==2 mod 4 are rounded down by the hardware for
645 // purposes of the displacement computation; compensate for that here.
646 // Effectively, the valid range of displacements is 2 bytes smaller for such
648 if (isThumb && UserOffset%4 !=0)
650 // CPEs will be rounded up to a multiple of 4.
651 if (isThumb && TrialOffset%4 != 0)
654 if (UserOffset <= TrialOffset) {
655 // User before the Trial.
656 if (TrialOffset-UserOffset <= MaxDisp)
658 } else if (NegativeOK) {
659 if (UserOffset-TrialOffset <= MaxDisp)
665 /// WaterIsInRange - Returns true if a CPE placed after the specified
666 /// Water (a basic block) will be in range for the specific MI.
668 bool ARMConstantIslands::WaterIsInRange(unsigned UserOffset,
669 MachineBasicBlock* Water, CPUser &U)
671 unsigned MaxDisp = U.MaxDisp;
672 MachineFunction::iterator I = next(MachineFunction::iterator(Water));
673 unsigned CPEOffset = BBOffsets[Water->getNumber()] +
674 BBSizes[Water->getNumber()];
676 // If the CPE is to be inserted before the instruction, that will raise
677 // the offset of the instruction. (Currently applies only to ARM, so
678 // no alignment compensation attempted here.)
679 if (CPEOffset < UserOffset)
680 UserOffset += U.CPEMI->getOperand(2).getImm();
682 return OffsetIsInRange (UserOffset, CPEOffset, MaxDisp, !isThumb);
685 /// CPEIsInRange - Returns true if the distance between specific MI and
686 /// specific ConstPool entry instruction can fit in MI's displacement field.
687 bool ARMConstantIslands::CPEIsInRange(MachineInstr *MI, unsigned UserOffset,
689 unsigned MaxDisp, bool DoDump) {
690 unsigned CPEOffset = GetOffsetOf(CPEMI);
691 assert(CPEOffset%4 == 0 && "Misaligned CPE");
694 DOUT << "User of CPE#" << CPEMI->getOperand(0).getImm()
695 << " max delta=" << MaxDisp
696 << " insn address=" << UserOffset
697 << " CPE address=" << CPEOffset
698 << " offset=" << int(CPEOffset-UserOffset) << "\t" << *MI;
701 return OffsetIsInRange(UserOffset, CPEOffset, MaxDisp, !isThumb);
705 /// BBIsJumpedOver - Return true of the specified basic block's only predecessor
706 /// unconditionally branches to its only successor.
707 static bool BBIsJumpedOver(MachineBasicBlock *MBB) {
708 if (MBB->pred_size() != 1 || MBB->succ_size() != 1)
711 MachineBasicBlock *Succ = *MBB->succ_begin();
712 MachineBasicBlock *Pred = *MBB->pred_begin();
713 MachineInstr *PredMI = &Pred->back();
714 if (PredMI->getOpcode() == ARM::B || PredMI->getOpcode() == ARM::tB)
715 return PredMI->getOperand(0).getMBB() == Succ;
720 void ARMConstantIslands::AdjustBBOffsetsAfter(MachineBasicBlock *BB,
722 MachineFunction::iterator MBBI = BB; MBBI = next(MBBI);
723 for(unsigned i=BB->getNumber()+1; i<BB->getParent()->getNumBlockIDs(); i++) {
724 BBOffsets[i] += delta;
725 // If some existing blocks have padding, adjust the padding as needed, a
726 // bit tricky. delta can be negative so don't use % on that.
728 MachineBasicBlock *MBB = MBBI;
730 // Constant pool entries require padding.
731 if (MBB->begin()->getOpcode() == ARM::CONSTPOOL_ENTRY) {
732 unsigned oldOffset = BBOffsets[i] - delta;
733 if (oldOffset%4==0 && BBOffsets[i]%4!=0) {
737 } else if (oldOffset%4!=0 && BBOffsets[i]%4==0) {
738 // remove existing padding
743 // Thumb jump tables require padding. They should be at the end;
744 // following unconditional branches are removed by AnalyzeBranch.
745 MachineInstr *ThumbJTMI = NULL;
746 if (prior(MBB->end())->getOpcode() == ARM::tBR_JTr)
747 ThumbJTMI = prior(MBB->end());
749 unsigned newMIOffset = GetOffsetOf(ThumbJTMI);
750 unsigned oldMIOffset = newMIOffset - delta;
751 if (oldMIOffset%4 == 0 && newMIOffset%4 != 0) {
752 // remove existing padding
755 } else if (oldMIOffset%4 != 0 && newMIOffset%4 == 0) {
769 /// DecrementOldEntry - find the constant pool entry with index CPI
770 /// and instruction CPEMI, and decrement its refcount. If the refcount
771 /// becomes 0 remove the entry and instruction. Returns true if we removed
772 /// the entry, false if we didn't.
774 bool ARMConstantIslands::DecrementOldEntry(unsigned CPI, MachineInstr *CPEMI) {
775 // Find the old entry. Eliminate it if it is no longer used.
776 CPEntry *CPE = findConstPoolEntry(CPI, CPEMI);
777 assert(CPE && "Unexpected!");
778 if (--CPE->RefCount == 0) {
779 RemoveDeadCPEMI(CPEMI);
787 /// LookForCPEntryInRange - see if the currently referenced CPE is in range;
788 /// if not, see if an in-range clone of the CPE is in range, and if so,
789 /// change the data structures so the user references the clone. Returns:
790 /// 0 = no existing entry found
791 /// 1 = entry found, and there were no code insertions or deletions
792 /// 2 = entry found, and there were code insertions or deletions
793 int ARMConstantIslands::LookForExistingCPEntry(CPUser& U, unsigned UserOffset)
795 MachineInstr *UserMI = U.MI;
796 MachineInstr *CPEMI = U.CPEMI;
798 // Check to see if the CPE is already in-range.
799 if (CPEIsInRange(UserMI, UserOffset, CPEMI, U.MaxDisp, true)) {
800 DOUT << "In range\n";
804 // No. Look for previously created clones of the CPE that are in range.
805 unsigned CPI = CPEMI->getOperand(1).getIndex();
806 std::vector<CPEntry> &CPEs = CPEntries[CPI];
807 for (unsigned i = 0, e = CPEs.size(); i != e; ++i) {
808 // We already tried this one
809 if (CPEs[i].CPEMI == CPEMI)
811 // Removing CPEs can leave empty entries, skip
812 if (CPEs[i].CPEMI == NULL)
814 if (CPEIsInRange(UserMI, UserOffset, CPEs[i].CPEMI, U.MaxDisp, false)) {
815 DOUT << "Replacing CPE#" << CPI << " with CPE#" << CPEs[i].CPI << "\n";
816 // Point the CPUser node to the replacement
817 U.CPEMI = CPEs[i].CPEMI;
818 // Change the CPI in the instruction operand to refer to the clone.
819 for (unsigned j = 0, e = UserMI->getNumOperands(); j != e; ++j)
820 if (UserMI->getOperand(j).isCPI()) {
821 UserMI->getOperand(j).setIndex(CPEs[i].CPI);
824 // Adjust the refcount of the clone...
826 // ...and the original. If we didn't remove the old entry, none of the
827 // addresses changed, so we don't need another pass.
828 return DecrementOldEntry(CPI, CPEMI) ? 2 : 1;
834 /// getUnconditionalBrDisp - Returns the maximum displacement that can fit in
835 /// the specific unconditional branch instruction.
836 static inline unsigned getUnconditionalBrDisp(int Opc) {
837 return (Opc == ARM::tB) ? ((1<<10)-1)*2 : ((1<<23)-1)*4;
840 /// AcceptWater - Small amount of common code factored out of the following.
842 MachineBasicBlock* ARMConstantIslands::AcceptWater(MachineBasicBlock *WaterBB,
843 std::vector<MachineBasicBlock*>::iterator IP) {
844 DOUT << "found water in range\n";
845 // Remove the original WaterList entry; we want subsequent
846 // insertions in this vicinity to go after the one we're
847 // about to insert. This considerably reduces the number
848 // of times we have to move the same CPE more than once.
850 // CPE goes before following block (NewMBB).
851 return next(MachineFunction::iterator(WaterBB));
854 /// LookForWater - look for an existing entry in the WaterList in which
855 /// we can place the CPE referenced from U so it's within range of U's MI.
856 /// Returns true if found, false if not. If it returns true, *NewMBB
857 /// is set to the WaterList entry.
858 /// For ARM, we prefer the water that's farthest away. For Thumb, prefer
859 /// water that will not introduce padding to water that will; within each
860 /// group, prefer the water that's farthest away.
862 bool ARMConstantIslands::LookForWater(CPUser &U, unsigned UserOffset,
863 MachineBasicBlock** NewMBB) {
864 std::vector<MachineBasicBlock*>::iterator IPThatWouldPad;
865 MachineBasicBlock* WaterBBThatWouldPad = NULL;
866 if (!WaterList.empty()) {
867 for (std::vector<MachineBasicBlock*>::iterator IP = prior(WaterList.end()),
868 B = WaterList.begin();; --IP) {
869 MachineBasicBlock* WaterBB = *IP;
870 if (WaterIsInRange(UserOffset, WaterBB, U)) {
872 (BBOffsets[WaterBB->getNumber()] +
873 BBSizes[WaterBB->getNumber()])%4 != 0) {
874 // This is valid Water, but would introduce padding. Remember
875 // it in case we don't find any Water that doesn't do this.
876 if (!WaterBBThatWouldPad) {
877 WaterBBThatWouldPad = WaterBB;
881 *NewMBB = AcceptWater(WaterBB, IP);
889 if (isThumb && WaterBBThatWouldPad) {
890 *NewMBB = AcceptWater(WaterBBThatWouldPad, IPThatWouldPad);
896 /// CreateNewWater - No existing WaterList entry will work for
897 /// CPUsers[CPUserIndex], so create a place to put the CPE. The end of the
898 /// block is used if in range, and the conditional branch munged so control
899 /// flow is correct. Otherwise the block is split to create a hole with an
900 /// unconditional branch around it. In either case *NewMBB is set to a
901 /// block following which the new island can be inserted (the WaterList
902 /// is not adjusted).
904 void ARMConstantIslands::CreateNewWater(unsigned CPUserIndex,
905 unsigned UserOffset, MachineBasicBlock** NewMBB) {
906 CPUser &U = CPUsers[CPUserIndex];
907 MachineInstr *UserMI = U.MI;
908 MachineInstr *CPEMI = U.CPEMI;
909 MachineBasicBlock *UserMBB = UserMI->getParent();
910 unsigned OffsetOfNextBlock = BBOffsets[UserMBB->getNumber()] +
911 BBSizes[UserMBB->getNumber()];
912 assert(OffsetOfNextBlock== BBOffsets[UserMBB->getNumber()+1]);
914 // If the use is at the end of the block, or the end of the block
915 // is within range, make new water there. (The addition below is
916 // for the unconditional branch we will be adding: 4 bytes on ARM,
917 // 2 on Thumb. Possible Thumb alignment padding is allowed for
918 // inside OffsetIsInRange.
919 // If the block ends in an unconditional branch already, it is water,
920 // and is known to be out of range, so we'll always be adding a branch.)
921 if (&UserMBB->back() == UserMI ||
922 OffsetIsInRange(UserOffset, OffsetOfNextBlock + (isThumb ? 2: 4),
923 U.MaxDisp, !isThumb)) {
924 DOUT << "Split at end of block\n";
925 if (&UserMBB->back() == UserMI)
926 assert(BBHasFallthrough(UserMBB) && "Expected a fallthrough BB!");
927 *NewMBB = next(MachineFunction::iterator(UserMBB));
928 // Add an unconditional branch from UserMBB to fallthrough block.
929 // Record it for branch lengthening; this new branch will not get out of
930 // range, but if the preceding conditional branch is out of range, the
931 // targets will be exchanged, and the altered branch may be out of
932 // range, so the machinery has to know about it.
933 int UncondBr = isThumb ? ARM::tB : ARM::B;
934 BuildMI(UserMBB, TII->get(UncondBr)).addMBB(*NewMBB);
935 unsigned MaxDisp = getUnconditionalBrDisp(UncondBr);
936 ImmBranches.push_back(ImmBranch(&UserMBB->back(),
937 MaxDisp, false, UncondBr));
938 int delta = isThumb ? 2 : 4;
939 BBSizes[UserMBB->getNumber()] += delta;
940 AdjustBBOffsetsAfter(UserMBB, delta);
942 // What a big block. Find a place within the block to split it.
943 // This is a little tricky on Thumb since instructions are 2 bytes
944 // and constant pool entries are 4 bytes: if instruction I references
945 // island CPE, and instruction I+1 references CPE', it will
946 // not work well to put CPE as far forward as possible, since then
947 // CPE' cannot immediately follow it (that location is 2 bytes
948 // farther away from I+1 than CPE was from I) and we'd need to create
949 // a new island. So, we make a first guess, then walk through the
950 // instructions between the one currently being looked at and the
951 // possible insertion point, and make sure any other instructions
952 // that reference CPEs will be able to use the same island area;
953 // if not, we back up the insertion point.
955 // The 4 in the following is for the unconditional branch we'll be
956 // inserting (allows for long branch on Thumb). Alignment of the
957 // island is handled inside OffsetIsInRange.
958 unsigned BaseInsertOffset = UserOffset + U.MaxDisp -4;
959 // This could point off the end of the block if we've already got
960 // constant pool entries following this block; only the last one is
961 // in the water list. Back past any possible branches (allow for a
962 // conditional and a maximally long unconditional).
963 if (BaseInsertOffset >= BBOffsets[UserMBB->getNumber()+1])
964 BaseInsertOffset = BBOffsets[UserMBB->getNumber()+1] -
966 unsigned EndInsertOffset = BaseInsertOffset +
967 CPEMI->getOperand(2).getImm();
968 MachineBasicBlock::iterator MI = UserMI;
970 unsigned CPUIndex = CPUserIndex+1;
971 for (unsigned Offset = UserOffset+TII->GetInstSizeInBytes(UserMI);
972 Offset < BaseInsertOffset;
973 Offset += TII->GetInstSizeInBytes(MI),
975 if (CPUIndex < CPUsers.size() && CPUsers[CPUIndex].MI == MI) {
976 if (!OffsetIsInRange(Offset, EndInsertOffset,
977 CPUsers[CPUIndex].MaxDisp, !isThumb)) {
978 BaseInsertOffset -= (isThumb ? 2 : 4);
979 EndInsertOffset -= (isThumb ? 2 : 4);
981 // This is overly conservative, as we don't account for CPEMIs
982 // being reused within the block, but it doesn't matter much.
983 EndInsertOffset += CPUsers[CPUIndex].CPEMI->getOperand(2).getImm();
987 DOUT << "Split in middle of big block\n";
988 *NewMBB = SplitBlockBeforeInstr(prior(MI));
992 /// HandleConstantPoolUser - Analyze the specified user, checking to see if it
993 /// is out-of-range. If so, pick it up the constant pool value and move it some
994 /// place in-range. Return true if we changed any addresses (thus must run
995 /// another pass of branch lengthening), false otherwise.
996 bool ARMConstantIslands::HandleConstantPoolUser(MachineFunction &Fn,
997 unsigned CPUserIndex){
998 CPUser &U = CPUsers[CPUserIndex];
999 MachineInstr *UserMI = U.MI;
1000 MachineInstr *CPEMI = U.CPEMI;
1001 unsigned CPI = CPEMI->getOperand(1).getIndex();
1002 unsigned Size = CPEMI->getOperand(2).getImm();
1003 MachineBasicBlock *NewMBB;
1004 // Compute this only once, it's expensive. The 4 or 8 is the value the
1005 // hardware keeps in the PC (2 insns ahead of the reference).
1006 unsigned UserOffset = GetOffsetOf(UserMI) + (isThumb ? 4 : 8);
1008 // Special case: tLEApcrel are two instructions MI's. The actual user is the
1009 // second instruction.
1010 if (UserMI->getOpcode() == ARM::tLEApcrel)
1013 // See if the current entry is within range, or there is a clone of it
1015 int result = LookForExistingCPEntry(U, UserOffset);
1016 if (result==1) return false;
1017 else if (result==2) return true;
1019 // No existing clone of this CPE is within range.
1020 // We will be generating a new clone. Get a UID for it.
1021 unsigned ID = AFI->createConstPoolEntryUId();
1023 // Look for water where we can place this CPE. We look for the farthest one
1024 // away that will work. Forward references only for now (although later
1025 // we might find some that are backwards).
1027 if (!LookForWater(U, UserOffset, &NewMBB)) {
1029 DOUT << "No water found\n";
1030 CreateNewWater(CPUserIndex, UserOffset, &NewMBB);
1033 // Okay, we know we can put an island before NewMBB now, do it!
1034 MachineBasicBlock *NewIsland = Fn.CreateMachineBasicBlock();
1035 Fn.insert(NewMBB, NewIsland);
1037 // Update internal data structures to account for the newly inserted MBB.
1038 UpdateForInsertedWaterBlock(NewIsland);
1040 // Decrement the old entry, and remove it if refcount becomes 0.
1041 DecrementOldEntry(CPI, CPEMI);
1043 // Now that we have an island to add the CPE to, clone the original CPE and
1044 // add it to the island.
1045 U.CPEMI = BuildMI(NewIsland, TII->get(ARM::CONSTPOOL_ENTRY))
1046 .addImm(ID).addConstantPoolIndex(CPI).addImm(Size);
1047 CPEntries[CPI].push_back(CPEntry(U.CPEMI, ID, 1));
1050 BBOffsets[NewIsland->getNumber()] = BBOffsets[NewMBB->getNumber()];
1051 // Compensate for .align 2 in thumb mode.
1052 if (isThumb && BBOffsets[NewIsland->getNumber()]%4 != 0)
1054 // Increase the size of the island block to account for the new entry.
1055 BBSizes[NewIsland->getNumber()] += Size;
1056 AdjustBBOffsetsAfter(NewIsland, Size);
1058 // Finally, change the CPI in the instruction operand to be ID.
1059 for (unsigned i = 0, e = UserMI->getNumOperands(); i != e; ++i)
1060 if (UserMI->getOperand(i).isCPI()) {
1061 UserMI->getOperand(i).setIndex(ID);
1065 DOUT << " Moved CPE to #" << ID << " CPI=" << CPI << "\t" << *UserMI;
1070 /// RemoveDeadCPEMI - Remove a dead constant pool entry instruction. Update
1071 /// sizes and offsets of impacted basic blocks.
1072 void ARMConstantIslands::RemoveDeadCPEMI(MachineInstr *CPEMI) {
1073 MachineBasicBlock *CPEBB = CPEMI->getParent();
1074 unsigned Size = CPEMI->getOperand(2).getImm();
1075 CPEMI->eraseFromParent();
1076 BBSizes[CPEBB->getNumber()] -= Size;
1077 // All succeeding offsets have the current size value added in, fix this.
1078 if (CPEBB->empty()) {
1079 // In thumb mode, the size of island may be padded by two to compensate for
1080 // the alignment requirement. Then it will now be 2 when the block is
1081 // empty, so fix this.
1082 // All succeeding offsets have the current size value added in, fix this.
1083 if (BBSizes[CPEBB->getNumber()] != 0) {
1084 Size += BBSizes[CPEBB->getNumber()];
1085 BBSizes[CPEBB->getNumber()] = 0;
1088 AdjustBBOffsetsAfter(CPEBB, -Size);
1089 // An island has only one predecessor BB and one successor BB. Check if
1090 // this BB's predecessor jumps directly to this BB's successor. This
1091 // shouldn't happen currently.
1092 assert(!BBIsJumpedOver(CPEBB) && "How did this happen?");
1093 // FIXME: remove the empty blocks after all the work is done?
1096 /// RemoveUnusedCPEntries - Remove constant pool entries whose refcounts
1098 bool ARMConstantIslands::RemoveUnusedCPEntries() {
1099 unsigned MadeChange = false;
1100 for (unsigned i = 0, e = CPEntries.size(); i != e; ++i) {
1101 std::vector<CPEntry> &CPEs = CPEntries[i];
1102 for (unsigned j = 0, ee = CPEs.size(); j != ee; ++j) {
1103 if (CPEs[j].RefCount == 0 && CPEs[j].CPEMI) {
1104 RemoveDeadCPEMI(CPEs[j].CPEMI);
1105 CPEs[j].CPEMI = NULL;
1113 /// BBIsInRange - Returns true if the distance between specific MI and
1114 /// specific BB can fit in MI's displacement field.
1115 bool ARMConstantIslands::BBIsInRange(MachineInstr *MI,MachineBasicBlock *DestBB,
1117 unsigned PCAdj = isThumb ? 4 : 8;
1118 unsigned BrOffset = GetOffsetOf(MI) + PCAdj;
1119 unsigned DestOffset = BBOffsets[DestBB->getNumber()];
1121 DOUT << "Branch of destination BB#" << DestBB->getNumber()
1122 << " from BB#" << MI->getParent()->getNumber()
1123 << " max delta=" << MaxDisp
1124 << " from " << GetOffsetOf(MI) << " to " << DestOffset
1125 << " offset " << int(DestOffset-BrOffset) << "\t" << *MI;
1127 if (BrOffset <= DestOffset) {
1128 // Branch before the Dest.
1129 if (DestOffset-BrOffset <= MaxDisp)
1132 if (BrOffset-DestOffset <= MaxDisp)
1138 /// FixUpImmediateBr - Fix up an immediate branch whose destination is too far
1139 /// away to fit in its displacement field.
1140 bool ARMConstantIslands::FixUpImmediateBr(MachineFunction &Fn, ImmBranch &Br) {
1141 MachineInstr *MI = Br.MI;
1142 MachineBasicBlock *DestBB = MI->getOperand(0).getMBB();
1144 // Check to see if the DestBB is already in-range.
1145 if (BBIsInRange(MI, DestBB, Br.MaxDisp))
1149 return FixUpUnconditionalBr(Fn, Br);
1150 return FixUpConditionalBr(Fn, Br);
1153 /// FixUpUnconditionalBr - Fix up an unconditional branch whose destination is
1154 /// too far away to fit in its displacement field. If the LR register has been
1155 /// spilled in the epilogue, then we can use BL to implement a far jump.
1156 /// Otherwise, add an intermediate branch instruction to to a branch.
1158 ARMConstantIslands::FixUpUnconditionalBr(MachineFunction &Fn, ImmBranch &Br) {
1159 MachineInstr *MI = Br.MI;
1160 MachineBasicBlock *MBB = MI->getParent();
1161 assert(isThumb && "Expected a Thumb function!");
1163 // Use BL to implement far jump.
1164 Br.MaxDisp = (1 << 21) * 2;
1165 MI->setDesc(TII->get(ARM::tBfar));
1166 BBSizes[MBB->getNumber()] += 2;
1167 AdjustBBOffsetsAfter(MBB, 2);
1171 DOUT << " Changed B to long jump " << *MI;
1176 /// FixUpConditionalBr - Fix up a conditional branch whose destination is too
1177 /// far away to fit in its displacement field. It is converted to an inverse
1178 /// conditional branch + an unconditional branch to the destination.
1180 ARMConstantIslands::FixUpConditionalBr(MachineFunction &Fn, ImmBranch &Br) {
1181 MachineInstr *MI = Br.MI;
1182 MachineBasicBlock *DestBB = MI->getOperand(0).getMBB();
1184 // Add a unconditional branch to the destination and invert the branch
1185 // condition to jump over it:
1191 ARMCC::CondCodes CC = (ARMCC::CondCodes)MI->getOperand(1).getImm();
1192 CC = ARMCC::getOppositeCondition(CC);
1193 unsigned CCReg = MI->getOperand(2).getReg();
1195 // If the branch is at the end of its MBB and that has a fall-through block,
1196 // direct the updated conditional branch to the fall-through block. Otherwise,
1197 // split the MBB before the next instruction.
1198 MachineBasicBlock *MBB = MI->getParent();
1199 MachineInstr *BMI = &MBB->back();
1200 bool NeedSplit = (BMI != MI) || !BBHasFallthrough(MBB);
1204 if (next(MachineBasicBlock::iterator(MI)) == prior(MBB->end()) &&
1205 BMI->getOpcode() == Br.UncondBr) {
1206 // Last MI in the BB is a unconditional branch. Can we simply invert the
1207 // condition and swap destinations:
1213 MachineBasicBlock *NewDest = BMI->getOperand(0).getMBB();
1214 if (BBIsInRange(MI, NewDest, Br.MaxDisp)) {
1215 DOUT << " Invert Bcc condition and swap its destination with " << *BMI;
1216 BMI->getOperand(0).setMBB(DestBB);
1217 MI->getOperand(0).setMBB(NewDest);
1218 MI->getOperand(1).setImm(CC);
1225 SplitBlockBeforeInstr(MI);
1226 // No need for the branch to the next block. We're adding a unconditional
1227 // branch to the destination.
1228 int delta = TII->GetInstSizeInBytes(&MBB->back());
1229 BBSizes[MBB->getNumber()] -= delta;
1230 MachineBasicBlock* SplitBB = next(MachineFunction::iterator(MBB));
1231 AdjustBBOffsetsAfter(SplitBB, -delta);
1232 MBB->back().eraseFromParent();
1233 // BBOffsets[SplitBB] is wrong temporarily, fixed below
1235 MachineBasicBlock *NextBB = next(MachineFunction::iterator(MBB));
1237 DOUT << " Insert B to BB#" << DestBB->getNumber()
1238 << " also invert condition and change dest. to BB#"
1239 << NextBB->getNumber() << "\n";
1241 // Insert a new conditional branch and a new unconditional branch.
1242 // Also update the ImmBranch as well as adding a new entry for the new branch.
1243 BuildMI(MBB, TII->get(MI->getOpcode())).addMBB(NextBB)
1244 .addImm(CC).addReg(CCReg);
1245 Br.MI = &MBB->back();
1246 BBSizes[MBB->getNumber()] += TII->GetInstSizeInBytes(&MBB->back());
1247 BuildMI(MBB, TII->get(Br.UncondBr)).addMBB(DestBB);
1248 BBSizes[MBB->getNumber()] += TII->GetInstSizeInBytes(&MBB->back());
1249 unsigned MaxDisp = getUnconditionalBrDisp(Br.UncondBr);
1250 ImmBranches.push_back(ImmBranch(&MBB->back(), MaxDisp, false, Br.UncondBr));
1252 // Remove the old conditional branch. It may or may not still be in MBB.
1253 BBSizes[MI->getParent()->getNumber()] -= TII->GetInstSizeInBytes(MI);
1254 MI->eraseFromParent();
1256 // The net size change is an addition of one unconditional branch.
1257 int delta = TII->GetInstSizeInBytes(&MBB->back());
1258 AdjustBBOffsetsAfter(MBB, delta);
1262 /// UndoLRSpillRestore - Remove Thumb push / pop instructions that only spills
1263 /// LR / restores LR to pc.
1264 bool ARMConstantIslands::UndoLRSpillRestore() {
1265 bool MadeChange = false;
1266 for (unsigned i = 0, e = PushPopMIs.size(); i != e; ++i) {
1267 MachineInstr *MI = PushPopMIs[i];
1268 if (MI->getOpcode() == ARM::tPOP_RET &&
1269 MI->getOperand(0).getReg() == ARM::PC &&
1270 MI->getNumExplicitOperands() == 1) {
1271 BuildMI(MI->getParent(), TII->get(ARM::tBX_RET));
1272 MI->eraseFromParent();