1 //===-- ARMConstantIslandPass.cpp - ARM constant islands --------*- C++ -*-===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file contains a pass that splits the constant pool up into 'islands'
11 // which are scattered through-out the function. This is required due to the
12 // limited pc-relative displacements that ARM has.
14 //===----------------------------------------------------------------------===//
16 #define DEBUG_TYPE "arm-cp-islands"
18 #include "ARMAddressingModes.h"
19 #include "ARMMachineFunctionInfo.h"
20 #include "ARMInstrInfo.h"
21 #include "llvm/CodeGen/MachineConstantPool.h"
22 #include "llvm/CodeGen/MachineFunctionPass.h"
23 #include "llvm/CodeGen/MachineInstrBuilder.h"
24 #include "llvm/CodeGen/MachineJumpTableInfo.h"
25 #include "llvm/Target/TargetData.h"
26 #include "llvm/Target/TargetMachine.h"
27 #include "llvm/Support/Debug.h"
28 #include "llvm/Support/ErrorHandling.h"
29 #include "llvm/Support/raw_ostream.h"
30 #include "llvm/ADT/SmallSet.h"
31 #include "llvm/ADT/SmallVector.h"
32 #include "llvm/ADT/STLExtras.h"
33 #include "llvm/ADT/Statistic.h"
34 #include "llvm/Support/CommandLine.h"
38 STATISTIC(NumCPEs, "Number of constpool entries");
39 STATISTIC(NumSplit, "Number of uncond branches inserted");
40 STATISTIC(NumCBrFixed, "Number of cond branches fixed");
41 STATISTIC(NumUBrFixed, "Number of uncond branches fixed");
42 STATISTIC(NumTBs, "Number of table branches generated");
43 STATISTIC(NumT2CPShrunk, "Number of Thumb2 constantpool instructions shrunk");
44 STATISTIC(NumT2BrShrunk, "Number of Thumb2 immediate branches shrunk");
45 STATISTIC(NumCBZ, "Number of CBZ / CBNZ formed");
46 STATISTIC(NumJTMoved, "Number of jump table destination blocks moved");
47 STATISTIC(NumJTInserted, "Number of jump table intermediate blocks inserted");
51 AdjustJumpTableBlocks("arm-adjust-jump-tables", cl::Hidden, cl::init(true),
52 cl::desc("Adjust basic block layout to better use TB[BH]"));
55 /// ARMConstantIslands - Due to limited PC-relative displacements, ARM
56 /// requires constant pool entries to be scattered among the instructions
57 /// inside a function. To do this, it completely ignores the normal LLVM
58 /// constant pool; instead, it places constants wherever it feels like with
59 /// special instructions.
61 /// The terminology used in this pass includes:
62 /// Islands - Clumps of constants placed in the function.
63 /// Water - Potential places where an island could be formed.
64 /// CPE - A constant pool entry that has been placed somewhere, which
65 /// tracks a list of users.
66 class ARMConstantIslands : public MachineFunctionPass {
67 /// BBSizes - The size of each MachineBasicBlock in bytes of code, indexed
68 /// by MBB Number. The two-byte pads required for Thumb alignment are
69 /// counted as part of the following block (i.e., the offset and size for
70 /// a padded block will both be ==2 mod 4).
71 std::vector<unsigned> BBSizes;
73 /// BBOffsets - the offset of each MBB in bytes, starting from 0.
74 /// The two-byte pads required for Thumb alignment are counted as part of
75 /// the following block.
76 std::vector<unsigned> BBOffsets;
78 /// WaterList - A sorted list of basic blocks where islands could be placed
79 /// (i.e. blocks that don't fall through to the following block, due
80 /// to a return, unreachable, or unconditional branch).
81 std::vector<MachineBasicBlock*> WaterList;
83 /// NewWaterList - The subset of WaterList that was created since the
84 /// previous iteration by inserting unconditional branches.
85 SmallSet<MachineBasicBlock*, 4> NewWaterList;
87 typedef std::vector<MachineBasicBlock*>::iterator water_iterator;
89 /// CPUser - One user of a constant pool, keeping the machine instruction
90 /// pointer, the constant pool being referenced, and the max displacement
91 /// allowed from the instruction to the CP. The HighWaterMark records the
92 /// highest basic block where a new CPEntry can be placed. To ensure this
93 /// pass terminates, the CP entries are initially placed at the end of the
94 /// function and then move monotonically to lower addresses. The
95 /// exception to this rule is when the current CP entry for a particular
96 /// CPUser is out of range, but there is another CP entry for the same
97 /// constant value in range. We want to use the existing in-range CP
98 /// entry, but if it later moves out of range, the search for new water
99 /// should resume where it left off. The HighWaterMark is used to record
104 MachineBasicBlock *HighWaterMark;
108 CPUser(MachineInstr *mi, MachineInstr *cpemi, unsigned maxdisp,
109 bool neg, bool soimm)
110 : MI(mi), CPEMI(cpemi), MaxDisp(maxdisp), NegOk(neg), IsSoImm(soimm) {
111 HighWaterMark = CPEMI->getParent();
115 /// CPUsers - Keep track of all of the machine instructions that use various
116 /// constant pools and their max displacement.
117 std::vector<CPUser> CPUsers;
119 /// CPEntry - One per constant pool entry, keeping the machine instruction
120 /// pointer, the constpool index, and the number of CPUser's which
121 /// reference this entry.
126 CPEntry(MachineInstr *cpemi, unsigned cpi, unsigned rc = 0)
127 : CPEMI(cpemi), CPI(cpi), RefCount(rc) {}
130 /// CPEntries - Keep track of all of the constant pool entry machine
131 /// instructions. For each original constpool index (i.e. those that
132 /// existed upon entry to this pass), it keeps a vector of entries.
133 /// Original elements are cloned as we go along; the clones are
134 /// put in the vector of the original element, but have distinct CPIs.
135 std::vector<std::vector<CPEntry> > CPEntries;
137 /// ImmBranch - One per immediate branch, keeping the machine instruction
138 /// pointer, conditional or unconditional, the max displacement,
139 /// and (if isCond is true) the corresponding unconditional branch
143 unsigned MaxDisp : 31;
146 ImmBranch(MachineInstr *mi, unsigned maxdisp, bool cond, int ubr)
147 : MI(mi), MaxDisp(maxdisp), isCond(cond), UncondBr(ubr) {}
150 /// ImmBranches - Keep track of all the immediate branch instructions.
152 std::vector<ImmBranch> ImmBranches;
154 /// PushPopMIs - Keep track of all the Thumb push / pop instructions.
156 SmallVector<MachineInstr*, 4> PushPopMIs;
158 /// T2JumpTables - Keep track of all the Thumb2 jumptable instructions.
159 SmallVector<MachineInstr*, 4> T2JumpTables;
161 /// HasFarJump - True if any far jump instruction has been emitted during
162 /// the branch fix up pass.
165 const TargetInstrInfo *TII;
166 const ARMSubtarget *STI;
167 ARMFunctionInfo *AFI;
173 ARMConstantIslands() : MachineFunctionPass(&ID) {}
175 virtual bool runOnMachineFunction(MachineFunction &MF);
177 virtual const char *getPassName() const {
178 return "ARM constant island placement and branch shortening pass";
182 void DoInitialPlacement(MachineFunction &MF,
183 std::vector<MachineInstr*> &CPEMIs);
184 CPEntry *findConstPoolEntry(unsigned CPI, const MachineInstr *CPEMI);
185 void JumpTableFunctionScan(MachineFunction &MF);
186 void InitialFunctionScan(MachineFunction &MF,
187 const std::vector<MachineInstr*> &CPEMIs);
188 MachineBasicBlock *SplitBlockBeforeInstr(MachineInstr *MI);
189 void UpdateForInsertedWaterBlock(MachineBasicBlock *NewBB);
190 void AdjustBBOffsetsAfter(MachineBasicBlock *BB, int delta);
191 bool DecrementOldEntry(unsigned CPI, MachineInstr* CPEMI);
192 int LookForExistingCPEntry(CPUser& U, unsigned UserOffset);
193 bool LookForWater(CPUser&U, unsigned UserOffset, water_iterator &WaterIter);
194 void CreateNewWater(unsigned CPUserIndex, unsigned UserOffset,
195 MachineBasicBlock *&NewMBB);
196 bool HandleConstantPoolUser(MachineFunction &MF, unsigned CPUserIndex);
197 void RemoveDeadCPEMI(MachineInstr *CPEMI);
198 bool RemoveUnusedCPEntries();
199 bool CPEIsInRange(MachineInstr *MI, unsigned UserOffset,
200 MachineInstr *CPEMI, unsigned Disp, bool NegOk,
201 bool DoDump = false);
202 bool WaterIsInRange(unsigned UserOffset, MachineBasicBlock *Water,
204 bool OffsetIsInRange(unsigned UserOffset, unsigned TrialOffset,
205 unsigned Disp, bool NegativeOK, bool IsSoImm = false);
206 bool BBIsInRange(MachineInstr *MI, MachineBasicBlock *BB, unsigned Disp);
207 bool FixUpImmediateBr(MachineFunction &MF, ImmBranch &Br);
208 bool FixUpConditionalBr(MachineFunction &MF, ImmBranch &Br);
209 bool FixUpUnconditionalBr(MachineFunction &MF, ImmBranch &Br);
210 bool UndoLRSpillRestore();
211 bool OptimizeThumb2Instructions(MachineFunction &MF);
212 bool OptimizeThumb2Branches(MachineFunction &MF);
213 bool ReorderThumb2JumpTables(MachineFunction &MF);
214 bool OptimizeThumb2JumpTables(MachineFunction &MF);
215 MachineBasicBlock *AdjustJTTargetBlockForward(MachineBasicBlock *BB,
216 MachineBasicBlock *JTBB);
218 unsigned GetOffsetOf(MachineInstr *MI) const;
220 void verify(MachineFunction &MF);
222 char ARMConstantIslands::ID = 0;
225 /// verify - check BBOffsets, BBSizes, alignment of islands
226 void ARMConstantIslands::verify(MachineFunction &MF) {
227 assert(BBOffsets.size() == BBSizes.size());
228 for (unsigned i = 1, e = BBOffsets.size(); i != e; ++i)
229 assert(BBOffsets[i-1]+BBSizes[i-1] == BBOffsets[i]);
233 for (MachineFunction::iterator MBBI = MF.begin(), E = MF.end();
235 MachineBasicBlock *MBB = MBBI;
237 MBB->begin()->getOpcode() == ARM::CONSTPOOL_ENTRY) {
238 unsigned MBBId = MBB->getNumber();
239 assert((BBOffsets[MBBId]%4 == 0 && BBSizes[MBBId]%4 == 0) ||
240 (BBOffsets[MBBId]%4 != 0 && BBSizes[MBBId]%4 != 0));
246 /// print block size and offset information - debugging
247 void ARMConstantIslands::dumpBBs() {
248 for (unsigned J = 0, E = BBOffsets.size(); J !=E; ++J) {
249 DEBUG(errs() << "block " << J << " offset " << BBOffsets[J]
250 << " size " << BBSizes[J] << "\n");
254 /// createARMConstantIslandPass - returns an instance of the constpool
256 FunctionPass *llvm::createARMConstantIslandPass() {
257 return new ARMConstantIslands();
260 bool ARMConstantIslands::runOnMachineFunction(MachineFunction &MF) {
261 MachineConstantPool &MCP = *MF.getConstantPool();
263 TII = MF.getTarget().getInstrInfo();
264 AFI = MF.getInfo<ARMFunctionInfo>();
265 STI = &MF.getTarget().getSubtarget<ARMSubtarget>();
267 isThumb = AFI->isThumbFunction();
268 isThumb1 = AFI->isThumb1OnlyFunction();
269 isThumb2 = AFI->isThumb2Function();
273 // Renumber all of the machine basic blocks in the function, guaranteeing that
274 // the numbers agree with the position of the block in the function.
277 // Try to reorder and otherwise adjust the block layout to make good use
278 // of the TB[BH] instructions.
279 bool MadeChange = false;
280 if (isThumb2 && AdjustJumpTableBlocks) {
281 JumpTableFunctionScan(MF);
282 MadeChange |= ReorderThumb2JumpTables(MF);
283 // Data is out of date, so clear it. It'll be re-computed later.
286 T2JumpTables.clear();
287 // Blocks may have shifted around. Keep the numbering up to date.
291 // Thumb1 functions containing constant pools get 4-byte alignment.
292 // This is so we can keep exact track of where the alignment padding goes.
294 // Set default. Thumb1 function is 2-byte aligned, ARM and Thumb2 are 4-byte
296 AFI->setAlign(isThumb1 ? 1U : 2U);
298 // Perform the initial placement of the constant pool entries. To start with,
299 // we put them all at the end of the function.
300 std::vector<MachineInstr*> CPEMIs;
301 if (!MCP.isEmpty()) {
302 DoInitialPlacement(MF, CPEMIs);
307 /// The next UID to take is the first unused one.
308 AFI->initConstPoolEntryUId(CPEMIs.size());
310 // Do the initial scan of the function, building up information about the
311 // sizes of each block, the location of all the water, and finding all of the
312 // constant pool users.
313 InitialFunctionScan(MF, CPEMIs);
316 /// Remove dead constant pool entries.
317 RemoveUnusedCPEntries();
319 // Iteratively place constant pool entries and fix up branches until there
321 unsigned NoCPIters = 0, NoBRIters = 0;
323 bool CPChange = false;
324 for (unsigned i = 0, e = CPUsers.size(); i != e; ++i)
325 CPChange |= HandleConstantPoolUser(MF, i);
326 if (CPChange && ++NoCPIters > 30)
327 llvm_unreachable("Constant Island pass failed to converge!");
330 // Clear NewWaterList now. If we split a block for branches, it should
331 // appear as "new water" for the next iteration of constant pool placement.
332 NewWaterList.clear();
334 bool BRChange = false;
335 for (unsigned i = 0, e = ImmBranches.size(); i != e; ++i)
336 BRChange |= FixUpImmediateBr(MF, ImmBranches[i]);
337 if (BRChange && ++NoBRIters > 30)
338 llvm_unreachable("Branch Fix Up pass failed to converge!");
341 if (!CPChange && !BRChange)
346 // Shrink 32-bit Thumb2 branch, load, and store instructions.
348 MadeChange |= OptimizeThumb2Instructions(MF);
350 // After a while, this might be made debug-only, but it is not expensive.
353 // If LR has been forced spilled and no far jumps (i.e. BL) has been issued.
354 // Undo the spill / restore of LR if possible.
355 if (isThumb && !HasFarJump && AFI->isLRSpilledForFarJump())
356 MadeChange |= UndoLRSpillRestore();
365 T2JumpTables.clear();
370 /// DoInitialPlacement - Perform the initial placement of the constant pool
371 /// entries. To start with, we put them all at the end of the function.
372 void ARMConstantIslands::DoInitialPlacement(MachineFunction &MF,
373 std::vector<MachineInstr*> &CPEMIs) {
374 // Create the basic block to hold the CPE's.
375 MachineBasicBlock *BB = MF.CreateMachineBasicBlock();
378 // Add all of the constants from the constant pool to the end block, use an
379 // identity mapping of CPI's to CPE's.
380 const std::vector<MachineConstantPoolEntry> &CPs =
381 MF.getConstantPool()->getConstants();
383 const TargetData &TD = *MF.getTarget().getTargetData();
384 for (unsigned i = 0, e = CPs.size(); i != e; ++i) {
385 unsigned Size = TD.getTypeAllocSize(CPs[i].getType());
386 // Verify that all constant pool entries are a multiple of 4 bytes. If not,
387 // we would have to pad them out or something so that instructions stay
389 assert((Size & 3) == 0 && "CP Entry not multiple of 4 bytes!");
390 MachineInstr *CPEMI =
391 BuildMI(BB, DebugLoc::getUnknownLoc(), TII->get(ARM::CONSTPOOL_ENTRY))
392 .addImm(i).addConstantPoolIndex(i).addImm(Size);
393 CPEMIs.push_back(CPEMI);
395 // Add a new CPEntry, but no corresponding CPUser yet.
396 std::vector<CPEntry> CPEs;
397 CPEs.push_back(CPEntry(CPEMI, i));
398 CPEntries.push_back(CPEs);
400 DEBUG(errs() << "Moved CPI#" << i << " to end of function as #" << i
405 /// BBHasFallthrough - Return true if the specified basic block can fallthrough
406 /// into the block immediately after it.
407 static bool BBHasFallthrough(MachineBasicBlock *MBB) {
408 // Get the next machine basic block in the function.
409 MachineFunction::iterator MBBI = MBB;
410 if (next(MBBI) == MBB->getParent()->end()) // Can't fall off end of function.
413 MachineBasicBlock *NextBB = next(MBBI);
414 for (MachineBasicBlock::succ_iterator I = MBB->succ_begin(),
415 E = MBB->succ_end(); I != E; ++I)
422 /// findConstPoolEntry - Given the constpool index and CONSTPOOL_ENTRY MI,
423 /// look up the corresponding CPEntry.
424 ARMConstantIslands::CPEntry
425 *ARMConstantIslands::findConstPoolEntry(unsigned CPI,
426 const MachineInstr *CPEMI) {
427 std::vector<CPEntry> &CPEs = CPEntries[CPI];
428 // Number of entries per constpool index should be small, just do a
430 for (unsigned i = 0, e = CPEs.size(); i != e; ++i) {
431 if (CPEs[i].CPEMI == CPEMI)
437 /// JumpTableFunctionScan - Do a scan of the function, building up
438 /// information about the sizes of each block and the locations of all
440 void ARMConstantIslands::JumpTableFunctionScan(MachineFunction &MF) {
442 for (MachineFunction::iterator MBBI = MF.begin(), E = MF.end();
444 MachineBasicBlock &MBB = *MBBI;
446 unsigned MBBSize = 0;
447 for (MachineBasicBlock::iterator I = MBB.begin(), E = MBB.end();
449 // Add instruction size to MBBSize.
450 MBBSize += TII->GetInstSizeInBytes(I);
452 int Opc = I->getOpcode();
453 if (I->getDesc().isBranch()) {
456 continue; // Ignore other JT branches
458 T2JumpTables.push_back(I);
459 continue; // Does not get an entry in ImmBranches
464 BBSizes.push_back(MBBSize);
465 BBOffsets.push_back(Offset);
470 /// InitialFunctionScan - Do the initial scan of the function, building up
471 /// information about the sizes of each block, the location of all the water,
472 /// and finding all of the constant pool users.
473 void ARMConstantIslands::InitialFunctionScan(MachineFunction &MF,
474 const std::vector<MachineInstr*> &CPEMIs) {
476 for (MachineFunction::iterator MBBI = MF.begin(), E = MF.end();
478 MachineBasicBlock &MBB = *MBBI;
480 // If this block doesn't fall through into the next MBB, then this is
481 // 'water' that a constant pool island could be placed.
482 if (!BBHasFallthrough(&MBB))
483 WaterList.push_back(&MBB);
485 unsigned MBBSize = 0;
486 for (MachineBasicBlock::iterator I = MBB.begin(), E = MBB.end();
488 // Add instruction size to MBBSize.
489 MBBSize += TII->GetInstSizeInBytes(I);
491 int Opc = I->getOpcode();
492 if (I->getDesc().isBranch()) {
499 continue; // Ignore other JT branches
501 // A Thumb1 table jump may involve padding; for the offsets to
502 // be right, functions containing these must be 4-byte aligned.
504 if ((Offset+MBBSize)%4 != 0)
505 // FIXME: Add a pseudo ALIGN instruction instead.
506 MBBSize += 2; // padding
507 continue; // Does not get an entry in ImmBranches
509 T2JumpTables.push_back(I);
510 continue; // Does not get an entry in ImmBranches
541 // Record this immediate branch.
542 unsigned MaxOffs = ((1 << (Bits-1))-1) * Scale;
543 ImmBranches.push_back(ImmBranch(I, MaxOffs, isCond, UOpc));
546 if (Opc == ARM::tPUSH || Opc == ARM::tPOP_RET)
547 PushPopMIs.push_back(I);
549 if (Opc == ARM::CONSTPOOL_ENTRY)
552 // Scan the instructions for constant pool operands.
553 for (unsigned op = 0, e = I->getNumOperands(); op != e; ++op)
554 if (I->getOperand(op).isCPI()) {
555 // We found one. The addressing mode tells us the max displacement
556 // from the PC that this instruction permits.
558 // Basic size info comes from the TSFlags field.
562 bool IsSoImm = false;
566 llvm_unreachable("Unknown addressing mode for CP reference!");
569 // Taking the address of a CP entry.
571 // This takes a SoImm, which is 8 bit immediate rotated. We'll
572 // pretend the maximum offset is 255 * 4. Since each instruction
573 // 4 byte wide, this is always correct. We'llc heck for other
574 // displacements that fits in a SoImm as well.
580 case ARM::t2LEApcrel:
592 Bits = 12; // +-offset_12
599 Scale = 4; // +(offset_8*4)
605 Scale = 4; // +-(offset_8*4)
610 // Remember that this is a user of a CP entry.
611 unsigned CPI = I->getOperand(op).getIndex();
612 MachineInstr *CPEMI = CPEMIs[CPI];
613 unsigned MaxOffs = ((1 << Bits)-1) * Scale;
614 CPUsers.push_back(CPUser(I, CPEMI, MaxOffs, NegOk, IsSoImm));
616 // Increment corresponding CPEntry reference count.
617 CPEntry *CPE = findConstPoolEntry(CPI, CPEMI);
618 assert(CPE && "Cannot find a corresponding CPEntry!");
621 // Instructions can only use one CP entry, don't bother scanning the
622 // rest of the operands.
627 // In thumb mode, if this block is a constpool island, we may need padding
628 // so it's aligned on 4 byte boundary.
631 MBB.begin()->getOpcode() == ARM::CONSTPOOL_ENTRY &&
635 BBSizes.push_back(MBBSize);
636 BBOffsets.push_back(Offset);
641 /// GetOffsetOf - Return the current offset of the specified machine instruction
642 /// from the start of the function. This offset changes as stuff is moved
643 /// around inside the function.
644 unsigned ARMConstantIslands::GetOffsetOf(MachineInstr *MI) const {
645 MachineBasicBlock *MBB = MI->getParent();
647 // The offset is composed of two things: the sum of the sizes of all MBB's
648 // before this instruction's block, and the offset from the start of the block
650 unsigned Offset = BBOffsets[MBB->getNumber()];
652 // If we're looking for a CONSTPOOL_ENTRY in Thumb, see if this block has
653 // alignment padding, and compensate if so.
655 MI->getOpcode() == ARM::CONSTPOOL_ENTRY &&
659 // Sum instructions before MI in MBB.
660 for (MachineBasicBlock::iterator I = MBB->begin(); ; ++I) {
661 assert(I != MBB->end() && "Didn't find MI in its own basic block?");
662 if (&*I == MI) return Offset;
663 Offset += TII->GetInstSizeInBytes(I);
667 /// CompareMBBNumbers - Little predicate function to sort the WaterList by MBB
669 static bool CompareMBBNumbers(const MachineBasicBlock *LHS,
670 const MachineBasicBlock *RHS) {
671 return LHS->getNumber() < RHS->getNumber();
674 /// UpdateForInsertedWaterBlock - When a block is newly inserted into the
675 /// machine function, it upsets all of the block numbers. Renumber the blocks
676 /// and update the arrays that parallel this numbering.
677 void ARMConstantIslands::UpdateForInsertedWaterBlock(MachineBasicBlock *NewBB) {
678 // Renumber the MBB's to keep them consequtive.
679 NewBB->getParent()->RenumberBlocks(NewBB);
681 // Insert a size into BBSizes to align it properly with the (newly
682 // renumbered) block numbers.
683 BBSizes.insert(BBSizes.begin()+NewBB->getNumber(), 0);
685 // Likewise for BBOffsets.
686 BBOffsets.insert(BBOffsets.begin()+NewBB->getNumber(), 0);
688 // Next, update WaterList. Specifically, we need to add NewMBB as having
689 // available water after it.
691 std::lower_bound(WaterList.begin(), WaterList.end(), NewBB,
693 WaterList.insert(IP, NewBB);
697 /// Split the basic block containing MI into two blocks, which are joined by
698 /// an unconditional branch. Update data structures and renumber blocks to
699 /// account for this change and returns the newly created block.
700 MachineBasicBlock *ARMConstantIslands::SplitBlockBeforeInstr(MachineInstr *MI) {
701 MachineBasicBlock *OrigBB = MI->getParent();
702 MachineFunction &MF = *OrigBB->getParent();
704 // Create a new MBB for the code after the OrigBB.
705 MachineBasicBlock *NewBB =
706 MF.CreateMachineBasicBlock(OrigBB->getBasicBlock());
707 MachineFunction::iterator MBBI = OrigBB; ++MBBI;
708 MF.insert(MBBI, NewBB);
710 // Splice the instructions starting with MI over to NewBB.
711 NewBB->splice(NewBB->end(), OrigBB, MI, OrigBB->end());
713 // Add an unconditional branch from OrigBB to NewBB.
714 // Note the new unconditional branch is not being recorded.
715 // There doesn't seem to be meaningful DebugInfo available; this doesn't
716 // correspond to anything in the source.
717 unsigned Opc = isThumb ? (isThumb2 ? ARM::t2B : ARM::tB) : ARM::B;
718 BuildMI(OrigBB, DebugLoc::getUnknownLoc(), TII->get(Opc)).addMBB(NewBB);
721 // Update the CFG. All succs of OrigBB are now succs of NewBB.
722 while (!OrigBB->succ_empty()) {
723 MachineBasicBlock *Succ = *OrigBB->succ_begin();
724 OrigBB->removeSuccessor(Succ);
725 NewBB->addSuccessor(Succ);
727 // This pass should be run after register allocation, so there should be no
728 // PHI nodes to update.
729 assert((Succ->empty() || Succ->begin()->getOpcode() != TargetInstrInfo::PHI)
730 && "PHI nodes should be eliminated by now!");
733 // OrigBB branches to NewBB.
734 OrigBB->addSuccessor(NewBB);
736 // Update internal data structures to account for the newly inserted MBB.
737 // This is almost the same as UpdateForInsertedWaterBlock, except that
738 // the Water goes after OrigBB, not NewBB.
739 MF.RenumberBlocks(NewBB);
741 // Insert a size into BBSizes to align it properly with the (newly
742 // renumbered) block numbers.
743 BBSizes.insert(BBSizes.begin()+NewBB->getNumber(), 0);
745 // Likewise for BBOffsets.
746 BBOffsets.insert(BBOffsets.begin()+NewBB->getNumber(), 0);
748 // Next, update WaterList. Specifically, we need to add OrigMBB as having
749 // available water after it (but not if it's already there, which happens
750 // when splitting before a conditional branch that is followed by an
751 // unconditional branch - in that case we want to insert NewBB).
753 std::lower_bound(WaterList.begin(), WaterList.end(), OrigBB,
755 MachineBasicBlock* WaterBB = *IP;
756 if (WaterBB == OrigBB)
757 WaterList.insert(next(IP), NewBB);
759 WaterList.insert(IP, OrigBB);
760 NewWaterList.insert(OrigBB);
762 // Figure out how large the first NewMBB is. (It cannot
763 // contain a constpool_entry or tablejump.)
764 unsigned NewBBSize = 0;
765 for (MachineBasicBlock::iterator I = NewBB->begin(), E = NewBB->end();
767 NewBBSize += TII->GetInstSizeInBytes(I);
769 unsigned OrigBBI = OrigBB->getNumber();
770 unsigned NewBBI = NewBB->getNumber();
771 // Set the size of NewBB in BBSizes.
772 BBSizes[NewBBI] = NewBBSize;
774 // We removed instructions from UserMBB, subtract that off from its size.
775 // Add 2 or 4 to the block to count the unconditional branch we added to it.
776 int delta = isThumb1 ? 2 : 4;
777 BBSizes[OrigBBI] -= NewBBSize - delta;
779 // ...and adjust BBOffsets for NewBB accordingly.
780 BBOffsets[NewBBI] = BBOffsets[OrigBBI] + BBSizes[OrigBBI];
782 // All BBOffsets following these blocks must be modified.
783 AdjustBBOffsetsAfter(NewBB, delta);
788 /// OffsetIsInRange - Checks whether UserOffset (the location of a constant pool
789 /// reference) is within MaxDisp of TrialOffset (a proposed location of a
790 /// constant pool entry).
791 bool ARMConstantIslands::OffsetIsInRange(unsigned UserOffset,
792 unsigned TrialOffset, unsigned MaxDisp,
793 bool NegativeOK, bool IsSoImm) {
794 // On Thumb offsets==2 mod 4 are rounded down by the hardware for
795 // purposes of the displacement computation; compensate for that here.
796 // Effectively, the valid range of displacements is 2 bytes smaller for such
798 unsigned TotalAdj = 0;
799 if (isThumb && UserOffset%4 !=0) {
803 // CPEs will be rounded up to a multiple of 4.
804 if (isThumb && TrialOffset%4 != 0) {
809 // In Thumb2 mode, later branch adjustments can shift instructions up and
810 // cause alignment change. In the worst case scenario this can cause the
811 // user's effective address to be subtracted by 2 and the CPE's address to
813 if (isThumb2 && TotalAdj != 4)
814 MaxDisp -= (4 - TotalAdj);
816 if (UserOffset <= TrialOffset) {
817 // User before the Trial.
818 if (TrialOffset - UserOffset <= MaxDisp)
820 // FIXME: Make use full range of soimm values.
821 } else if (NegativeOK) {
822 if (UserOffset - TrialOffset <= MaxDisp)
824 // FIXME: Make use full range of soimm values.
829 /// WaterIsInRange - Returns true if a CPE placed after the specified
830 /// Water (a basic block) will be in range for the specific MI.
832 bool ARMConstantIslands::WaterIsInRange(unsigned UserOffset,
833 MachineBasicBlock* Water, CPUser &U) {
834 unsigned MaxDisp = U.MaxDisp;
835 unsigned CPEOffset = BBOffsets[Water->getNumber()] +
836 BBSizes[Water->getNumber()];
838 // If the CPE is to be inserted before the instruction, that will raise
839 // the offset of the instruction.
840 if (CPEOffset < UserOffset)
841 UserOffset += U.CPEMI->getOperand(2).getImm();
843 return OffsetIsInRange(UserOffset, CPEOffset, MaxDisp, U.NegOk, U.IsSoImm);
846 /// CPEIsInRange - Returns true if the distance between specific MI and
847 /// specific ConstPool entry instruction can fit in MI's displacement field.
848 bool ARMConstantIslands::CPEIsInRange(MachineInstr *MI, unsigned UserOffset,
849 MachineInstr *CPEMI, unsigned MaxDisp,
850 bool NegOk, bool DoDump) {
851 unsigned CPEOffset = GetOffsetOf(CPEMI);
852 assert(CPEOffset%4 == 0 && "Misaligned CPE");
855 DEBUG(errs() << "User of CPE#" << CPEMI->getOperand(0).getImm()
856 << " max delta=" << MaxDisp
857 << " insn address=" << UserOffset
858 << " CPE address=" << CPEOffset
859 << " offset=" << int(CPEOffset-UserOffset) << "\t" << *MI);
862 return OffsetIsInRange(UserOffset, CPEOffset, MaxDisp, NegOk);
866 /// BBIsJumpedOver - Return true of the specified basic block's only predecessor
867 /// unconditionally branches to its only successor.
868 static bool BBIsJumpedOver(MachineBasicBlock *MBB) {
869 if (MBB->pred_size() != 1 || MBB->succ_size() != 1)
872 MachineBasicBlock *Succ = *MBB->succ_begin();
873 MachineBasicBlock *Pred = *MBB->pred_begin();
874 MachineInstr *PredMI = &Pred->back();
875 if (PredMI->getOpcode() == ARM::B || PredMI->getOpcode() == ARM::tB
876 || PredMI->getOpcode() == ARM::t2B)
877 return PredMI->getOperand(0).getMBB() == Succ;
882 void ARMConstantIslands::AdjustBBOffsetsAfter(MachineBasicBlock *BB,
884 MachineFunction::iterator MBBI = BB; MBBI = next(MBBI);
885 for(unsigned i = BB->getNumber()+1, e = BB->getParent()->getNumBlockIDs();
887 BBOffsets[i] += delta;
888 // If some existing blocks have padding, adjust the padding as needed, a
889 // bit tricky. delta can be negative so don't use % on that.
892 MachineBasicBlock *MBB = MBBI;
894 // Constant pool entries require padding.
895 if (MBB->begin()->getOpcode() == ARM::CONSTPOOL_ENTRY) {
896 unsigned OldOffset = BBOffsets[i] - delta;
897 if ((OldOffset%4) == 0 && (BBOffsets[i]%4) != 0) {
901 } else if ((OldOffset%4) != 0 && (BBOffsets[i]%4) == 0) {
902 // remove existing padding
907 // Thumb1 jump tables require padding. They should be at the end;
908 // following unconditional branches are removed by AnalyzeBranch.
909 MachineInstr *ThumbJTMI = prior(MBB->end());
910 if (ThumbJTMI->getOpcode() == ARM::tBR_JTr) {
911 unsigned NewMIOffset = GetOffsetOf(ThumbJTMI);
912 unsigned OldMIOffset = NewMIOffset - delta;
913 if ((OldMIOffset%4) == 0 && (NewMIOffset%4) != 0) {
914 // remove existing padding
917 } else if ((OldMIOffset%4) != 0 && (NewMIOffset%4) == 0) {
930 /// DecrementOldEntry - find the constant pool entry with index CPI
931 /// and instruction CPEMI, and decrement its refcount. If the refcount
932 /// becomes 0 remove the entry and instruction. Returns true if we removed
933 /// the entry, false if we didn't.
935 bool ARMConstantIslands::DecrementOldEntry(unsigned CPI, MachineInstr *CPEMI) {
936 // Find the old entry. Eliminate it if it is no longer used.
937 CPEntry *CPE = findConstPoolEntry(CPI, CPEMI);
938 assert(CPE && "Unexpected!");
939 if (--CPE->RefCount == 0) {
940 RemoveDeadCPEMI(CPEMI);
948 /// LookForCPEntryInRange - see if the currently referenced CPE is in range;
949 /// if not, see if an in-range clone of the CPE is in range, and if so,
950 /// change the data structures so the user references the clone. Returns:
951 /// 0 = no existing entry found
952 /// 1 = entry found, and there were no code insertions or deletions
953 /// 2 = entry found, and there were code insertions or deletions
954 int ARMConstantIslands::LookForExistingCPEntry(CPUser& U, unsigned UserOffset)
956 MachineInstr *UserMI = U.MI;
957 MachineInstr *CPEMI = U.CPEMI;
959 // Check to see if the CPE is already in-range.
960 if (CPEIsInRange(UserMI, UserOffset, CPEMI, U.MaxDisp, U.NegOk, true)) {
961 DEBUG(errs() << "In range\n");
965 // No. Look for previously created clones of the CPE that are in range.
966 unsigned CPI = CPEMI->getOperand(1).getIndex();
967 std::vector<CPEntry> &CPEs = CPEntries[CPI];
968 for (unsigned i = 0, e = CPEs.size(); i != e; ++i) {
969 // We already tried this one
970 if (CPEs[i].CPEMI == CPEMI)
972 // Removing CPEs can leave empty entries, skip
973 if (CPEs[i].CPEMI == NULL)
975 if (CPEIsInRange(UserMI, UserOffset, CPEs[i].CPEMI, U.MaxDisp, U.NegOk)) {
976 DEBUG(errs() << "Replacing CPE#" << CPI << " with CPE#"
977 << CPEs[i].CPI << "\n");
978 // Point the CPUser node to the replacement
979 U.CPEMI = CPEs[i].CPEMI;
980 // Change the CPI in the instruction operand to refer to the clone.
981 for (unsigned j = 0, e = UserMI->getNumOperands(); j != e; ++j)
982 if (UserMI->getOperand(j).isCPI()) {
983 UserMI->getOperand(j).setIndex(CPEs[i].CPI);
986 // Adjust the refcount of the clone...
988 // ...and the original. If we didn't remove the old entry, none of the
989 // addresses changed, so we don't need another pass.
990 return DecrementOldEntry(CPI, CPEMI) ? 2 : 1;
996 /// getUnconditionalBrDisp - Returns the maximum displacement that can fit in
997 /// the specific unconditional branch instruction.
998 static inline unsigned getUnconditionalBrDisp(int Opc) {
1001 return ((1<<10)-1)*2;
1003 return ((1<<23)-1)*2;
1008 return ((1<<23)-1)*4;
1011 /// LookForWater - Look for an existing entry in the WaterList in which
1012 /// we can place the CPE referenced from U so it's within range of U's MI.
1013 /// Returns true if found, false if not. If it returns true, WaterIter
1014 /// is set to the WaterList entry. For Thumb, prefer water that will not
1015 /// introduce padding to water that will. To ensure that this pass
1016 /// terminates, the CPE location for a particular CPUser is only allowed to
1017 /// move to a lower address, so search backward from the end of the list and
1018 /// prefer the first water that is in range.
1019 bool ARMConstantIslands::LookForWater(CPUser &U, unsigned UserOffset,
1020 water_iterator &WaterIter) {
1021 if (WaterList.empty())
1024 bool FoundWaterThatWouldPad = false;
1025 water_iterator IPThatWouldPad;
1026 for (water_iterator IP = prior(WaterList.end()),
1027 B = WaterList.begin();; --IP) {
1028 MachineBasicBlock* WaterBB = *IP;
1029 // Check if water is in range and is either at a lower address than the
1030 // current "high water mark" or a new water block that was created since
1031 // the previous iteration by inserting an unconditional branch. In the
1032 // latter case, we want to allow resetting the high water mark back to
1033 // this new water since we haven't seen it before. Inserting branches
1034 // should be relatively uncommon and when it does happen, we want to be
1035 // sure to take advantage of it for all the CPEs near that block, so that
1036 // we don't insert more branches than necessary.
1037 if (WaterIsInRange(UserOffset, WaterBB, U) &&
1038 (WaterBB->getNumber() < U.HighWaterMark->getNumber() ||
1039 NewWaterList.count(WaterBB))) {
1040 unsigned WBBId = WaterBB->getNumber();
1042 (BBOffsets[WBBId] + BBSizes[WBBId])%4 != 0) {
1043 // This is valid Water, but would introduce padding. Remember
1044 // it in case we don't find any Water that doesn't do this.
1045 if (!FoundWaterThatWouldPad) {
1046 FoundWaterThatWouldPad = true;
1047 IPThatWouldPad = IP;
1057 if (FoundWaterThatWouldPad) {
1058 WaterIter = IPThatWouldPad;
1064 /// CreateNewWater - No existing WaterList entry will work for
1065 /// CPUsers[CPUserIndex], so create a place to put the CPE. The end of the
1066 /// block is used if in range, and the conditional branch munged so control
1067 /// flow is correct. Otherwise the block is split to create a hole with an
1068 /// unconditional branch around it. In either case NewMBB is set to a
1069 /// block following which the new island can be inserted (the WaterList
1070 /// is not adjusted).
1071 void ARMConstantIslands::CreateNewWater(unsigned CPUserIndex,
1072 unsigned UserOffset,
1073 MachineBasicBlock *&NewMBB) {
1074 CPUser &U = CPUsers[CPUserIndex];
1075 MachineInstr *UserMI = U.MI;
1076 MachineInstr *CPEMI = U.CPEMI;
1077 MachineBasicBlock *UserMBB = UserMI->getParent();
1078 unsigned OffsetOfNextBlock = BBOffsets[UserMBB->getNumber()] +
1079 BBSizes[UserMBB->getNumber()];
1080 assert(OffsetOfNextBlock== BBOffsets[UserMBB->getNumber()+1]);
1082 // If the block does not end in an unconditional branch already, and if the
1083 // end of the block is within range, make new water there. (The addition
1084 // below is for the unconditional branch we will be adding: 4 bytes on ARM +
1085 // Thumb2, 2 on Thumb1. Possible Thumb1 alignment padding is allowed for
1086 // inside OffsetIsInRange.
1087 if (BBHasFallthrough(UserMBB) &&
1088 OffsetIsInRange(UserOffset, OffsetOfNextBlock + (isThumb1 ? 2: 4),
1089 U.MaxDisp, U.NegOk, U.IsSoImm)) {
1090 DEBUG(errs() << "Split at end of block\n");
1091 if (&UserMBB->back() == UserMI)
1092 assert(BBHasFallthrough(UserMBB) && "Expected a fallthrough BB!");
1093 NewMBB = next(MachineFunction::iterator(UserMBB));
1094 // Add an unconditional branch from UserMBB to fallthrough block.
1095 // Record it for branch lengthening; this new branch will not get out of
1096 // range, but if the preceding conditional branch is out of range, the
1097 // targets will be exchanged, and the altered branch may be out of
1098 // range, so the machinery has to know about it.
1099 int UncondBr = isThumb ? ((isThumb2) ? ARM::t2B : ARM::tB) : ARM::B;
1100 BuildMI(UserMBB, DebugLoc::getUnknownLoc(),
1101 TII->get(UncondBr)).addMBB(NewMBB);
1102 unsigned MaxDisp = getUnconditionalBrDisp(UncondBr);
1103 ImmBranches.push_back(ImmBranch(&UserMBB->back(),
1104 MaxDisp, false, UncondBr));
1105 int delta = isThumb1 ? 2 : 4;
1106 BBSizes[UserMBB->getNumber()] += delta;
1107 AdjustBBOffsetsAfter(UserMBB, delta);
1109 // What a big block. Find a place within the block to split it.
1110 // This is a little tricky on Thumb1 since instructions are 2 bytes
1111 // and constant pool entries are 4 bytes: if instruction I references
1112 // island CPE, and instruction I+1 references CPE', it will
1113 // not work well to put CPE as far forward as possible, since then
1114 // CPE' cannot immediately follow it (that location is 2 bytes
1115 // farther away from I+1 than CPE was from I) and we'd need to create
1116 // a new island. So, we make a first guess, then walk through the
1117 // instructions between the one currently being looked at and the
1118 // possible insertion point, and make sure any other instructions
1119 // that reference CPEs will be able to use the same island area;
1120 // if not, we back up the insertion point.
1122 // The 4 in the following is for the unconditional branch we'll be
1123 // inserting (allows for long branch on Thumb1). Alignment of the
1124 // island is handled inside OffsetIsInRange.
1125 unsigned BaseInsertOffset = UserOffset + U.MaxDisp -4;
1126 // This could point off the end of the block if we've already got
1127 // constant pool entries following this block; only the last one is
1128 // in the water list. Back past any possible branches (allow for a
1129 // conditional and a maximally long unconditional).
1130 if (BaseInsertOffset >= BBOffsets[UserMBB->getNumber()+1])
1131 BaseInsertOffset = BBOffsets[UserMBB->getNumber()+1] -
1133 unsigned EndInsertOffset = BaseInsertOffset +
1134 CPEMI->getOperand(2).getImm();
1135 MachineBasicBlock::iterator MI = UserMI;
1137 unsigned CPUIndex = CPUserIndex+1;
1138 for (unsigned Offset = UserOffset+TII->GetInstSizeInBytes(UserMI);
1139 Offset < BaseInsertOffset;
1140 Offset += TII->GetInstSizeInBytes(MI),
1142 if (CPUIndex < CPUsers.size() && CPUsers[CPUIndex].MI == MI) {
1143 CPUser &U = CPUsers[CPUIndex];
1144 if (!OffsetIsInRange(Offset, EndInsertOffset,
1145 U.MaxDisp, U.NegOk, U.IsSoImm)) {
1146 BaseInsertOffset -= (isThumb1 ? 2 : 4);
1147 EndInsertOffset -= (isThumb1 ? 2 : 4);
1149 // This is overly conservative, as we don't account for CPEMIs
1150 // being reused within the block, but it doesn't matter much.
1151 EndInsertOffset += CPUsers[CPUIndex].CPEMI->getOperand(2).getImm();
1155 DEBUG(errs() << "Split in middle of big block\n");
1156 NewMBB = SplitBlockBeforeInstr(prior(MI));
1160 /// HandleConstantPoolUser - Analyze the specified user, checking to see if it
1161 /// is out-of-range. If so, pick up the constant pool value and move it some
1162 /// place in-range. Return true if we changed any addresses (thus must run
1163 /// another pass of branch lengthening), false otherwise.
1164 bool ARMConstantIslands::HandleConstantPoolUser(MachineFunction &MF,
1165 unsigned CPUserIndex) {
1166 CPUser &U = CPUsers[CPUserIndex];
1167 MachineInstr *UserMI = U.MI;
1168 MachineInstr *CPEMI = U.CPEMI;
1169 unsigned CPI = CPEMI->getOperand(1).getIndex();
1170 unsigned Size = CPEMI->getOperand(2).getImm();
1171 // Compute this only once, it's expensive. The 4 or 8 is the value the
1172 // hardware keeps in the PC.
1173 unsigned UserOffset = GetOffsetOf(UserMI) + (isThumb ? 4 : 8);
1175 // See if the current entry is within range, or there is a clone of it
1177 int result = LookForExistingCPEntry(U, UserOffset);
1178 if (result==1) return false;
1179 else if (result==2) return true;
1181 // No existing clone of this CPE is within range.
1182 // We will be generating a new clone. Get a UID for it.
1183 unsigned ID = AFI->createConstPoolEntryUId();
1185 // Look for water where we can place this CPE.
1186 MachineBasicBlock *NewIsland = MF.CreateMachineBasicBlock();
1187 MachineBasicBlock *NewMBB;
1189 if (LookForWater(U, UserOffset, IP)) {
1190 DEBUG(errs() << "found water in range\n");
1191 MachineBasicBlock *WaterBB = *IP;
1193 // If the original WaterList entry was "new water" on this iteration,
1194 // propagate that to the new island. This is just keeping NewWaterList
1195 // updated to match the WaterList, which will be updated below.
1196 if (NewWaterList.count(WaterBB)) {
1197 NewWaterList.erase(WaterBB);
1198 NewWaterList.insert(NewIsland);
1200 // The new CPE goes before the following block (NewMBB).
1201 NewMBB = next(MachineFunction::iterator(WaterBB));
1205 DEBUG(errs() << "No water found\n");
1206 CreateNewWater(CPUserIndex, UserOffset, NewMBB);
1208 // SplitBlockBeforeInstr adds to WaterList, which is important when it is
1209 // called while handling branches so that the water will be seen on the
1210 // next iteration for constant pools, but in this context, we don't want
1211 // it. Check for this so it will be removed from the WaterList.
1212 // Also remove any entry from NewWaterList.
1213 MachineBasicBlock *WaterBB = prior(MachineFunction::iterator(NewMBB));
1214 IP = std::find(WaterList.begin(), WaterList.end(), WaterBB);
1215 if (IP != WaterList.end())
1216 NewWaterList.erase(WaterBB);
1218 // We are adding new water. Update NewWaterList.
1219 NewWaterList.insert(NewIsland);
1222 // Remove the original WaterList entry; we want subsequent insertions in
1223 // this vicinity to go after the one we're about to insert. This
1224 // considerably reduces the number of times we have to move the same CPE
1225 // more than once and is also important to ensure the algorithm terminates.
1226 if (IP != WaterList.end())
1227 WaterList.erase(IP);
1229 // Okay, we know we can put an island before NewMBB now, do it!
1230 MF.insert(NewMBB, NewIsland);
1232 // Update internal data structures to account for the newly inserted MBB.
1233 UpdateForInsertedWaterBlock(NewIsland);
1235 // Decrement the old entry, and remove it if refcount becomes 0.
1236 DecrementOldEntry(CPI, CPEMI);
1238 // Now that we have an island to add the CPE to, clone the original CPE and
1239 // add it to the island.
1240 U.HighWaterMark = NewIsland;
1241 U.CPEMI = BuildMI(NewIsland, DebugLoc::getUnknownLoc(),
1242 TII->get(ARM::CONSTPOOL_ENTRY))
1243 .addImm(ID).addConstantPoolIndex(CPI).addImm(Size);
1244 CPEntries[CPI].push_back(CPEntry(U.CPEMI, ID, 1));
1247 BBOffsets[NewIsland->getNumber()] = BBOffsets[NewMBB->getNumber()];
1248 // Compensate for .align 2 in thumb mode.
1249 if (isThumb && BBOffsets[NewIsland->getNumber()]%4 != 0)
1251 // Increase the size of the island block to account for the new entry.
1252 BBSizes[NewIsland->getNumber()] += Size;
1253 AdjustBBOffsetsAfter(NewIsland, Size);
1255 // Finally, change the CPI in the instruction operand to be ID.
1256 for (unsigned i = 0, e = UserMI->getNumOperands(); i != e; ++i)
1257 if (UserMI->getOperand(i).isCPI()) {
1258 UserMI->getOperand(i).setIndex(ID);
1262 DEBUG(errs() << " Moved CPE to #" << ID << " CPI=" << CPI
1263 << '\t' << *UserMI);
1268 /// RemoveDeadCPEMI - Remove a dead constant pool entry instruction. Update
1269 /// sizes and offsets of impacted basic blocks.
1270 void ARMConstantIslands::RemoveDeadCPEMI(MachineInstr *CPEMI) {
1271 MachineBasicBlock *CPEBB = CPEMI->getParent();
1272 unsigned Size = CPEMI->getOperand(2).getImm();
1273 CPEMI->eraseFromParent();
1274 BBSizes[CPEBB->getNumber()] -= Size;
1275 // All succeeding offsets have the current size value added in, fix this.
1276 if (CPEBB->empty()) {
1277 // In thumb1 mode, the size of island may be padded by two to compensate for
1278 // the alignment requirement. Then it will now be 2 when the block is
1279 // empty, so fix this.
1280 // All succeeding offsets have the current size value added in, fix this.
1281 if (BBSizes[CPEBB->getNumber()] != 0) {
1282 Size += BBSizes[CPEBB->getNumber()];
1283 BBSizes[CPEBB->getNumber()] = 0;
1286 AdjustBBOffsetsAfter(CPEBB, -Size);
1287 // An island has only one predecessor BB and one successor BB. Check if
1288 // this BB's predecessor jumps directly to this BB's successor. This
1289 // shouldn't happen currently.
1290 assert(!BBIsJumpedOver(CPEBB) && "How did this happen?");
1291 // FIXME: remove the empty blocks after all the work is done?
1294 /// RemoveUnusedCPEntries - Remove constant pool entries whose refcounts
1296 bool ARMConstantIslands::RemoveUnusedCPEntries() {
1297 unsigned MadeChange = false;
1298 for (unsigned i = 0, e = CPEntries.size(); i != e; ++i) {
1299 std::vector<CPEntry> &CPEs = CPEntries[i];
1300 for (unsigned j = 0, ee = CPEs.size(); j != ee; ++j) {
1301 if (CPEs[j].RefCount == 0 && CPEs[j].CPEMI) {
1302 RemoveDeadCPEMI(CPEs[j].CPEMI);
1303 CPEs[j].CPEMI = NULL;
1311 /// BBIsInRange - Returns true if the distance between specific MI and
1312 /// specific BB can fit in MI's displacement field.
1313 bool ARMConstantIslands::BBIsInRange(MachineInstr *MI,MachineBasicBlock *DestBB,
1315 unsigned PCAdj = isThumb ? 4 : 8;
1316 unsigned BrOffset = GetOffsetOf(MI) + PCAdj;
1317 unsigned DestOffset = BBOffsets[DestBB->getNumber()];
1319 DEBUG(errs() << "Branch of destination BB#" << DestBB->getNumber()
1320 << " from BB#" << MI->getParent()->getNumber()
1321 << " max delta=" << MaxDisp
1322 << " from " << GetOffsetOf(MI) << " to " << DestOffset
1323 << " offset " << int(DestOffset-BrOffset) << "\t" << *MI);
1325 if (BrOffset <= DestOffset) {
1326 // Branch before the Dest.
1327 if (DestOffset-BrOffset <= MaxDisp)
1330 if (BrOffset-DestOffset <= MaxDisp)
1336 /// FixUpImmediateBr - Fix up an immediate branch whose destination is too far
1337 /// away to fit in its displacement field.
1338 bool ARMConstantIslands::FixUpImmediateBr(MachineFunction &MF, ImmBranch &Br) {
1339 MachineInstr *MI = Br.MI;
1340 MachineBasicBlock *DestBB = MI->getOperand(0).getMBB();
1342 // Check to see if the DestBB is already in-range.
1343 if (BBIsInRange(MI, DestBB, Br.MaxDisp))
1347 return FixUpUnconditionalBr(MF, Br);
1348 return FixUpConditionalBr(MF, Br);
1351 /// FixUpUnconditionalBr - Fix up an unconditional branch whose destination is
1352 /// too far away to fit in its displacement field. If the LR register has been
1353 /// spilled in the epilogue, then we can use BL to implement a far jump.
1354 /// Otherwise, add an intermediate branch instruction to a branch.
1356 ARMConstantIslands::FixUpUnconditionalBr(MachineFunction &MF, ImmBranch &Br) {
1357 MachineInstr *MI = Br.MI;
1358 MachineBasicBlock *MBB = MI->getParent();
1360 llvm_unreachable("FixUpUnconditionalBr is Thumb1 only!");
1362 // Use BL to implement far jump.
1363 Br.MaxDisp = (1 << 21) * 2;
1364 MI->setDesc(TII->get(ARM::tBfar));
1365 BBSizes[MBB->getNumber()] += 2;
1366 AdjustBBOffsetsAfter(MBB, 2);
1370 DEBUG(errs() << " Changed B to long jump " << *MI);
1375 /// FixUpConditionalBr - Fix up a conditional branch whose destination is too
1376 /// far away to fit in its displacement field. It is converted to an inverse
1377 /// conditional branch + an unconditional branch to the destination.
1379 ARMConstantIslands::FixUpConditionalBr(MachineFunction &MF, ImmBranch &Br) {
1380 MachineInstr *MI = Br.MI;
1381 MachineBasicBlock *DestBB = MI->getOperand(0).getMBB();
1383 // Add an unconditional branch to the destination and invert the branch
1384 // condition to jump over it:
1390 ARMCC::CondCodes CC = (ARMCC::CondCodes)MI->getOperand(1).getImm();
1391 CC = ARMCC::getOppositeCondition(CC);
1392 unsigned CCReg = MI->getOperand(2).getReg();
1394 // If the branch is at the end of its MBB and that has a fall-through block,
1395 // direct the updated conditional branch to the fall-through block. Otherwise,
1396 // split the MBB before the next instruction.
1397 MachineBasicBlock *MBB = MI->getParent();
1398 MachineInstr *BMI = &MBB->back();
1399 bool NeedSplit = (BMI != MI) || !BBHasFallthrough(MBB);
1403 if (next(MachineBasicBlock::iterator(MI)) == prior(MBB->end()) &&
1404 BMI->getOpcode() == Br.UncondBr) {
1405 // Last MI in the BB is an unconditional branch. Can we simply invert the
1406 // condition and swap destinations:
1412 MachineBasicBlock *NewDest = BMI->getOperand(0).getMBB();
1413 if (BBIsInRange(MI, NewDest, Br.MaxDisp)) {
1414 DEBUG(errs() << " Invert Bcc condition and swap its destination with "
1416 BMI->getOperand(0).setMBB(DestBB);
1417 MI->getOperand(0).setMBB(NewDest);
1418 MI->getOperand(1).setImm(CC);
1425 SplitBlockBeforeInstr(MI);
1426 // No need for the branch to the next block. We're adding an unconditional
1427 // branch to the destination.
1428 int delta = TII->GetInstSizeInBytes(&MBB->back());
1429 BBSizes[MBB->getNumber()] -= delta;
1430 MachineBasicBlock* SplitBB = next(MachineFunction::iterator(MBB));
1431 AdjustBBOffsetsAfter(SplitBB, -delta);
1432 MBB->back().eraseFromParent();
1433 // BBOffsets[SplitBB] is wrong temporarily, fixed below
1435 MachineBasicBlock *NextBB = next(MachineFunction::iterator(MBB));
1437 DEBUG(errs() << " Insert B to BB#" << DestBB->getNumber()
1438 << " also invert condition and change dest. to BB#"
1439 << NextBB->getNumber() << "\n");
1441 // Insert a new conditional branch and a new unconditional branch.
1442 // Also update the ImmBranch as well as adding a new entry for the new branch.
1443 BuildMI(MBB, DebugLoc::getUnknownLoc(),
1444 TII->get(MI->getOpcode()))
1445 .addMBB(NextBB).addImm(CC).addReg(CCReg);
1446 Br.MI = &MBB->back();
1447 BBSizes[MBB->getNumber()] += TII->GetInstSizeInBytes(&MBB->back());
1448 BuildMI(MBB, DebugLoc::getUnknownLoc(), TII->get(Br.UncondBr)).addMBB(DestBB);
1449 BBSizes[MBB->getNumber()] += TII->GetInstSizeInBytes(&MBB->back());
1450 unsigned MaxDisp = getUnconditionalBrDisp(Br.UncondBr);
1451 ImmBranches.push_back(ImmBranch(&MBB->back(), MaxDisp, false, Br.UncondBr));
1453 // Remove the old conditional branch. It may or may not still be in MBB.
1454 BBSizes[MI->getParent()->getNumber()] -= TII->GetInstSizeInBytes(MI);
1455 MI->eraseFromParent();
1457 // The net size change is an addition of one unconditional branch.
1458 int delta = TII->GetInstSizeInBytes(&MBB->back());
1459 AdjustBBOffsetsAfter(MBB, delta);
1463 /// UndoLRSpillRestore - Remove Thumb push / pop instructions that only spills
1464 /// LR / restores LR to pc. FIXME: This is done here because it's only possible
1465 /// to do this if tBfar is not used.
1466 bool ARMConstantIslands::UndoLRSpillRestore() {
1467 bool MadeChange = false;
1468 for (unsigned i = 0, e = PushPopMIs.size(); i != e; ++i) {
1469 MachineInstr *MI = PushPopMIs[i];
1470 // First two operands are predicates, the third is a zero since there
1472 if (MI->getOpcode() == ARM::tPOP_RET &&
1473 MI->getOperand(3).getReg() == ARM::PC &&
1474 MI->getNumExplicitOperands() == 4) {
1475 BuildMI(MI->getParent(), MI->getDebugLoc(), TII->get(ARM::tBX_RET));
1476 MI->eraseFromParent();
1483 bool ARMConstantIslands::OptimizeThumb2Instructions(MachineFunction &MF) {
1484 bool MadeChange = false;
1486 // Shrink ADR and LDR from constantpool.
1487 for (unsigned i = 0, e = CPUsers.size(); i != e; ++i) {
1488 CPUser &U = CPUsers[i];
1489 unsigned Opcode = U.MI->getOpcode();
1490 unsigned NewOpc = 0;
1495 case ARM::t2LEApcrel:
1496 if (isARMLowRegister(U.MI->getOperand(0).getReg())) {
1497 NewOpc = ARM::tLEApcrel;
1503 if (isARMLowRegister(U.MI->getOperand(0).getReg())) {
1504 NewOpc = ARM::tLDRpci;
1514 unsigned UserOffset = GetOffsetOf(U.MI) + 4;
1515 unsigned MaxOffs = ((1 << Bits) - 1) * Scale;
1516 // FIXME: Check if offset is multiple of scale if scale is not 4.
1517 if (CPEIsInRange(U.MI, UserOffset, U.CPEMI, MaxOffs, false, true)) {
1518 U.MI->setDesc(TII->get(NewOpc));
1519 MachineBasicBlock *MBB = U.MI->getParent();
1520 BBSizes[MBB->getNumber()] -= 2;
1521 AdjustBBOffsetsAfter(MBB, -2);
1527 MadeChange |= OptimizeThumb2Branches(MF);
1528 MadeChange |= OptimizeThumb2JumpTables(MF);
1532 bool ARMConstantIslands::OptimizeThumb2Branches(MachineFunction &MF) {
1533 bool MadeChange = false;
1535 for (unsigned i = 0, e = ImmBranches.size(); i != e; ++i) {
1536 ImmBranch &Br = ImmBranches[i];
1537 unsigned Opcode = Br.MI->getOpcode();
1538 unsigned NewOpc = 0;
1556 unsigned MaxOffs = ((1 << (Bits-1))-1) * Scale;
1557 MachineBasicBlock *DestBB = Br.MI->getOperand(0).getMBB();
1558 if (BBIsInRange(Br.MI, DestBB, MaxOffs)) {
1559 Br.MI->setDesc(TII->get(NewOpc));
1560 MachineBasicBlock *MBB = Br.MI->getParent();
1561 BBSizes[MBB->getNumber()] -= 2;
1562 AdjustBBOffsetsAfter(MBB, -2);
1568 Opcode = Br.MI->getOpcode();
1569 if (Opcode != ARM::tBcc)
1573 unsigned PredReg = 0;
1574 ARMCC::CondCodes Pred = llvm::getInstrPredicate(Br.MI, PredReg);
1575 if (Pred == ARMCC::EQ)
1577 else if (Pred == ARMCC::NE)
1578 NewOpc = ARM::tCBNZ;
1581 MachineBasicBlock *DestBB = Br.MI->getOperand(0).getMBB();
1582 // Check if the distance is within 126. Subtract starting offset by 2
1583 // because the cmp will be eliminated.
1584 unsigned BrOffset = GetOffsetOf(Br.MI) + 4 - 2;
1585 unsigned DestOffset = BBOffsets[DestBB->getNumber()];
1586 if (BrOffset < DestOffset && (DestOffset - BrOffset) <= 126) {
1587 MachineBasicBlock::iterator CmpMI = Br.MI; --CmpMI;
1588 if (CmpMI->getOpcode() == ARM::tCMPzi8) {
1589 unsigned Reg = CmpMI->getOperand(0).getReg();
1590 Pred = llvm::getInstrPredicate(CmpMI, PredReg);
1591 if (Pred == ARMCC::AL &&
1592 CmpMI->getOperand(1).getImm() == 0 &&
1593 isARMLowRegister(Reg)) {
1594 MachineBasicBlock *MBB = Br.MI->getParent();
1595 MachineInstr *NewBR =
1596 BuildMI(*MBB, CmpMI, Br.MI->getDebugLoc(), TII->get(NewOpc))
1597 .addReg(Reg).addMBB(DestBB, Br.MI->getOperand(0).getTargetFlags());
1598 CmpMI->eraseFromParent();
1599 Br.MI->eraseFromParent();
1601 BBSizes[MBB->getNumber()] -= 2;
1602 AdjustBBOffsetsAfter(MBB, -2);
1613 /// OptimizeThumb2JumpTables - Use tbb / tbh instructions to generate smaller
1614 /// jumptables when it's possible.
1615 bool ARMConstantIslands::OptimizeThumb2JumpTables(MachineFunction &MF) {
1616 bool MadeChange = false;
1618 // FIXME: After the tables are shrunk, can we get rid some of the
1619 // constantpool tables?
1620 MachineJumpTableInfo *MJTI = MF.getJumpTableInfo();
1621 const std::vector<MachineJumpTableEntry> &JT = MJTI->getJumpTables();
1622 for (unsigned i = 0, e = T2JumpTables.size(); i != e; ++i) {
1623 MachineInstr *MI = T2JumpTables[i];
1624 const TargetInstrDesc &TID = MI->getDesc();
1625 unsigned NumOps = TID.getNumOperands();
1626 unsigned JTOpIdx = NumOps - (TID.isPredicable() ? 3 : 2);
1627 MachineOperand JTOP = MI->getOperand(JTOpIdx);
1628 unsigned JTI = JTOP.getIndex();
1629 assert(JTI < JT.size());
1632 bool HalfWordOk = true;
1633 unsigned JTOffset = GetOffsetOf(MI) + 4;
1634 const std::vector<MachineBasicBlock*> &JTBBs = JT[JTI].MBBs;
1635 for (unsigned j = 0, ee = JTBBs.size(); j != ee; ++j) {
1636 MachineBasicBlock *MBB = JTBBs[j];
1637 unsigned DstOffset = BBOffsets[MBB->getNumber()];
1638 // Negative offset is not ok. FIXME: We should change BB layout to make
1639 // sure all the branches are forward.
1640 if (ByteOk && (DstOffset - JTOffset) > ((1<<8)-1)*2)
1642 unsigned TBHLimit = ((1<<16)-1)*2;
1643 if (HalfWordOk && (DstOffset - JTOffset) > TBHLimit)
1645 if (!ByteOk && !HalfWordOk)
1649 if (ByteOk || HalfWordOk) {
1650 MachineBasicBlock *MBB = MI->getParent();
1651 unsigned BaseReg = MI->getOperand(0).getReg();
1652 bool BaseRegKill = MI->getOperand(0).isKill();
1655 unsigned IdxReg = MI->getOperand(1).getReg();
1656 bool IdxRegKill = MI->getOperand(1).isKill();
1657 MachineBasicBlock::iterator PrevI = MI;
1658 if (PrevI == MBB->begin())
1661 MachineInstr *AddrMI = --PrevI;
1663 // Examine the instruction that calculate the jumptable entry address.
1664 // If it's not the one just before the t2BR_JT, we won't delete it, then
1665 // it's not worth doing the optimization.
1666 for (unsigned k = 0, eee = AddrMI->getNumOperands(); k != eee; ++k) {
1667 const MachineOperand &MO = AddrMI->getOperand(k);
1668 if (!MO.isReg() || !MO.getReg())
1670 if (MO.isDef() && MO.getReg() != BaseReg) {
1674 if (MO.isUse() && !MO.isKill() && MO.getReg() != IdxReg) {
1682 // The previous instruction should be a tLEApcrel or t2LEApcrelJT, we want
1683 // to delete it as well.
1684 MachineInstr *LeaMI = --PrevI;
1685 if ((LeaMI->getOpcode() != ARM::tLEApcrelJT &&
1686 LeaMI->getOpcode() != ARM::t2LEApcrelJT) ||
1687 LeaMI->getOperand(0).getReg() != BaseReg)
1693 unsigned Opc = ByteOk ? ARM::t2TBB : ARM::t2TBH;
1694 MachineInstr *NewJTMI = BuildMI(MBB, MI->getDebugLoc(), TII->get(Opc))
1695 .addReg(IdxReg, getKillRegState(IdxRegKill))
1696 .addJumpTableIndex(JTI, JTOP.getTargetFlags())
1697 .addImm(MI->getOperand(JTOpIdx+1).getImm());
1698 // FIXME: Insert an "ALIGN" instruction to ensure the next instruction
1699 // is 2-byte aligned. For now, asm printer will fix it up.
1700 unsigned NewSize = TII->GetInstSizeInBytes(NewJTMI);
1701 unsigned OrigSize = TII->GetInstSizeInBytes(AddrMI);
1702 OrigSize += TII->GetInstSizeInBytes(LeaMI);
1703 OrigSize += TII->GetInstSizeInBytes(MI);
1705 AddrMI->eraseFromParent();
1706 LeaMI->eraseFromParent();
1707 MI->eraseFromParent();
1709 int delta = OrigSize - NewSize;
1710 BBSizes[MBB->getNumber()] -= delta;
1711 AdjustBBOffsetsAfter(MBB, -delta);
1721 /// ReorderThumb2JumpTables - Use tbb / tbh instructions to generate smaller
1722 /// jumptables when it's possible.
1723 bool ARMConstantIslands::ReorderThumb2JumpTables(MachineFunction &MF) {
1724 bool MadeChange = false;
1726 MachineJumpTableInfo *MJTI = MF.getJumpTableInfo();
1727 const std::vector<MachineJumpTableEntry> &JT = MJTI->getJumpTables();
1728 for (unsigned i = 0, e = T2JumpTables.size(); i != e; ++i) {
1729 MachineInstr *MI = T2JumpTables[i];
1730 const TargetInstrDesc &TID = MI->getDesc();
1731 unsigned NumOps = TID.getNumOperands();
1732 unsigned JTOpIdx = NumOps - (TID.isPredicable() ? 3 : 2);
1733 MachineOperand JTOP = MI->getOperand(JTOpIdx);
1734 unsigned JTI = JTOP.getIndex();
1735 assert(JTI < JT.size());
1737 // We prefer if target blocks for the jump table come after the jump
1738 // instruction so we can use TB[BH]. Loop through the target blocks
1739 // and try to adjust them such that that's true.
1740 unsigned JTOffset = GetOffsetOf(MI) + 4;
1741 const std::vector<MachineBasicBlock*> &JTBBs = JT[JTI].MBBs;
1742 for (unsigned j = 0, ee = JTBBs.size(); j != ee; ++j) {
1743 MachineBasicBlock *MBB = JTBBs[j];
1744 unsigned DstOffset = BBOffsets[MBB->getNumber()];
1746 if (DstOffset < JTOffset) {
1747 // The destination precedes the switch. Try to move the block forward
1748 // so we have a positive offset.
1749 MachineBasicBlock *NewBB =
1750 AdjustJTTargetBlockForward(MBB, MI->getParent());
1752 MJTI->ReplaceMBBInJumpTable(JTI, JTBBs[j], NewBB);
1761 MachineBasicBlock *ARMConstantIslands::
1762 AdjustJTTargetBlockForward(MachineBasicBlock *BB, MachineBasicBlock *JTBB)
1764 MachineFunction &MF = *BB->getParent();
1766 // FIXME: If it's a small block terminated by an unconditional branch,
1767 // try to move it; otherwise, create a new block following the jump
1768 // table that branches back to the actual target. This is an overly
1769 // simplistic heuristic here for proof-of-concept.
1771 int BBI = BB->getNumber();
1772 int Size = BBSizes[BBI];
1773 MachineBasicBlock *TBB = 0, *FBB = 0;
1774 SmallVector<MachineOperand, 4> Cond;
1775 // If the block is small and ends in an unconditional branch, move it.
1776 if (Size < 50 && Cond.empty()) {
1777 // If the block terminator isn't analyzable, don't try to move the block
1778 if (TII->AnalyzeBranch(*BB, TBB, FBB, Cond))
1781 MachineFunction::iterator OldPrior = prior(BB);
1782 BB->moveAfter(JTBB);
1783 OldPrior->updateTerminator();
1784 BB->updateTerminator();
1789 // Create a new MBB for the code after the jump BB.
1790 MachineBasicBlock *NewBB =
1791 MF.CreateMachineBasicBlock(JTBB->getBasicBlock());
1792 MachineFunction::iterator MBBI = JTBB; ++MBBI;
1793 MF.insert(MBBI, NewBB);
1795 // Add an unconditional branch from NewBB to BB.
1796 // There doesn't seem to be meaningful DebugInfo available; this doesn't
1797 // correspond directly to anything in the source.
1798 assert (isThumb2 && "Adjusting for TB[BH] but not in Thumb2?");
1799 BuildMI(NewBB, DebugLoc::getUnknownLoc(), TII->get(ARM::t2B)).addMBB(BB);
1801 // Update internal data structures to account for the newly inserted MBB.
1802 MF.RenumberBlocks(NewBB);
1805 NewBB->addSuccessor(BB);
1806 JTBB->removeSuccessor(BB);
1807 JTBB->addSuccessor(NewBB);
1809 // Insert a size into BBSizes to align it properly with the (newly
1810 // renumbered) block numbers.
1811 BBSizes.insert(BBSizes.begin()+NewBB->getNumber(), 0);
1813 // Likewise for BBOffsets.
1814 BBOffsets.insert(BBOffsets.begin()+NewBB->getNumber(), 0);
1816 // Figure out how large the first NewMBB is.
1817 unsigned NewBBSize = 0;
1818 for (MachineBasicBlock::iterator I = NewBB->begin(), E = NewBB->end();
1820 NewBBSize += TII->GetInstSizeInBytes(I);
1822 unsigned NewBBI = NewBB->getNumber();
1823 unsigned JTBBI = JTBB->getNumber();
1824 // Set the size of NewBB in BBSizes.
1825 BBSizes[NewBBI] = NewBBSize;
1827 // ...and adjust BBOffsets for NewBB accordingly.
1828 BBOffsets[NewBBI] = BBOffsets[JTBBI] + BBSizes[JTBBI];
1830 // All BBOffsets following these blocks must be modified.
1831 AdjustBBOffsetsAfter(NewBB, 4);