1 //===-- ARMConstantIslandPass.cpp - ARM constant islands --------*- C++ -*-===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file contains a pass that splits the constant pool up into 'islands'
11 // which are scattered through-out the function. This is required due to the
12 // limited pc-relative displacements that ARM has.
14 //===----------------------------------------------------------------------===//
16 #define DEBUG_TYPE "arm-cp-islands"
18 #include "ARMAddressingModes.h"
19 #include "ARMMachineFunctionInfo.h"
20 #include "ARMInstrInfo.h"
21 #include "llvm/CodeGen/MachineConstantPool.h"
22 #include "llvm/CodeGen/MachineFunctionPass.h"
23 #include "llvm/CodeGen/MachineInstrBuilder.h"
24 #include "llvm/CodeGen/MachineJumpTableInfo.h"
25 #include "llvm/Target/TargetData.h"
26 #include "llvm/Target/TargetMachine.h"
27 #include "llvm/Support/Compiler.h"
28 #include "llvm/Support/Debug.h"
29 #include "llvm/Support/ErrorHandling.h"
30 #include "llvm/ADT/SmallVector.h"
31 #include "llvm/ADT/STLExtras.h"
32 #include "llvm/ADT/Statistic.h"
35 STATISTIC(NumCPEs, "Number of constpool entries");
36 STATISTIC(NumSplit, "Number of uncond branches inserted");
37 STATISTIC(NumCBrFixed, "Number of cond branches fixed");
38 STATISTIC(NumUBrFixed, "Number of uncond branches fixed");
39 STATISTIC(NumTBs, "Number of table branches generated");
42 /// ARMConstantIslands - Due to limited PC-relative displacements, ARM
43 /// requires constant pool entries to be scattered among the instructions
44 /// inside a function. To do this, it completely ignores the normal LLVM
45 /// constant pool; instead, it places constants wherever it feels like with
46 /// special instructions.
48 /// The terminology used in this pass includes:
49 /// Islands - Clumps of constants placed in the function.
50 /// Water - Potential places where an island could be formed.
51 /// CPE - A constant pool entry that has been placed somewhere, which
52 /// tracks a list of users.
53 class VISIBILITY_HIDDEN ARMConstantIslands : public MachineFunctionPass {
54 /// BBSizes - The size of each MachineBasicBlock in bytes of code, indexed
55 /// by MBB Number. The two-byte pads required for Thumb alignment are
56 /// counted as part of the following block (i.e., the offset and size for
57 /// a padded block will both be ==2 mod 4).
58 std::vector<unsigned> BBSizes;
60 /// BBOffsets - the offset of each MBB in bytes, starting from 0.
61 /// The two-byte pads required for Thumb alignment are counted as part of
62 /// the following block.
63 std::vector<unsigned> BBOffsets;
65 /// WaterList - A sorted list of basic blocks where islands could be placed
66 /// (i.e. blocks that don't fall through to the following block, due
67 /// to a return, unreachable, or unconditional branch).
68 std::vector<MachineBasicBlock*> WaterList;
70 /// CPUser - One user of a constant pool, keeping the machine instruction
71 /// pointer, the constant pool being referenced, and the max displacement
72 /// allowed from the instruction to the CP.
79 CPUser(MachineInstr *mi, MachineInstr *cpemi, unsigned maxdisp,
81 : MI(mi), CPEMI(cpemi), MaxDisp(maxdisp), NegOk(neg), IsSoImm(soimm) {}
84 /// CPUsers - Keep track of all of the machine instructions that use various
85 /// constant pools and their max displacement.
86 std::vector<CPUser> CPUsers;
88 /// CPEntry - One per constant pool entry, keeping the machine instruction
89 /// pointer, the constpool index, and the number of CPUser's which
90 /// reference this entry.
95 CPEntry(MachineInstr *cpemi, unsigned cpi, unsigned rc = 0)
96 : CPEMI(cpemi), CPI(cpi), RefCount(rc) {}
99 /// CPEntries - Keep track of all of the constant pool entry machine
100 /// instructions. For each original constpool index (i.e. those that
101 /// existed upon entry to this pass), it keeps a vector of entries.
102 /// Original elements are cloned as we go along; the clones are
103 /// put in the vector of the original element, but have distinct CPIs.
104 std::vector<std::vector<CPEntry> > CPEntries;
106 /// ImmBranch - One per immediate branch, keeping the machine instruction
107 /// pointer, conditional or unconditional, the max displacement,
108 /// and (if isCond is true) the corresponding unconditional branch
112 unsigned MaxDisp : 31;
115 ImmBranch(MachineInstr *mi, unsigned maxdisp, bool cond, int ubr)
116 : MI(mi), MaxDisp(maxdisp), isCond(cond), UncondBr(ubr) {}
119 /// ImmBranches - Keep track of all the immediate branch instructions.
121 std::vector<ImmBranch> ImmBranches;
123 /// PushPopMIs - Keep track of all the Thumb push / pop instructions.
125 SmallVector<MachineInstr*, 4> PushPopMIs;
127 /// T2JumpTables - Keep track of all the Thumb2 jumptable instructions.
128 SmallVector<MachineInstr*, 4> T2JumpTables;
130 /// HasFarJump - True if any far jump instruction has been emitted during
131 /// the branch fix up pass.
134 const TargetInstrInfo *TII;
135 ARMFunctionInfo *AFI;
141 ARMConstantIslands() : MachineFunctionPass(&ID) {}
143 virtual bool runOnMachineFunction(MachineFunction &MF);
145 virtual const char *getPassName() const {
146 return "ARM constant island placement and branch shortening pass";
150 void DoInitialPlacement(MachineFunction &MF,
151 std::vector<MachineInstr*> &CPEMIs);
152 CPEntry *findConstPoolEntry(unsigned CPI, const MachineInstr *CPEMI);
153 void InitialFunctionScan(MachineFunction &MF,
154 const std::vector<MachineInstr*> &CPEMIs);
155 MachineBasicBlock *SplitBlockBeforeInstr(MachineInstr *MI);
156 void UpdateForInsertedWaterBlock(MachineBasicBlock *NewBB);
157 void AdjustBBOffsetsAfter(MachineBasicBlock *BB, int delta);
158 bool DecrementOldEntry(unsigned CPI, MachineInstr* CPEMI);
159 int LookForExistingCPEntry(CPUser& U, unsigned UserOffset);
160 bool LookForWater(CPUser&U, unsigned UserOffset,
161 MachineBasicBlock** NewMBB);
162 MachineBasicBlock* AcceptWater(MachineBasicBlock *WaterBB,
163 std::vector<MachineBasicBlock*>::iterator IP);
164 void CreateNewWater(unsigned CPUserIndex, unsigned UserOffset,
165 MachineBasicBlock** NewMBB);
166 bool HandleConstantPoolUser(MachineFunction &MF, unsigned CPUserIndex);
167 void RemoveDeadCPEMI(MachineInstr *CPEMI);
168 bool RemoveUnusedCPEntries();
169 bool CPEIsInRange(MachineInstr *MI, unsigned UserOffset,
170 MachineInstr *CPEMI, unsigned Disp, bool NegOk,
171 bool DoDump = false);
172 bool WaterIsInRange(unsigned UserOffset, MachineBasicBlock *Water,
174 bool OffsetIsInRange(unsigned UserOffset, unsigned TrialOffset,
175 unsigned Disp, bool NegativeOK, bool IsSoImm = false);
176 bool BBIsInRange(MachineInstr *MI, MachineBasicBlock *BB, unsigned Disp);
177 bool FixUpImmediateBr(MachineFunction &MF, ImmBranch &Br);
178 bool FixUpConditionalBr(MachineFunction &MF, ImmBranch &Br);
179 bool FixUpUnconditionalBr(MachineFunction &MF, ImmBranch &Br);
180 bool UndoLRSpillRestore();
181 bool OptimizeThumb2JumpTables(MachineFunction &MF);
183 unsigned GetOffsetOf(MachineInstr *MI) const;
185 void verify(MachineFunction &MF);
187 char ARMConstantIslands::ID = 0;
190 /// verify - check BBOffsets, BBSizes, alignment of islands
191 void ARMConstantIslands::verify(MachineFunction &MF) {
192 assert(BBOffsets.size() == BBSizes.size());
193 for (unsigned i = 1, e = BBOffsets.size(); i != e; ++i)
194 assert(BBOffsets[i-1]+BBSizes[i-1] == BBOffsets[i]);
198 for (MachineFunction::iterator MBBI = MF.begin(), E = MF.end();
200 MachineBasicBlock *MBB = MBBI;
202 MBB->begin()->getOpcode() == ARM::CONSTPOOL_ENTRY) {
203 unsigned MBBId = MBB->getNumber();
204 assert((BBOffsets[MBBId]%4 == 0 && BBSizes[MBBId]%4 == 0) ||
205 (BBOffsets[MBBId]%4 != 0 && BBSizes[MBBId]%4 != 0));
211 /// print block size and offset information - debugging
212 void ARMConstantIslands::dumpBBs() {
213 for (unsigned J = 0, E = BBOffsets.size(); J !=E; ++J) {
214 DOUT << "block " << J << " offset " << BBOffsets[J] <<
215 " size " << BBSizes[J] << "\n";
219 /// createARMConstantIslandPass - returns an instance of the constpool
221 FunctionPass *llvm::createARMConstantIslandPass() {
222 return new ARMConstantIslands();
225 bool ARMConstantIslands::runOnMachineFunction(MachineFunction &MF) {
226 MachineConstantPool &MCP = *MF.getConstantPool();
228 TII = MF.getTarget().getInstrInfo();
229 AFI = MF.getInfo<ARMFunctionInfo>();
230 isThumb = AFI->isThumbFunction();
231 isThumb1 = AFI->isThumb1OnlyFunction();
232 isThumb2 = AFI->isThumb2Function();
236 // Renumber all of the machine basic blocks in the function, guaranteeing that
237 // the numbers agree with the position of the block in the function.
240 // Thumb1 functions containing constant pools get 2-byte alignment.
241 // This is so we can keep exact track of where the alignment padding goes.
243 // Set default. Thumb1 function is 1-byte aligned, ARM and Thumb2 are 2-byte
245 AFI->setAlign(isThumb1 ? 1U : 2U);
247 // Perform the initial placement of the constant pool entries. To start with,
248 // we put them all at the end of the function.
249 std::vector<MachineInstr*> CPEMIs;
250 if (!MCP.isEmpty()) {
251 DoInitialPlacement(MF, CPEMIs);
256 /// The next UID to take is the first unused one.
257 AFI->initConstPoolEntryUId(CPEMIs.size());
259 // Do the initial scan of the function, building up information about the
260 // sizes of each block, the location of all the water, and finding all of the
261 // constant pool users.
262 InitialFunctionScan(MF, CPEMIs);
265 /// Remove dead constant pool entries.
266 RemoveUnusedCPEntries();
268 // Iteratively place constant pool entries and fix up branches until there
270 bool MadeChange = false;
273 for (unsigned i = 0, e = CPUsers.size(); i != e; ++i)
274 Change |= HandleConstantPoolUser(MF, i);
276 for (unsigned i = 0, e = ImmBranches.size(); i != e; ++i)
277 Change |= FixUpImmediateBr(MF, ImmBranches[i]);
284 // After a while, this might be made debug-only, but it is not expensive.
287 // If LR has been forced spilled and no far jumps (i.e. BL) has been issued.
288 // Undo the spill / restore of LR if possible.
289 if (isThumb && !HasFarJump && AFI->isLRSpilledForFarJump())
290 MadeChange |= UndoLRSpillRestore();
292 // Let's see if we can use tbb / tbh to do jump tables.
293 MadeChange |= OptimizeThumb2JumpTables(MF);
302 T2JumpTables.clear();
307 /// DoInitialPlacement - Perform the initial placement of the constant pool
308 /// entries. To start with, we put them all at the end of the function.
309 void ARMConstantIslands::DoInitialPlacement(MachineFunction &MF,
310 std::vector<MachineInstr*> &CPEMIs) {
311 // Create the basic block to hold the CPE's.
312 MachineBasicBlock *BB = MF.CreateMachineBasicBlock();
315 // Add all of the constants from the constant pool to the end block, use an
316 // identity mapping of CPI's to CPE's.
317 const std::vector<MachineConstantPoolEntry> &CPs =
318 MF.getConstantPool()->getConstants();
320 const TargetData &TD = *MF.getTarget().getTargetData();
321 for (unsigned i = 0, e = CPs.size(); i != e; ++i) {
322 unsigned Size = TD.getTypeAllocSize(CPs[i].getType());
323 // Verify that all constant pool entries are a multiple of 4 bytes. If not,
324 // we would have to pad them out or something so that instructions stay
326 assert((Size & 3) == 0 && "CP Entry not multiple of 4 bytes!");
327 MachineInstr *CPEMI =
328 BuildMI(BB, DebugLoc::getUnknownLoc(), TII->get(ARM::CONSTPOOL_ENTRY))
329 .addImm(i).addConstantPoolIndex(i).addImm(Size);
330 CPEMIs.push_back(CPEMI);
332 // Add a new CPEntry, but no corresponding CPUser yet.
333 std::vector<CPEntry> CPEs;
334 CPEs.push_back(CPEntry(CPEMI, i));
335 CPEntries.push_back(CPEs);
337 DOUT << "Moved CPI#" << i << " to end of function as #" << i << "\n";
341 /// BBHasFallthrough - Return true if the specified basic block can fallthrough
342 /// into the block immediately after it.
343 static bool BBHasFallthrough(MachineBasicBlock *MBB) {
344 // Get the next machine basic block in the function.
345 MachineFunction::iterator MBBI = MBB;
346 if (next(MBBI) == MBB->getParent()->end()) // Can't fall off end of function.
349 MachineBasicBlock *NextBB = next(MBBI);
350 for (MachineBasicBlock::succ_iterator I = MBB->succ_begin(),
351 E = MBB->succ_end(); I != E; ++I)
358 /// findConstPoolEntry - Given the constpool index and CONSTPOOL_ENTRY MI,
359 /// look up the corresponding CPEntry.
360 ARMConstantIslands::CPEntry
361 *ARMConstantIslands::findConstPoolEntry(unsigned CPI,
362 const MachineInstr *CPEMI) {
363 std::vector<CPEntry> &CPEs = CPEntries[CPI];
364 // Number of entries per constpool index should be small, just do a
366 for (unsigned i = 0, e = CPEs.size(); i != e; ++i) {
367 if (CPEs[i].CPEMI == CPEMI)
373 /// InitialFunctionScan - Do the initial scan of the function, building up
374 /// information about the sizes of each block, the location of all the water,
375 /// and finding all of the constant pool users.
376 void ARMConstantIslands::InitialFunctionScan(MachineFunction &MF,
377 const std::vector<MachineInstr*> &CPEMIs) {
379 for (MachineFunction::iterator MBBI = MF.begin(), E = MF.end();
381 MachineBasicBlock &MBB = *MBBI;
383 // If this block doesn't fall through into the next MBB, then this is
384 // 'water' that a constant pool island could be placed.
385 if (!BBHasFallthrough(&MBB))
386 WaterList.push_back(&MBB);
388 unsigned MBBSize = 0;
389 for (MachineBasicBlock::iterator I = MBB.begin(), E = MBB.end();
391 // Add instruction size to MBBSize.
392 MBBSize += TII->GetInstSizeInBytes(I);
394 int Opc = I->getOpcode();
395 if (I->getDesc().isBranch()) {
402 continue; // Ignore other JT branches
404 // A Thumb1 table jump may involve padding; for the offsets to
405 // be right, functions containing these must be 4-byte aligned.
407 if ((Offset+MBBSize)%4 != 0)
408 // FIXME: Add a pseudo ALIGN instruction instead.
409 MBBSize += 2; // padding
410 continue; // Does not get an entry in ImmBranches
412 T2JumpTables.push_back(I);
413 continue; // Does not get an entry in ImmBranches
444 // Record this immediate branch.
445 unsigned MaxOffs = ((1 << (Bits-1))-1) * Scale;
446 ImmBranches.push_back(ImmBranch(I, MaxOffs, isCond, UOpc));
449 if (Opc == ARM::tPUSH || Opc == ARM::tPOP_RET)
450 PushPopMIs.push_back(I);
452 if (Opc == ARM::CONSTPOOL_ENTRY)
455 // Scan the instructions for constant pool operands.
456 for (unsigned op = 0, e = I->getNumOperands(); op != e; ++op)
457 if (I->getOperand(op).isCPI()) {
458 // We found one. The addressing mode tells us the max displacement
459 // from the PC that this instruction permits.
461 // Basic size info comes from the TSFlags field.
465 bool IsSoImm = false;
469 llvm_unreachable("Unknown addressing mode for CP reference!");
472 // Taking the address of a CP entry.
474 // This takes a SoImm, which is 8 bit immediate rotated. We'll
475 // pretend the maximum offset is 255 * 4. Since each instruction
476 // 4 byte wide, this is always correct. We'llc heck for other
477 // displacements that fits in a SoImm as well.
483 case ARM::t2LEApcrel:
495 Bits = 12; // +-offset_12
502 Scale = 4; // +(offset_8*4)
508 Scale = 4; // +-(offset_8*4)
513 // Remember that this is a user of a CP entry.
514 unsigned CPI = I->getOperand(op).getIndex();
515 MachineInstr *CPEMI = CPEMIs[CPI];
516 unsigned MaxOffs = ((1 << Bits)-1) * Scale;
517 CPUsers.push_back(CPUser(I, CPEMI, MaxOffs, NegOk, IsSoImm));
519 // Increment corresponding CPEntry reference count.
520 CPEntry *CPE = findConstPoolEntry(CPI, CPEMI);
521 assert(CPE && "Cannot find a corresponding CPEntry!");
524 // Instructions can only use one CP entry, don't bother scanning the
525 // rest of the operands.
530 // In thumb mode, if this block is a constpool island, we may need padding
531 // so it's aligned on 4 byte boundary.
534 MBB.begin()->getOpcode() == ARM::CONSTPOOL_ENTRY &&
538 BBSizes.push_back(MBBSize);
539 BBOffsets.push_back(Offset);
544 /// GetOffsetOf - Return the current offset of the specified machine instruction
545 /// from the start of the function. This offset changes as stuff is moved
546 /// around inside the function.
547 unsigned ARMConstantIslands::GetOffsetOf(MachineInstr *MI) const {
548 MachineBasicBlock *MBB = MI->getParent();
550 // The offset is composed of two things: the sum of the sizes of all MBB's
551 // before this instruction's block, and the offset from the start of the block
553 unsigned Offset = BBOffsets[MBB->getNumber()];
555 // If we're looking for a CONSTPOOL_ENTRY in Thumb, see if this block has
556 // alignment padding, and compensate if so.
558 MI->getOpcode() == ARM::CONSTPOOL_ENTRY &&
562 // Sum instructions before MI in MBB.
563 for (MachineBasicBlock::iterator I = MBB->begin(); ; ++I) {
564 assert(I != MBB->end() && "Didn't find MI in its own basic block?");
565 if (&*I == MI) return Offset;
566 Offset += TII->GetInstSizeInBytes(I);
570 /// CompareMBBNumbers - Little predicate function to sort the WaterList by MBB
572 static bool CompareMBBNumbers(const MachineBasicBlock *LHS,
573 const MachineBasicBlock *RHS) {
574 return LHS->getNumber() < RHS->getNumber();
577 /// UpdateForInsertedWaterBlock - When a block is newly inserted into the
578 /// machine function, it upsets all of the block numbers. Renumber the blocks
579 /// and update the arrays that parallel this numbering.
580 void ARMConstantIslands::UpdateForInsertedWaterBlock(MachineBasicBlock *NewBB) {
581 // Renumber the MBB's to keep them consequtive.
582 NewBB->getParent()->RenumberBlocks(NewBB);
584 // Insert a size into BBSizes to align it properly with the (newly
585 // renumbered) block numbers.
586 BBSizes.insert(BBSizes.begin()+NewBB->getNumber(), 0);
588 // Likewise for BBOffsets.
589 BBOffsets.insert(BBOffsets.begin()+NewBB->getNumber(), 0);
591 // Next, update WaterList. Specifically, we need to add NewMBB as having
592 // available water after it.
593 std::vector<MachineBasicBlock*>::iterator IP =
594 std::lower_bound(WaterList.begin(), WaterList.end(), NewBB,
596 WaterList.insert(IP, NewBB);
600 /// Split the basic block containing MI into two blocks, which are joined by
601 /// an unconditional branch. Update datastructures and renumber blocks to
602 /// account for this change and returns the newly created block.
603 MachineBasicBlock *ARMConstantIslands::SplitBlockBeforeInstr(MachineInstr *MI) {
604 MachineBasicBlock *OrigBB = MI->getParent();
605 MachineFunction &MF = *OrigBB->getParent();
607 // Create a new MBB for the code after the OrigBB.
608 MachineBasicBlock *NewBB =
609 MF.CreateMachineBasicBlock(OrigBB->getBasicBlock());
610 MachineFunction::iterator MBBI = OrigBB; ++MBBI;
611 MF.insert(MBBI, NewBB);
613 // Splice the instructions starting with MI over to NewBB.
614 NewBB->splice(NewBB->end(), OrigBB, MI, OrigBB->end());
616 // Add an unconditional branch from OrigBB to NewBB.
617 // Note the new unconditional branch is not being recorded.
618 // There doesn't seem to be meaningful DebugInfo available; this doesn't
619 // correspond to anything in the source.
620 unsigned Opc = isThumb ? (isThumb2 ? ARM::t2B : ARM::tB) : ARM::B;
621 BuildMI(OrigBB, DebugLoc::getUnknownLoc(), TII->get(Opc)).addMBB(NewBB);
624 // Update the CFG. All succs of OrigBB are now succs of NewBB.
625 while (!OrigBB->succ_empty()) {
626 MachineBasicBlock *Succ = *OrigBB->succ_begin();
627 OrigBB->removeSuccessor(Succ);
628 NewBB->addSuccessor(Succ);
630 // This pass should be run after register allocation, so there should be no
631 // PHI nodes to update.
632 assert((Succ->empty() || Succ->begin()->getOpcode() != TargetInstrInfo::PHI)
633 && "PHI nodes should be eliminated by now!");
636 // OrigBB branches to NewBB.
637 OrigBB->addSuccessor(NewBB);
639 // Update internal data structures to account for the newly inserted MBB.
640 // This is almost the same as UpdateForInsertedWaterBlock, except that
641 // the Water goes after OrigBB, not NewBB.
642 MF.RenumberBlocks(NewBB);
644 // Insert a size into BBSizes to align it properly with the (newly
645 // renumbered) block numbers.
646 BBSizes.insert(BBSizes.begin()+NewBB->getNumber(), 0);
648 // Likewise for BBOffsets.
649 BBOffsets.insert(BBOffsets.begin()+NewBB->getNumber(), 0);
651 // Next, update WaterList. Specifically, we need to add OrigMBB as having
652 // available water after it (but not if it's already there, which happens
653 // when splitting before a conditional branch that is followed by an
654 // unconditional branch - in that case we want to insert NewBB).
655 std::vector<MachineBasicBlock*>::iterator IP =
656 std::lower_bound(WaterList.begin(), WaterList.end(), OrigBB,
658 MachineBasicBlock* WaterBB = *IP;
659 if (WaterBB == OrigBB)
660 WaterList.insert(next(IP), NewBB);
662 WaterList.insert(IP, OrigBB);
664 // Figure out how large the first NewMBB is. (It cannot
665 // contain a constpool_entry or tablejump.)
666 unsigned NewBBSize = 0;
667 for (MachineBasicBlock::iterator I = NewBB->begin(), E = NewBB->end();
669 NewBBSize += TII->GetInstSizeInBytes(I);
671 unsigned OrigBBI = OrigBB->getNumber();
672 unsigned NewBBI = NewBB->getNumber();
673 // Set the size of NewBB in BBSizes.
674 BBSizes[NewBBI] = NewBBSize;
676 // We removed instructions from UserMBB, subtract that off from its size.
677 // Add 2 or 4 to the block to count the unconditional branch we added to it.
678 unsigned delta = isThumb1 ? 2 : 4;
679 BBSizes[OrigBBI] -= NewBBSize - delta;
681 // ...and adjust BBOffsets for NewBB accordingly.
682 BBOffsets[NewBBI] = BBOffsets[OrigBBI] + BBSizes[OrigBBI];
684 // All BBOffsets following these blocks must be modified.
685 AdjustBBOffsetsAfter(NewBB, delta);
690 /// OffsetIsInRange - Checks whether UserOffset (the location of a constant pool
691 /// reference) is within MaxDisp of TrialOffset (a proposed location of a
692 /// constant pool entry).
693 bool ARMConstantIslands::OffsetIsInRange(unsigned UserOffset,
694 unsigned TrialOffset, unsigned MaxDisp,
695 bool NegativeOK, bool IsSoImm) {
696 // On Thumb offsets==2 mod 4 are rounded down by the hardware for
697 // purposes of the displacement computation; compensate for that here.
698 // Effectively, the valid range of displacements is 2 bytes smaller for such
700 if (isThumb && UserOffset%4 !=0)
702 // CPEs will be rounded up to a multiple of 4.
703 if (isThumb && TrialOffset%4 != 0)
706 if (UserOffset <= TrialOffset) {
707 // User before the Trial.
708 if (TrialOffset - UserOffset <= MaxDisp)
710 // FIXME: Make use full range of soimm values.
711 } else if (NegativeOK) {
712 if (UserOffset - TrialOffset <= MaxDisp)
714 // FIXME: Make use full range of soimm values.
719 /// WaterIsInRange - Returns true if a CPE placed after the specified
720 /// Water (a basic block) will be in range for the specific MI.
722 bool ARMConstantIslands::WaterIsInRange(unsigned UserOffset,
723 MachineBasicBlock* Water, CPUser &U) {
724 unsigned MaxDisp = U.MaxDisp;
725 unsigned CPEOffset = BBOffsets[Water->getNumber()] +
726 BBSizes[Water->getNumber()];
728 // If the CPE is to be inserted before the instruction, that will raise
729 // the offset of the instruction. (Currently applies only to ARM, so
730 // no alignment compensation attempted here.)
731 if (CPEOffset < UserOffset)
732 UserOffset += U.CPEMI->getOperand(2).getImm();
734 return OffsetIsInRange(UserOffset, CPEOffset, MaxDisp, U.NegOk, U.IsSoImm);
737 /// CPEIsInRange - Returns true if the distance between specific MI and
738 /// specific ConstPool entry instruction can fit in MI's displacement field.
739 bool ARMConstantIslands::CPEIsInRange(MachineInstr *MI, unsigned UserOffset,
740 MachineInstr *CPEMI, unsigned MaxDisp,
741 bool NegOk, bool DoDump) {
742 unsigned CPEOffset = GetOffsetOf(CPEMI);
743 assert(CPEOffset%4 == 0 && "Misaligned CPE");
746 DOUT << "User of CPE#" << CPEMI->getOperand(0).getImm()
747 << " max delta=" << MaxDisp
748 << " insn address=" << UserOffset
749 << " CPE address=" << CPEOffset
750 << " offset=" << int(CPEOffset-UserOffset) << "\t" << *MI;
753 return OffsetIsInRange(UserOffset, CPEOffset, MaxDisp, NegOk);
757 /// BBIsJumpedOver - Return true of the specified basic block's only predecessor
758 /// unconditionally branches to its only successor.
759 static bool BBIsJumpedOver(MachineBasicBlock *MBB) {
760 if (MBB->pred_size() != 1 || MBB->succ_size() != 1)
763 MachineBasicBlock *Succ = *MBB->succ_begin();
764 MachineBasicBlock *Pred = *MBB->pred_begin();
765 MachineInstr *PredMI = &Pred->back();
766 if (PredMI->getOpcode() == ARM::B || PredMI->getOpcode() == ARM::tB
767 || PredMI->getOpcode() == ARM::t2B)
768 return PredMI->getOperand(0).getMBB() == Succ;
773 void ARMConstantIslands::AdjustBBOffsetsAfter(MachineBasicBlock *BB,
775 MachineFunction::iterator MBBI = BB; MBBI = next(MBBI);
776 for(unsigned i = BB->getNumber()+1, e = BB->getParent()->getNumBlockIDs();
778 BBOffsets[i] += delta;
779 // If some existing blocks have padding, adjust the padding as needed, a
780 // bit tricky. delta can be negative so don't use % on that.
783 MachineBasicBlock *MBB = MBBI;
785 // Constant pool entries require padding.
786 if (MBB->begin()->getOpcode() == ARM::CONSTPOOL_ENTRY) {
787 unsigned oldOffset = BBOffsets[i] - delta;
788 if (oldOffset%4==0 && BBOffsets[i]%4!=0) {
792 } else if (oldOffset%4!=0 && BBOffsets[i]%4==0) {
793 // remove existing padding
798 // Thumb1 jump tables require padding. They should be at the end;
799 // following unconditional branches are removed by AnalyzeBranch.
800 MachineInstr *ThumbJTMI = prior(MBB->end());
801 if (ThumbJTMI->getOpcode() == ARM::tBR_JTr) {
802 unsigned newMIOffset = GetOffsetOf(ThumbJTMI);
803 unsigned oldMIOffset = newMIOffset - delta;
804 if (oldMIOffset%4 == 0 && newMIOffset%4 != 0) {
805 // remove existing padding
808 } else if (oldMIOffset%4 != 0 && newMIOffset%4 == 0) {
821 /// DecrementOldEntry - find the constant pool entry with index CPI
822 /// and instruction CPEMI, and decrement its refcount. If the refcount
823 /// becomes 0 remove the entry and instruction. Returns true if we removed
824 /// the entry, false if we didn't.
826 bool ARMConstantIslands::DecrementOldEntry(unsigned CPI, MachineInstr *CPEMI) {
827 // Find the old entry. Eliminate it if it is no longer used.
828 CPEntry *CPE = findConstPoolEntry(CPI, CPEMI);
829 assert(CPE && "Unexpected!");
830 if (--CPE->RefCount == 0) {
831 RemoveDeadCPEMI(CPEMI);
839 /// LookForCPEntryInRange - see if the currently referenced CPE is in range;
840 /// if not, see if an in-range clone of the CPE is in range, and if so,
841 /// change the data structures so the user references the clone. Returns:
842 /// 0 = no existing entry found
843 /// 1 = entry found, and there were no code insertions or deletions
844 /// 2 = entry found, and there were code insertions or deletions
845 int ARMConstantIslands::LookForExistingCPEntry(CPUser& U, unsigned UserOffset)
847 MachineInstr *UserMI = U.MI;
848 MachineInstr *CPEMI = U.CPEMI;
850 // Check to see if the CPE is already in-range.
851 if (CPEIsInRange(UserMI, UserOffset, CPEMI, U.MaxDisp, U.NegOk, true)) {
852 DOUT << "In range\n";
856 // No. Look for previously created clones of the CPE that are in range.
857 unsigned CPI = CPEMI->getOperand(1).getIndex();
858 std::vector<CPEntry> &CPEs = CPEntries[CPI];
859 for (unsigned i = 0, e = CPEs.size(); i != e; ++i) {
860 // We already tried this one
861 if (CPEs[i].CPEMI == CPEMI)
863 // Removing CPEs can leave empty entries, skip
864 if (CPEs[i].CPEMI == NULL)
866 if (CPEIsInRange(UserMI, UserOffset, CPEs[i].CPEMI, U.MaxDisp, U.NegOk)) {
867 DOUT << "Replacing CPE#" << CPI << " with CPE#" << CPEs[i].CPI << "\n";
868 // Point the CPUser node to the replacement
869 U.CPEMI = CPEs[i].CPEMI;
870 // Change the CPI in the instruction operand to refer to the clone.
871 for (unsigned j = 0, e = UserMI->getNumOperands(); j != e; ++j)
872 if (UserMI->getOperand(j).isCPI()) {
873 UserMI->getOperand(j).setIndex(CPEs[i].CPI);
876 // Adjust the refcount of the clone...
878 // ...and the original. If we didn't remove the old entry, none of the
879 // addresses changed, so we don't need another pass.
880 return DecrementOldEntry(CPI, CPEMI) ? 2 : 1;
886 /// getUnconditionalBrDisp - Returns the maximum displacement that can fit in
887 /// the specific unconditional branch instruction.
888 static inline unsigned getUnconditionalBrDisp(int Opc) {
891 return ((1<<10)-1)*2;
893 return ((1<<23)-1)*2;
898 return ((1<<23)-1)*4;
901 /// AcceptWater - Small amount of common code factored out of the following.
903 MachineBasicBlock* ARMConstantIslands::AcceptWater(MachineBasicBlock *WaterBB,
904 std::vector<MachineBasicBlock*>::iterator IP) {
905 DOUT << "found water in range\n";
906 // Remove the original WaterList entry; we want subsequent
907 // insertions in this vicinity to go after the one we're
908 // about to insert. This considerably reduces the number
909 // of times we have to move the same CPE more than once.
911 // CPE goes before following block (NewMBB).
912 return next(MachineFunction::iterator(WaterBB));
915 /// LookForWater - look for an existing entry in the WaterList in which
916 /// we can place the CPE referenced from U so it's within range of U's MI.
917 /// Returns true if found, false if not. If it returns true, *NewMBB
918 /// is set to the WaterList entry.
919 /// For ARM, we prefer the water that's farthest away. For Thumb, prefer
920 /// water that will not introduce padding to water that will; within each
921 /// group, prefer the water that's farthest away.
922 bool ARMConstantIslands::LookForWater(CPUser &U, unsigned UserOffset,
923 MachineBasicBlock** NewMBB) {
924 std::vector<MachineBasicBlock*>::iterator IPThatWouldPad;
925 MachineBasicBlock* WaterBBThatWouldPad = NULL;
926 if (!WaterList.empty()) {
927 for (std::vector<MachineBasicBlock*>::iterator IP = prior(WaterList.end()),
928 B = WaterList.begin();; --IP) {
929 MachineBasicBlock* WaterBB = *IP;
930 if (WaterIsInRange(UserOffset, WaterBB, U)) {
931 unsigned WBBId = WaterBB->getNumber();
933 (BBOffsets[WBBId] + BBSizes[WBBId])%4 != 0) {
934 // This is valid Water, but would introduce padding. Remember
935 // it in case we don't find any Water that doesn't do this.
936 if (!WaterBBThatWouldPad) {
937 WaterBBThatWouldPad = WaterBB;
941 *NewMBB = AcceptWater(WaterBB, IP);
949 if (isThumb && WaterBBThatWouldPad) {
950 *NewMBB = AcceptWater(WaterBBThatWouldPad, IPThatWouldPad);
956 /// CreateNewWater - No existing WaterList entry will work for
957 /// CPUsers[CPUserIndex], so create a place to put the CPE. The end of the
958 /// block is used if in range, and the conditional branch munged so control
959 /// flow is correct. Otherwise the block is split to create a hole with an
960 /// unconditional branch around it. In either case *NewMBB is set to a
961 /// block following which the new island can be inserted (the WaterList
962 /// is not adjusted).
964 void ARMConstantIslands::CreateNewWater(unsigned CPUserIndex,
965 unsigned UserOffset, MachineBasicBlock** NewMBB) {
966 CPUser &U = CPUsers[CPUserIndex];
967 MachineInstr *UserMI = U.MI;
968 MachineInstr *CPEMI = U.CPEMI;
969 MachineBasicBlock *UserMBB = UserMI->getParent();
970 unsigned OffsetOfNextBlock = BBOffsets[UserMBB->getNumber()] +
971 BBSizes[UserMBB->getNumber()];
972 assert(OffsetOfNextBlock== BBOffsets[UserMBB->getNumber()+1]);
974 // If the use is at the end of the block, or the end of the block
975 // is within range, make new water there. (The addition below is
976 // for the unconditional branch we will be adding: 4 bytes on ARM + Thumb2,
977 // 2 on Thumb1. Possible Thumb1 alignment padding is allowed for
978 // inside OffsetIsInRange.
979 // If the block ends in an unconditional branch already, it is water,
980 // and is known to be out of range, so we'll always be adding a branch.)
981 if (&UserMBB->back() == UserMI ||
982 OffsetIsInRange(UserOffset, OffsetOfNextBlock + (isThumb1 ? 2: 4),
983 U.MaxDisp, U.NegOk, U.IsSoImm)) {
984 DOUT << "Split at end of block\n";
985 if (&UserMBB->back() == UserMI)
986 assert(BBHasFallthrough(UserMBB) && "Expected a fallthrough BB!");
987 *NewMBB = next(MachineFunction::iterator(UserMBB));
988 // Add an unconditional branch from UserMBB to fallthrough block.
989 // Record it for branch lengthening; this new branch will not get out of
990 // range, but if the preceding conditional branch is out of range, the
991 // targets will be exchanged, and the altered branch may be out of
992 // range, so the machinery has to know about it.
993 int UncondBr = isThumb ? ((isThumb2) ? ARM::t2B : ARM::tB) : ARM::B;
994 BuildMI(UserMBB, DebugLoc::getUnknownLoc(),
995 TII->get(UncondBr)).addMBB(*NewMBB);
996 unsigned MaxDisp = getUnconditionalBrDisp(UncondBr);
997 ImmBranches.push_back(ImmBranch(&UserMBB->back(),
998 MaxDisp, false, UncondBr));
999 int delta = isThumb1 ? 2 : 4;
1000 BBSizes[UserMBB->getNumber()] += delta;
1001 AdjustBBOffsetsAfter(UserMBB, delta);
1003 // What a big block. Find a place within the block to split it.
1004 // This is a little tricky on Thumb1 since instructions are 2 bytes
1005 // and constant pool entries are 4 bytes: if instruction I references
1006 // island CPE, and instruction I+1 references CPE', it will
1007 // not work well to put CPE as far forward as possible, since then
1008 // CPE' cannot immediately follow it (that location is 2 bytes
1009 // farther away from I+1 than CPE was from I) and we'd need to create
1010 // a new island. So, we make a first guess, then walk through the
1011 // instructions between the one currently being looked at and the
1012 // possible insertion point, and make sure any other instructions
1013 // that reference CPEs will be able to use the same island area;
1014 // if not, we back up the insertion point.
1016 // The 4 in the following is for the unconditional branch we'll be
1017 // inserting (allows for long branch on Thumb1). Alignment of the
1018 // island is handled inside OffsetIsInRange.
1019 unsigned BaseInsertOffset = UserOffset + U.MaxDisp -4;
1020 // This could point off the end of the block if we've already got
1021 // constant pool entries following this block; only the last one is
1022 // in the water list. Back past any possible branches (allow for a
1023 // conditional and a maximally long unconditional).
1024 if (BaseInsertOffset >= BBOffsets[UserMBB->getNumber()+1])
1025 BaseInsertOffset = BBOffsets[UserMBB->getNumber()+1] -
1027 unsigned EndInsertOffset = BaseInsertOffset +
1028 CPEMI->getOperand(2).getImm();
1029 MachineBasicBlock::iterator MI = UserMI;
1031 unsigned CPUIndex = CPUserIndex+1;
1032 for (unsigned Offset = UserOffset+TII->GetInstSizeInBytes(UserMI);
1033 Offset < BaseInsertOffset;
1034 Offset += TII->GetInstSizeInBytes(MI),
1036 if (CPUIndex < CPUsers.size() && CPUsers[CPUIndex].MI == MI) {
1037 CPUser &U = CPUsers[CPUIndex];
1038 if (!OffsetIsInRange(Offset, EndInsertOffset,
1039 U.MaxDisp, U.NegOk, U.IsSoImm)) {
1040 BaseInsertOffset -= (isThumb1 ? 2 : 4);
1041 EndInsertOffset -= (isThumb1 ? 2 : 4);
1043 // This is overly conservative, as we don't account for CPEMIs
1044 // being reused within the block, but it doesn't matter much.
1045 EndInsertOffset += CPUsers[CPUIndex].CPEMI->getOperand(2).getImm();
1049 DOUT << "Split in middle of big block\n";
1050 *NewMBB = SplitBlockBeforeInstr(prior(MI));
1054 /// HandleConstantPoolUser - Analyze the specified user, checking to see if it
1055 /// is out-of-range. If so, pick up the constant pool value and move it some
1056 /// place in-range. Return true if we changed any addresses (thus must run
1057 /// another pass of branch lengthening), false otherwise.
1058 bool ARMConstantIslands::HandleConstantPoolUser(MachineFunction &MF,
1059 unsigned CPUserIndex) {
1060 CPUser &U = CPUsers[CPUserIndex];
1061 MachineInstr *UserMI = U.MI;
1062 MachineInstr *CPEMI = U.CPEMI;
1063 unsigned CPI = CPEMI->getOperand(1).getIndex();
1064 unsigned Size = CPEMI->getOperand(2).getImm();
1065 MachineBasicBlock *NewMBB;
1066 // Compute this only once, it's expensive. The 4 or 8 is the value the
1067 // hardware keeps in the PC (2 insns ahead of the reference).
1068 unsigned UserOffset = GetOffsetOf(UserMI) + (isThumb ? 4 : 8);
1070 // See if the current entry is within range, or there is a clone of it
1072 int result = LookForExistingCPEntry(U, UserOffset);
1073 if (result==1) return false;
1074 else if (result==2) return true;
1076 // No existing clone of this CPE is within range.
1077 // We will be generating a new clone. Get a UID for it.
1078 unsigned ID = AFI->createConstPoolEntryUId();
1080 // Look for water where we can place this CPE. We look for the farthest one
1081 // away that will work. Forward references only for now (although later
1082 // we might find some that are backwards).
1084 if (!LookForWater(U, UserOffset, &NewMBB)) {
1086 DOUT << "No water found\n";
1087 CreateNewWater(CPUserIndex, UserOffset, &NewMBB);
1090 // Okay, we know we can put an island before NewMBB now, do it!
1091 MachineBasicBlock *NewIsland = MF.CreateMachineBasicBlock();
1092 MF.insert(NewMBB, NewIsland);
1094 // Update internal data structures to account for the newly inserted MBB.
1095 UpdateForInsertedWaterBlock(NewIsland);
1097 // Decrement the old entry, and remove it if refcount becomes 0.
1098 DecrementOldEntry(CPI, CPEMI);
1100 // Now that we have an island to add the CPE to, clone the original CPE and
1101 // add it to the island.
1102 U.CPEMI = BuildMI(NewIsland, DebugLoc::getUnknownLoc(),
1103 TII->get(ARM::CONSTPOOL_ENTRY))
1104 .addImm(ID).addConstantPoolIndex(CPI).addImm(Size);
1105 CPEntries[CPI].push_back(CPEntry(U.CPEMI, ID, 1));
1108 BBOffsets[NewIsland->getNumber()] = BBOffsets[NewMBB->getNumber()];
1109 // Compensate for .align 2 in thumb mode.
1110 if (isThumb && BBOffsets[NewIsland->getNumber()]%4 != 0)
1112 // Increase the size of the island block to account for the new entry.
1113 BBSizes[NewIsland->getNumber()] += Size;
1114 AdjustBBOffsetsAfter(NewIsland, Size);
1116 // Finally, change the CPI in the instruction operand to be ID.
1117 for (unsigned i = 0, e = UserMI->getNumOperands(); i != e; ++i)
1118 if (UserMI->getOperand(i).isCPI()) {
1119 UserMI->getOperand(i).setIndex(ID);
1123 DOUT << " Moved CPE to #" << ID << " CPI=" << CPI << "\t" << *UserMI;
1128 /// RemoveDeadCPEMI - Remove a dead constant pool entry instruction. Update
1129 /// sizes and offsets of impacted basic blocks.
1130 void ARMConstantIslands::RemoveDeadCPEMI(MachineInstr *CPEMI) {
1131 MachineBasicBlock *CPEBB = CPEMI->getParent();
1132 unsigned Size = CPEMI->getOperand(2).getImm();
1133 CPEMI->eraseFromParent();
1134 BBSizes[CPEBB->getNumber()] -= Size;
1135 // All succeeding offsets have the current size value added in, fix this.
1136 if (CPEBB->empty()) {
1137 // In thumb1 mode, the size of island may be padded by two to compensate for
1138 // the alignment requirement. Then it will now be 2 when the block is
1139 // empty, so fix this.
1140 // All succeeding offsets have the current size value added in, fix this.
1141 if (BBSizes[CPEBB->getNumber()] != 0) {
1142 Size += BBSizes[CPEBB->getNumber()];
1143 BBSizes[CPEBB->getNumber()] = 0;
1146 AdjustBBOffsetsAfter(CPEBB, -Size);
1147 // An island has only one predecessor BB and one successor BB. Check if
1148 // this BB's predecessor jumps directly to this BB's successor. This
1149 // shouldn't happen currently.
1150 assert(!BBIsJumpedOver(CPEBB) && "How did this happen?");
1151 // FIXME: remove the empty blocks after all the work is done?
1154 /// RemoveUnusedCPEntries - Remove constant pool entries whose refcounts
1156 bool ARMConstantIslands::RemoveUnusedCPEntries() {
1157 unsigned MadeChange = false;
1158 for (unsigned i = 0, e = CPEntries.size(); i != e; ++i) {
1159 std::vector<CPEntry> &CPEs = CPEntries[i];
1160 for (unsigned j = 0, ee = CPEs.size(); j != ee; ++j) {
1161 if (CPEs[j].RefCount == 0 && CPEs[j].CPEMI) {
1162 RemoveDeadCPEMI(CPEs[j].CPEMI);
1163 CPEs[j].CPEMI = NULL;
1171 /// BBIsInRange - Returns true if the distance between specific MI and
1172 /// specific BB can fit in MI's displacement field.
1173 bool ARMConstantIslands::BBIsInRange(MachineInstr *MI,MachineBasicBlock *DestBB,
1175 unsigned PCAdj = isThumb ? 4 : 8;
1176 unsigned BrOffset = GetOffsetOf(MI) + PCAdj;
1177 unsigned DestOffset = BBOffsets[DestBB->getNumber()];
1179 DOUT << "Branch of destination BB#" << DestBB->getNumber()
1180 << " from BB#" << MI->getParent()->getNumber()
1181 << " max delta=" << MaxDisp
1182 << " from " << GetOffsetOf(MI) << " to " << DestOffset
1183 << " offset " << int(DestOffset-BrOffset) << "\t" << *MI;
1185 if (BrOffset <= DestOffset) {
1186 // Branch before the Dest.
1187 if (DestOffset-BrOffset <= MaxDisp)
1190 if (BrOffset-DestOffset <= MaxDisp)
1196 /// FixUpImmediateBr - Fix up an immediate branch whose destination is too far
1197 /// away to fit in its displacement field.
1198 bool ARMConstantIslands::FixUpImmediateBr(MachineFunction &MF, ImmBranch &Br) {
1199 MachineInstr *MI = Br.MI;
1200 MachineBasicBlock *DestBB = MI->getOperand(0).getMBB();
1202 // Check to see if the DestBB is already in-range.
1203 if (BBIsInRange(MI, DestBB, Br.MaxDisp))
1207 return FixUpUnconditionalBr(MF, Br);
1208 return FixUpConditionalBr(MF, Br);
1211 /// FixUpUnconditionalBr - Fix up an unconditional branch whose destination is
1212 /// too far away to fit in its displacement field. If the LR register has been
1213 /// spilled in the epilogue, then we can use BL to implement a far jump.
1214 /// Otherwise, add an intermediate branch instruction to a branch.
1216 ARMConstantIslands::FixUpUnconditionalBr(MachineFunction &MF, ImmBranch &Br) {
1217 MachineInstr *MI = Br.MI;
1218 MachineBasicBlock *MBB = MI->getParent();
1219 assert(isThumb && !isThumb2 && "Expected a Thumb1 function!");
1221 // Use BL to implement far jump.
1222 Br.MaxDisp = (1 << 21) * 2;
1223 MI->setDesc(TII->get(ARM::tBfar));
1224 BBSizes[MBB->getNumber()] += 2;
1225 AdjustBBOffsetsAfter(MBB, 2);
1229 DOUT << " Changed B to long jump " << *MI;
1234 /// FixUpConditionalBr - Fix up a conditional branch whose destination is too
1235 /// far away to fit in its displacement field. It is converted to an inverse
1236 /// conditional branch + an unconditional branch to the destination.
1238 ARMConstantIslands::FixUpConditionalBr(MachineFunction &MF, ImmBranch &Br) {
1239 MachineInstr *MI = Br.MI;
1240 MachineBasicBlock *DestBB = MI->getOperand(0).getMBB();
1242 // Add an unconditional branch to the destination and invert the branch
1243 // condition to jump over it:
1249 ARMCC::CondCodes CC = (ARMCC::CondCodes)MI->getOperand(1).getImm();
1250 CC = ARMCC::getOppositeCondition(CC);
1251 unsigned CCReg = MI->getOperand(2).getReg();
1253 // If the branch is at the end of its MBB and that has a fall-through block,
1254 // direct the updated conditional branch to the fall-through block. Otherwise,
1255 // split the MBB before the next instruction.
1256 MachineBasicBlock *MBB = MI->getParent();
1257 MachineInstr *BMI = &MBB->back();
1258 bool NeedSplit = (BMI != MI) || !BBHasFallthrough(MBB);
1262 if (next(MachineBasicBlock::iterator(MI)) == prior(MBB->end()) &&
1263 BMI->getOpcode() == Br.UncondBr) {
1264 // Last MI in the BB is an unconditional branch. Can we simply invert the
1265 // condition and swap destinations:
1271 MachineBasicBlock *NewDest = BMI->getOperand(0).getMBB();
1272 if (BBIsInRange(MI, NewDest, Br.MaxDisp)) {
1273 DOUT << " Invert Bcc condition and swap its destination with " << *BMI;
1274 BMI->getOperand(0).setMBB(DestBB);
1275 MI->getOperand(0).setMBB(NewDest);
1276 MI->getOperand(1).setImm(CC);
1283 SplitBlockBeforeInstr(MI);
1284 // No need for the branch to the next block. We're adding an unconditional
1285 // branch to the destination.
1286 int delta = TII->GetInstSizeInBytes(&MBB->back());
1287 BBSizes[MBB->getNumber()] -= delta;
1288 MachineBasicBlock* SplitBB = next(MachineFunction::iterator(MBB));
1289 AdjustBBOffsetsAfter(SplitBB, -delta);
1290 MBB->back().eraseFromParent();
1291 // BBOffsets[SplitBB] is wrong temporarily, fixed below
1293 MachineBasicBlock *NextBB = next(MachineFunction::iterator(MBB));
1295 DOUT << " Insert B to BB#" << DestBB->getNumber()
1296 << " also invert condition and change dest. to BB#"
1297 << NextBB->getNumber() << "\n";
1299 // Insert a new conditional branch and a new unconditional branch.
1300 // Also update the ImmBranch as well as adding a new entry for the new branch.
1301 BuildMI(MBB, DebugLoc::getUnknownLoc(),
1302 TII->get(MI->getOpcode()))
1303 .addMBB(NextBB).addImm(CC).addReg(CCReg);
1304 Br.MI = &MBB->back();
1305 BBSizes[MBB->getNumber()] += TII->GetInstSizeInBytes(&MBB->back());
1306 BuildMI(MBB, DebugLoc::getUnknownLoc(), TII->get(Br.UncondBr)).addMBB(DestBB);
1307 BBSizes[MBB->getNumber()] += TII->GetInstSizeInBytes(&MBB->back());
1308 unsigned MaxDisp = getUnconditionalBrDisp(Br.UncondBr);
1309 ImmBranches.push_back(ImmBranch(&MBB->back(), MaxDisp, false, Br.UncondBr));
1311 // Remove the old conditional branch. It may or may not still be in MBB.
1312 BBSizes[MI->getParent()->getNumber()] -= TII->GetInstSizeInBytes(MI);
1313 MI->eraseFromParent();
1315 // The net size change is an addition of one unconditional branch.
1316 int delta = TII->GetInstSizeInBytes(&MBB->back());
1317 AdjustBBOffsetsAfter(MBB, delta);
1321 /// UndoLRSpillRestore - Remove Thumb push / pop instructions that only spills
1322 /// LR / restores LR to pc.
1323 bool ARMConstantIslands::UndoLRSpillRestore() {
1324 bool MadeChange = false;
1325 for (unsigned i = 0, e = PushPopMIs.size(); i != e; ++i) {
1326 MachineInstr *MI = PushPopMIs[i];
1327 if (MI->getOpcode() == ARM::tPOP_RET &&
1328 MI->getOperand(0).getReg() == ARM::PC &&
1329 MI->getNumExplicitOperands() == 1) {
1330 BuildMI(MI->getParent(), MI->getDebugLoc(), TII->get(ARM::tBX_RET));
1331 MI->eraseFromParent();
1338 bool ARMConstantIslands::OptimizeThumb2JumpTables(MachineFunction &MF) {
1339 bool MadeChange = false;
1341 // FIXME: After the tables are shrunk, can we get rid some of the
1342 // constantpool tables?
1343 const MachineJumpTableInfo *MJTI = MF.getJumpTableInfo();
1344 const std::vector<MachineJumpTableEntry> &JT = MJTI->getJumpTables();
1345 for (unsigned i = 0, e = T2JumpTables.size(); i != e; ++i) {
1346 MachineInstr *MI = T2JumpTables[i];
1347 const TargetInstrDesc &TID = MI->getDesc();
1348 unsigned NumOps = TID.getNumOperands();
1349 unsigned JTOpIdx = NumOps - (TID.isPredicable() ? 3 : 2);
1350 MachineOperand JTOP = MI->getOperand(JTOpIdx);
1351 unsigned JTI = JTOP.getIndex();
1352 assert(JTI < JT.size());
1355 bool HalfWordOk = true;
1356 unsigned JTOffset = GetOffsetOf(MI) + 4;
1357 const std::vector<MachineBasicBlock*> &JTBBs = JT[JTI].MBBs;
1358 for (unsigned j = 0, ee = JTBBs.size(); j != ee; ++j) {
1359 MachineBasicBlock *MBB = JTBBs[j];
1360 unsigned DstOffset = BBOffsets[MBB->getNumber()];
1361 // Negative offset is not ok. FIXME: We should change BB layout to make
1362 // sure all the branches are forward.
1363 if (ByteOk && !OffsetIsInRange(JTOffset, DstOffset, (1<<8)-1, false))
1366 !OffsetIsInRange(JTOffset, DstOffset, (1<<16)-1, false))
1368 if (!ByteOk && !HalfWordOk)
1372 if (ByteOk || HalfWordOk) {
1373 MachineBasicBlock *MBB = MI->getParent();
1374 unsigned BaseReg = MI->getOperand(0).getReg();
1375 bool BaseRegKill = MI->getOperand(0).isKill();
1378 unsigned IdxReg = MI->getOperand(1).getReg();
1379 bool IdxRegKill = MI->getOperand(1).isKill();
1380 MachineBasicBlock::iterator PrevI = MI;
1381 if (PrevI == MBB->begin())
1384 MachineInstr *AddrMI = --PrevI;
1386 // Examine the instruction that calculate the jumptable entry address.
1387 // If it's not the one just before the t2BR_JT, we won't delete it, then
1388 // it's not worth doing the optimization.
1389 for (unsigned k = 0, eee = AddrMI->getNumOperands(); k != eee; ++k) {
1390 const MachineOperand &MO = AddrMI->getOperand(k);
1391 if (!MO.isReg() || !MO.getReg())
1393 if (MO.isDef() && MO.getReg() != BaseReg) {
1397 if (MO.isUse() && !MO.isKill() && MO.getReg() != IdxReg) {
1405 // The previous instruction should be a t2LEApcrelJT, we want to delete
1407 MachineInstr *LeaMI = --PrevI;
1408 if (LeaMI->getOpcode() != ARM::t2LEApcrelJT ||
1409 LeaMI->getOperand(0).getReg() != BaseReg)
1413 unsigned Opc = ByteOk ? ARM::t2TBB : ARM::t2TBH;
1414 AddDefaultPred(BuildMI(MBB, MI->getDebugLoc(), TII->get(Opc))
1415 .addReg(IdxReg, getKillRegState(IdxRegKill))
1416 .addJumpTableIndex(JTI, JTOP.getTargetFlags())
1417 .addImm(MI->getOperand(JTOpIdx+1).getImm()));
1419 AddrMI->eraseFromParent();
1421 LeaMI->eraseFromParent();
1422 MI->eraseFromParent();