1 //===-- ARMConstantIslandPass.cpp - ARM constant islands --------*- C++ -*-===//
3 // The LLVM Compiler Infrastructure
5 // This file was developed by Chris Lattner and is distributed under the
6 // University of Illinois Open Source License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file contains a pass that splits the constant pool up into 'islands'
11 // which are scattered through-out the function. This is required due to the
12 // limited pc-relative displacements that ARM has.
14 //===----------------------------------------------------------------------===//
16 #define DEBUG_TYPE "arm-cp-islands"
18 #include "ARMMachineFunctionInfo.h"
19 #include "ARMInstrInfo.h"
20 #include "llvm/CodeGen/MachineConstantPool.h"
21 #include "llvm/CodeGen/MachineFunctionPass.h"
22 #include "llvm/CodeGen/MachineInstrBuilder.h"
23 #include "llvm/Target/TargetData.h"
24 #include "llvm/Target/TargetMachine.h"
25 #include "llvm/Support/Compiler.h"
26 #include "llvm/Support/Debug.h"
27 #include "llvm/ADT/SmallVector.h"
28 #include "llvm/ADT/STLExtras.h"
29 #include "llvm/ADT/Statistic.h"
32 STATISTIC(NumCPEs, "Number of constpool entries");
33 STATISTIC(NumSplit, "Number of uncond branches inserted");
34 STATISTIC(NumCBrFixed, "Number of cond branches fixed");
35 STATISTIC(NumUBrFixed, "Number of uncond branches fixed");
38 /// ARMConstantIslands - Due to limited PC-relative displacements, ARM
39 /// requires constant pool entries to be scattered among the instructions
40 /// inside a function. To do this, it completely ignores the normal LLVM
41 /// constant pool; instead, it places constants wherever it feels like with
42 /// special instructions.
44 /// The terminology used in this pass includes:
45 /// Islands - Clumps of constants placed in the function.
46 /// Water - Potential places where an island could be formed.
47 /// CPE - A constant pool entry that has been placed somewhere, which
48 /// tracks a list of users.
49 class VISIBILITY_HIDDEN ARMConstantIslands : public MachineFunctionPass {
50 /// NextUID - Assign unique ID's to CPE's.
53 /// BBSizes - The size of each MachineBasicBlock in bytes of code, indexed
55 std::vector<unsigned> BBSizes;
57 /// BBOffsets - the offset of each MBB in bytes, starting from 0.
58 std::vector<unsigned> BBOffsets;
60 /// WaterList - A sorted list of basic blocks where islands could be placed
61 /// (i.e. blocks that don't fall through to the following block, due
62 /// to a return, unreachable, or unconditional branch).
63 std::vector<MachineBasicBlock*> WaterList;
65 /// CPUser - One user of a constant pool, keeping the machine instruction
66 /// pointer, the constant pool being referenced, and the max displacement
67 /// allowed from the instruction to the CP.
72 CPUser(MachineInstr *mi, MachineInstr *cpemi, unsigned maxdisp)
73 : MI(mi), CPEMI(cpemi), MaxDisp(maxdisp) {}
76 /// CPUsers - Keep track of all of the machine instructions that use various
77 /// constant pools and their max displacement.
78 std::vector<CPUser> CPUsers;
80 /// CPEntry - One per constant pool entry, keeping the machine instruction
81 /// pointer, the constpool index, and the number of CPUser's which
82 /// reference this entry.
87 CPEntry(MachineInstr *cpemi, unsigned cpi, unsigned rc = 0)
88 : CPEMI(cpemi), CPI(cpi), RefCount(rc) {}
91 /// CPEntries - Keep track of all of the constant pool entry machine
92 /// instructions. For each original constpool index (i.e. those that
93 /// existed upon entry to this pass), it keeps a vector of entries.
94 /// Original elements are cloned as we go along; the clones are
95 /// put in the vector of the original element, but have distinct CPIs.
96 std::vector<std::vector<CPEntry> > CPEntries;
98 /// ImmBranch - One per immediate branch, keeping the machine instruction
99 /// pointer, conditional or unconditional, the max displacement,
100 /// and (if isCond is true) the corresponding unconditional branch
104 unsigned MaxDisp : 31;
107 ImmBranch(MachineInstr *mi, unsigned maxdisp, bool cond, int ubr)
108 : MI(mi), MaxDisp(maxdisp), isCond(cond), UncondBr(ubr) {}
111 /// Branches - Keep track of all the immediate branch instructions.
113 std::vector<ImmBranch> ImmBranches;
115 /// PushPopMIs - Keep track of all the Thumb push / pop instructions.
117 SmallVector<MachineInstr*, 4> PushPopMIs;
119 /// HasFarJump - True if any far jump instruction has been emitted during
120 /// the branch fix up pass.
123 const TargetInstrInfo *TII;
126 virtual bool runOnMachineFunction(MachineFunction &Fn);
128 virtual const char *getPassName() const {
129 return "ARM constant island placement and branch shortening pass";
133 void DoInitialPlacement(MachineFunction &Fn,
134 std::vector<MachineInstr*> &CPEMIs);
135 CPEntry *findConstPoolEntry(unsigned CPI, const MachineInstr *CPEMI);
136 void InitialFunctionScan(MachineFunction &Fn,
137 const std::vector<MachineInstr*> &CPEMIs);
138 MachineBasicBlock *SplitBlockBeforeInstr(MachineInstr *MI);
139 void UpdateForInsertedWaterBlock(MachineBasicBlock *NewBB);
140 void AdjustBBOffsetsAfter(MachineBasicBlock *BB, int delta);
141 bool DecrementOldEntry(unsigned CPI, MachineInstr* CPEMI);
142 int LookForExistingCPEntry(CPUser& U, unsigned UserOffset);
143 bool LookForWater(CPUser&U, unsigned UserOffset, bool* PadNewWater,
144 MachineBasicBlock** NewMBB);
145 void CreateNewWater(unsigned CPUserIndex, unsigned UserOffset,
146 MachineBasicBlock** NewMBB);
147 bool HandleConstantPoolUser(MachineFunction &Fn, unsigned CPUserIndex);
148 void RemoveDeadCPEMI(MachineInstr *CPEMI);
149 bool RemoveUnusedCPEntries();
150 bool CPEIsInRange(MachineInstr *MI, unsigned UserOffset,
151 MachineInstr *CPEMI, unsigned Disp,
153 bool WaterIsInRange(unsigned UserOffset, MachineBasicBlock *Water,
155 bool OffsetIsInRange(unsigned UserOffset, unsigned TrialOffset,
156 unsigned Disp, bool NegativeOK);
157 bool BBIsInRange(MachineInstr *MI, MachineBasicBlock *BB, unsigned Disp);
158 bool FixUpImmediateBr(MachineFunction &Fn, ImmBranch &Br);
159 bool FixUpConditionalBr(MachineFunction &Fn, ImmBranch &Br);
160 bool FixUpUnconditionalBr(MachineFunction &Fn, ImmBranch &Br);
161 bool UndoLRSpillRestore();
163 unsigned GetOffsetOf(MachineInstr *MI) const;
167 /// createARMConstantIslandPass - returns an instance of the constpool
169 FunctionPass *llvm::createARMConstantIslandPass() {
170 return new ARMConstantIslands();
173 bool ARMConstantIslands::runOnMachineFunction(MachineFunction &Fn) {
174 MachineConstantPool &MCP = *Fn.getConstantPool();
175 ARMFunctionInfo *AFI = Fn.getInfo<ARMFunctionInfo>();
177 TII = Fn.getTarget().getInstrInfo();
178 isThumb = AFI->isThumbFunction();
182 // Renumber all of the machine basic blocks in the function, guaranteeing that
183 // the numbers agree with the position of the block in the function.
186 /// Thumb functions containing constant pools get 2-byte alignment. This is so
187 /// we can keep exact track of where the alignment padding goes. Set default.
188 AFI->setAlign(isThumb ? 1U : 2U);
190 // Perform the initial placement of the constant pool entries. To start with,
191 // we put them all at the end of the function.
192 std::vector<MachineInstr*> CPEMIs;
193 if (!MCP.isEmpty()) {
194 DoInitialPlacement(Fn, CPEMIs);
199 /// The next UID to take is the first unused one.
200 NextUID = CPEMIs.size();
202 // Do the initial scan of the function, building up information about the
203 // sizes of each block, the location of all the water, and finding all of the
204 // constant pool users.
205 InitialFunctionScan(Fn, CPEMIs);
208 /// Remove dead constant pool entries.
209 RemoveUnusedCPEntries();
211 // Iteratively place constant pool entries and fix up branches until there
213 bool MadeChange = false;
216 for (unsigned i = 0, e = CPUsers.size(); i != e; ++i)
217 Change |= HandleConstantPoolUser(Fn, i);
218 for (unsigned i = 0, e = ImmBranches.size(); i != e; ++i)
219 Change |= FixUpImmediateBr(Fn, ImmBranches[i]);
225 // If LR has been forced spilled and no far jumps (i.e. BL) has been issued.
226 // Undo the spill / restore of LR if possible.
227 if (!HasFarJump && AFI->isLRSpilledForFarJump() && isThumb)
228 MadeChange |= UndoLRSpillRestore();
241 /// DoInitialPlacement - Perform the initial placement of the constant pool
242 /// entries. To start with, we put them all at the end of the function.
243 void ARMConstantIslands::DoInitialPlacement(MachineFunction &Fn,
244 std::vector<MachineInstr*> &CPEMIs){
245 // Create the basic block to hold the CPE's.
246 MachineBasicBlock *BB = new MachineBasicBlock();
247 Fn.getBasicBlockList().push_back(BB);
249 // Add all of the constants from the constant pool to the end block, use an
250 // identity mapping of CPI's to CPE's.
251 const std::vector<MachineConstantPoolEntry> &CPs =
252 Fn.getConstantPool()->getConstants();
254 const TargetData &TD = *Fn.getTarget().getTargetData();
255 for (unsigned i = 0, e = CPs.size(); i != e; ++i) {
256 unsigned Size = TD.getTypeSize(CPs[i].getType());
257 // Verify that all constant pool entries are a multiple of 4 bytes. If not,
258 // we would have to pad them out or something so that instructions stay
260 assert((Size & 3) == 0 && "CP Entry not multiple of 4 bytes!");
261 MachineInstr *CPEMI =
262 BuildMI(BB, TII->get(ARM::CONSTPOOL_ENTRY))
263 .addImm(i).addConstantPoolIndex(i).addImm(Size);
264 CPEMIs.push_back(CPEMI);
266 // Add a new CPEntry, but no corresponding CPUser yet.
267 std::vector<CPEntry> CPEs;
268 CPEs.push_back(CPEntry(CPEMI, i));
269 CPEntries.push_back(CPEs);
271 DOUT << "Moved CPI#" << i << " to end of function as #" << i << "\n";
275 /// BBHasFallthrough - Return true if the specified basic block can fallthrough
276 /// into the block immediately after it.
277 static bool BBHasFallthrough(MachineBasicBlock *MBB) {
278 // Get the next machine basic block in the function.
279 MachineFunction::iterator MBBI = MBB;
280 if (next(MBBI) == MBB->getParent()->end()) // Can't fall off end of function.
283 MachineBasicBlock *NextBB = next(MBBI);
284 for (MachineBasicBlock::succ_iterator I = MBB->succ_begin(),
285 E = MBB->succ_end(); I != E; ++I)
292 /// findConstPoolEntry - Given the constpool index and CONSTPOOL_ENTRY MI,
293 /// look up the corresponding CPEntry.
294 ARMConstantIslands::CPEntry
295 *ARMConstantIslands::findConstPoolEntry(unsigned CPI,
296 const MachineInstr *CPEMI) {
297 std::vector<CPEntry> &CPEs = CPEntries[CPI];
298 // Number of entries per constpool index should be small, just do a
300 for (unsigned i = 0, e = CPEs.size(); i != e; ++i) {
301 if (CPEs[i].CPEMI == CPEMI)
307 /// InitialFunctionScan - Do the initial scan of the function, building up
308 /// information about the sizes of each block, the location of all the water,
309 /// and finding all of the constant pool users.
310 void ARMConstantIslands::InitialFunctionScan(MachineFunction &Fn,
311 const std::vector<MachineInstr*> &CPEMIs) {
313 for (MachineFunction::iterator MBBI = Fn.begin(), E = Fn.end();
315 MachineBasicBlock &MBB = *MBBI;
317 // If this block doesn't fall through into the next MBB, then this is
318 // 'water' that a constant pool island could be placed.
319 if (!BBHasFallthrough(&MBB))
320 WaterList.push_back(&MBB);
322 unsigned MBBSize = 0;
323 for (MachineBasicBlock::iterator I = MBB.begin(), E = MBB.end();
325 // Add instruction size to MBBSize.
326 MBBSize += ARM::GetInstSize(I);
328 int Opc = I->getOpcode();
329 if (TII->isBranch(Opc)) {
336 continue; // Ignore JT branches
357 // Record this immediate branch.
358 unsigned MaxOffs = ((1 << (Bits-1))-1) * Scale;
359 ImmBranches.push_back(ImmBranch(I, MaxOffs, isCond, UOpc));
362 if (Opc == ARM::tPUSH || Opc == ARM::tPOP_RET)
363 PushPopMIs.push_back(I);
365 // Scan the instructions for constant pool operands.
366 for (unsigned op = 0, e = I->getNumOperands(); op != e; ++op)
367 if (I->getOperand(op).isConstantPoolIndex()) {
368 // We found one. The addressing mode tells us the max displacement
369 // from the PC that this instruction permits.
371 // Basic size info comes from the TSFlags field.
374 unsigned TSFlags = I->getInstrDescriptor()->TSFlags;
375 switch (TSFlags & ARMII::AddrModeMask) {
377 // Constant pool entries can reach anything.
378 if (I->getOpcode() == ARM::CONSTPOOL_ENTRY)
380 if (I->getOpcode() == ARM::tLEApcrel) {
381 Bits = 8; // Taking the address of a CP entry.
384 assert(0 && "Unknown addressing mode for CP reference!");
385 case ARMII::AddrMode1: // AM1: 8 bits << 2
387 Scale = 4; // Taking the address of a CP entry.
389 case ARMII::AddrMode2:
390 Bits = 12; // +-offset_12
392 case ARMII::AddrMode3:
393 Bits = 8; // +-offset_8
395 // addrmode4 has no immediate offset.
396 case ARMII::AddrMode5:
398 Scale = 4; // +-(offset_8*4)
400 case ARMII::AddrModeT1:
401 Bits = 5; // +offset_5
403 case ARMII::AddrModeT2:
405 Scale = 2; // +(offset_5*2)
407 case ARMII::AddrModeT4:
409 Scale = 4; // +(offset_5*4)
411 case ARMII::AddrModeTs:
413 Scale = 4; // +(offset_8*4)
417 // Remember that this is a user of a CP entry.
418 unsigned CPI = I->getOperand(op).getConstantPoolIndex();
419 MachineInstr *CPEMI = CPEMIs[CPI];
420 unsigned MaxOffs = ((1 << Bits)-1) * Scale;
421 CPUsers.push_back(CPUser(I, CPEMI, MaxOffs));
423 // Increment corresponding CPEntry reference count.
424 CPEntry *CPE = findConstPoolEntry(CPI, CPEMI);
425 assert(CPE && "Cannot find a corresponding CPEntry!");
428 // Instructions can only use one CP entry, don't bother scanning the
429 // rest of the operands.
434 // In thumb mode, if this block is a constpool island, pessimistically
435 // assume it needs to be padded by two byte so it's aligned on 4 byte
439 MBB.begin()->getOpcode() == ARM::CONSTPOOL_ENTRY)
442 BBSizes.push_back(MBBSize);
443 BBOffsets.push_back(Offset);
448 /// GetOffsetOf - Return the current offset of the specified machine instruction
449 /// from the start of the function. This offset changes as stuff is moved
450 /// around inside the function.
451 unsigned ARMConstantIslands::GetOffsetOf(MachineInstr *MI) const {
452 MachineBasicBlock *MBB = MI->getParent();
454 // The offset is composed of two things: the sum of the sizes of all MBB's
455 // before this instruction's block, and the offset from the start of the block
457 unsigned Offset = BBOffsets[MBB->getNumber()];
459 // Sum instructions before MI in MBB.
460 for (MachineBasicBlock::iterator I = MBB->begin(); ; ++I) {
461 assert(I != MBB->end() && "Didn't find MI in its own basic block?");
462 if (&*I == MI) return Offset;
463 Offset += ARM::GetInstSize(I);
467 /// CompareMBBNumbers - Little predicate function to sort the WaterList by MBB
469 static bool CompareMBBNumbers(const MachineBasicBlock *LHS,
470 const MachineBasicBlock *RHS) {
471 return LHS->getNumber() < RHS->getNumber();
474 /// UpdateForInsertedWaterBlock - When a block is newly inserted into the
475 /// machine function, it upsets all of the block numbers. Renumber the blocks
476 /// and update the arrays that parallel this numbering.
477 void ARMConstantIslands::UpdateForInsertedWaterBlock(MachineBasicBlock *NewBB) {
478 // Renumber the MBB's to keep them consequtive.
479 NewBB->getParent()->RenumberBlocks(NewBB);
481 // Insert a size into BBSizes to align it properly with the (newly
482 // renumbered) block numbers.
483 BBSizes.insert(BBSizes.begin()+NewBB->getNumber(), 0);
485 // Likewise for BBOffsets.
486 BBOffsets.insert(BBOffsets.begin()+NewBB->getNumber(), 0);
488 // Next, update WaterList. Specifically, we need to add NewMBB as having
489 // available water after it.
490 std::vector<MachineBasicBlock*>::iterator IP =
491 std::lower_bound(WaterList.begin(), WaterList.end(), NewBB,
493 WaterList.insert(IP, NewBB);
497 /// Split the basic block containing MI into two blocks, which are joined by
498 /// an unconditional branch. Update datastructures and renumber blocks to
499 /// account for this change and returns the newly created block.
500 MachineBasicBlock *ARMConstantIslands::SplitBlockBeforeInstr(MachineInstr *MI) {
501 MachineBasicBlock *OrigBB = MI->getParent();
503 // Create a new MBB for the code after the OrigBB.
504 MachineBasicBlock *NewBB = new MachineBasicBlock(OrigBB->getBasicBlock());
505 MachineFunction::iterator MBBI = OrigBB; ++MBBI;
506 OrigBB->getParent()->getBasicBlockList().insert(MBBI, NewBB);
508 // Splice the instructions starting with MI over to NewBB.
509 NewBB->splice(NewBB->end(), OrigBB, MI, OrigBB->end());
511 // Add an unconditional branch from OrigBB to NewBB.
512 // Note the new unconditional branch is not being recorded.
513 BuildMI(OrigBB, TII->get(isThumb ? ARM::tB : ARM::B)).addMBB(NewBB);
516 // Update the CFG. All succs of OrigBB are now succs of NewBB.
517 while (!OrigBB->succ_empty()) {
518 MachineBasicBlock *Succ = *OrigBB->succ_begin();
519 OrigBB->removeSuccessor(Succ);
520 NewBB->addSuccessor(Succ);
522 // This pass should be run after register allocation, so there should be no
523 // PHI nodes to update.
524 assert((Succ->empty() || Succ->begin()->getOpcode() != TargetInstrInfo::PHI)
525 && "PHI nodes should be eliminated by now!");
528 // OrigBB branches to NewBB.
529 OrigBB->addSuccessor(NewBB);
531 // Update internal data structures to account for the newly inserted MBB.
532 // This is almost the same as UpdateForInsertedWaterBlock, except that
533 // the Water goes after OrigBB, not NewBB.
534 NewBB->getParent()->RenumberBlocks(NewBB);
536 // Insert a size into BBSizes to align it properly with the (newly
537 // renumbered) block numbers.
538 BBSizes.insert(BBSizes.begin()+NewBB->getNumber(), 0);
540 // Likewise for BBOffsets.
541 BBOffsets.insert(BBOffsets.begin()+NewBB->getNumber(), 0);
543 // Next, update WaterList. Specifically, we need to add OrigMBB as having
544 // available water after it (but not if it's already there, which happens
545 // when splitting before a conditional branch that is followed by an
546 // unconditional branch - in that case we want to insert NewBB).
547 std::vector<MachineBasicBlock*>::iterator IP =
548 std::lower_bound(WaterList.begin(), WaterList.end(), OrigBB,
550 MachineBasicBlock* WaterBB = *IP;
551 if (WaterBB == OrigBB)
552 WaterList.insert(next(IP), NewBB);
554 WaterList.insert(IP, OrigBB);
556 // Figure out how large the first NewMBB is.
557 unsigned NewBBSize = 0;
558 for (MachineBasicBlock::iterator I = NewBB->begin(), E = NewBB->end();
560 NewBBSize += ARM::GetInstSize(I);
562 unsigned OrigBBI = OrigBB->getNumber();
563 unsigned NewBBI = NewBB->getNumber();
564 // Set the size of NewBB in BBSizes.
565 BBSizes[NewBBI] = NewBBSize;
567 // We removed instructions from UserMBB, subtract that off from its size.
568 // Add 2 or 4 to the block to count the unconditional branch we added to it.
569 unsigned delta = isThumb ? 2 : 4;
570 BBSizes[OrigBBI] -= NewBBSize - delta;
572 // ...and adjust BBOffsets for NewBB accordingly.
573 BBOffsets[NewBBI] = BBOffsets[OrigBBI] + BBSizes[OrigBBI];
575 // All BBOffsets following these blocks must be modified.
576 AdjustBBOffsetsAfter(NewBB, delta);
581 /// OffsetIsInRange - Checks whether UserOffset is within MaxDisp of
583 bool ARMConstantIslands::OffsetIsInRange(unsigned UserOffset,
584 unsigned TrialOffset, unsigned MaxDisp, bool NegativeOK) {
585 if (UserOffset <= TrialOffset) {
586 // User before the Trial.
587 if (TrialOffset-UserOffset <= MaxDisp)
589 } else if (NegativeOK) {
590 if (UserOffset-TrialOffset <= MaxDisp)
596 /// WaterIsInRange - Returns true if a CPE placed after the specified
597 /// Water (a basic block) will be in range for the specific MI.
599 bool ARMConstantIslands::WaterIsInRange(unsigned UserOffset,
600 MachineBasicBlock* Water, unsigned MaxDisp)
602 unsigned CPEOffset = BBOffsets[Water->getNumber()] +
603 BBSizes[Water->getNumber()];
604 // If the Water is a constpool island, it has already been aligned.
608 Water->begin()->getOpcode() != ARM::CONSTPOOL_ENTRY))
611 // If the CPE is to be inserted before the instruction, that will raise
612 // the offset of the instruction.
613 if (CPEOffset < UserOffset)
614 UserOffset += isThumb ? 2 : 4;
616 return OffsetIsInRange (UserOffset, CPEOffset, MaxDisp, !isThumb);
619 /// CPEIsInRange - Returns true if the distance between specific MI and
620 /// specific ConstPool entry instruction can fit in MI's displacement field.
621 bool ARMConstantIslands::CPEIsInRange(MachineInstr *MI, unsigned UserOffset,
623 unsigned MaxDisp, bool DoDump) {
624 // In thumb mode, pessimistically assumes the .align 2 before the first CPE
625 // in the island adds two byte padding.
626 unsigned AlignAdj = isThumb ? 2 : 0;
627 unsigned CPEOffset = GetOffsetOf(CPEMI) + AlignAdj;
630 DOUT << "User of CPE#" << CPEMI->getOperand(0).getImm()
631 << " max delta=" << MaxDisp
632 << " insn address=" << UserOffset
633 << " CPE address=" << CPEOffset
634 << " offset=" << int(CPEOffset-UserOffset) << "\t" << *MI;
637 return OffsetIsInRange(UserOffset, CPEOffset, MaxDisp, !isThumb);
640 /// BBIsJumpedOver - Return true of the specified basic block's only predecessor
641 /// unconditionally branches to its only successor.
642 static bool BBIsJumpedOver(MachineBasicBlock *MBB) {
643 if (MBB->pred_size() != 1 || MBB->succ_size() != 1)
646 MachineBasicBlock *Succ = *MBB->succ_begin();
647 MachineBasicBlock *Pred = *MBB->pred_begin();
648 MachineInstr *PredMI = &Pred->back();
649 if (PredMI->getOpcode() == ARM::B || PredMI->getOpcode() == ARM::tB)
650 return PredMI->getOperand(0).getMBB() == Succ;
654 void ARMConstantIslands::AdjustBBOffsetsAfter(MachineBasicBlock *BB, int delta)
656 MachineFunction::iterator MBBI = BB->getParent()->end();
657 for(unsigned i=BB->getNumber()+1; i<BB->getParent()->getNumBlockIDs(); i++)
658 BBOffsets[i] += delta;
661 /// DecrementOldEntry - find the constant pool entry with index CPI
662 /// and instruction CPEMI, and decrement its refcount. If the refcount
663 /// becomes 0 remove the entry and instruction. Returns true if we removed
664 /// the entry, false if we didn't.
666 bool ARMConstantIslands::DecrementOldEntry(unsigned CPI, MachineInstr *CPEMI) {
667 // Find the old entry. Eliminate it if it is no longer used.
668 CPEntry *CPE = findConstPoolEntry(CPI, CPEMI);
669 assert(CPE && "Unexpected!");
670 if (--CPE->RefCount == 0) {
671 RemoveDeadCPEMI(CPEMI);
679 /// LookForCPEntryInRange - see if the currently referenced CPE is in range;
680 /// if not, see if an in-range clone of the CPE is in range, and if so,
681 /// change the data structures so the user references the clone. Returns:
682 /// 0 = no existing entry found
683 /// 1 = entry found, and there were no code insertions or deletions
684 /// 2 = entry found, and there were code insertions or deletions
685 int ARMConstantIslands::LookForExistingCPEntry(CPUser& U, unsigned UserOffset)
687 MachineInstr *UserMI = U.MI;
688 MachineInstr *CPEMI = U.CPEMI;
690 // Check to see if the CPE is already in-range.
691 if (CPEIsInRange(UserMI, UserOffset, CPEMI, U.MaxDisp, true)) {
692 DOUT << "In range\n";
696 // No. Look for previously created clones of the CPE that are in range.
697 unsigned CPI = CPEMI->getOperand(1).getConstantPoolIndex();
698 std::vector<CPEntry> &CPEs = CPEntries[CPI];
699 for (unsigned i = 0, e = CPEs.size(); i != e; ++i) {
700 // We already tried this one
701 if (CPEs[i].CPEMI == CPEMI)
703 // Removing CPEs can leave empty entries, skip
704 if (CPEs[i].CPEMI == NULL)
706 if (CPEIsInRange(UserMI, UserOffset, CPEs[i].CPEMI, U.MaxDisp, false)) {
707 DOUT << "Replacing CPE#" << CPI << " with CPE#" << CPEs[i].CPI << "\n";
708 // Point the CPUser node to the replacement
709 U.CPEMI = CPEs[i].CPEMI;
710 // Change the CPI in the instruction operand to refer to the clone.
711 for (unsigned j = 0, e = UserMI->getNumOperands(); j != e; ++j)
712 if (UserMI->getOperand(j).isConstantPoolIndex()) {
713 UserMI->getOperand(j).setConstantPoolIndex(CPEs[i].CPI);
716 // Adjust the refcount of the clone...
718 // ...and the original. If we didn't remove the old entry, none of the
719 // addresses changed, so we don't need another pass.
720 return DecrementOldEntry(CPI, CPEMI) ? 2 : 1;
726 /// getUnconditionalBrDisp - Returns the maximum displacement that can fit in
727 /// the specific unconditional branch instruction.
728 static inline unsigned getUnconditionalBrDisp(int Opc) {
729 return (Opc == ARM::tB) ? ((1<<10)-1)*2 : ((1<<23)-1)*4;
732 /// LookForWater - look for an existing entry in the WaterList in which
733 /// we can place the CPE referenced from U so it's within range of U's MI.
734 /// Returns true if found, false if not. If it returns true, *NewMBB
735 /// is set to the WaterList entry, and *PadNewWater is set to false if
736 /// the WaterList entry is an island.
738 bool ARMConstantIslands::LookForWater(CPUser &U, unsigned UserOffset,
739 bool *PadNewWater, MachineBasicBlock** NewMBB) {
740 if (!WaterList.empty()) {
741 for (std::vector<MachineBasicBlock*>::iterator IP = prior(WaterList.end()),
742 B = WaterList.begin();; --IP) {
743 MachineBasicBlock* WaterBB = *IP;
744 if (WaterIsInRange(UserOffset, WaterBB, U.MaxDisp)) {
745 DOUT << "found water in range\n";
746 // CPE goes before following block (NewMBB).
747 *NewMBB = next(MachineFunction::iterator(WaterBB));
748 // If WaterBB is an island, don't pad the new island.
749 // If WaterBB is empty, go backwards until we find something that
750 // isn't. WaterBB may become empty if it's an island whose
751 // contents were moved farther back.
753 MachineBasicBlock* BB = WaterBB;
755 BB = prior(MachineFunction::iterator(BB));
756 if (BB->begin()->getOpcode() == ARM::CONSTPOOL_ENTRY)
757 *PadNewWater = false;
759 // Remove the original WaterList entry; we want subsequent
760 // insertions in this vicinity to go after the one we're
761 // about to insert. This considerably reduces the number
762 // of times we have to move the same CPE more than once.
773 /// CreateNewWater - No existing WaterList entry will work for
774 /// CPUsers[CPUserIndex], so create a place to put the CPE. The end of the
775 /// block is used if in range, and the conditional branch munged so control
776 /// flow is correct. Otherwise the block is split to create a hole with an
777 /// unconditional branch around it. In either case *NewMBB is set to a
778 /// block following which the new island can be inserted (the WaterList
779 /// is not adjusted).
781 void ARMConstantIslands::CreateNewWater(unsigned CPUserIndex,
782 unsigned UserOffset, MachineBasicBlock** NewMBB) {
783 CPUser &U = CPUsers[CPUserIndex];
784 MachineInstr *UserMI = U.MI;
785 MachineInstr *CPEMI = U.CPEMI;
786 MachineBasicBlock *UserMBB = UserMI->getParent();
787 unsigned OffsetOfNextBlock = BBOffsets[UserMBB->getNumber()] +
788 BBSizes[UserMBB->getNumber()];
789 assert(OffsetOfNextBlock = BBOffsets[UserMBB->getNumber()+1]);
791 // If the use is at the end of the block, or the end of the block
792 // is within range, make new water there. (The +2 or 4 below is
793 // for the unconditional branch we will be adding. If the block ends in
794 // an unconditional branch already, it is water, and is known to
795 // be out of range, so we'll always be adding one.)
796 if (&UserMBB->back() == UserMI ||
797 OffsetIsInRange(UserOffset, OffsetOfNextBlock + (isThumb ? 2 : 4),
798 U.MaxDisp, !isThumb)) {
799 DOUT << "Split at end of block\n";
800 if (&UserMBB->back() == UserMI)
801 assert(BBHasFallthrough(UserMBB) && "Expected a fallthrough BB!");
802 *NewMBB = next(MachineFunction::iterator(UserMBB));
803 // Add an unconditional branch from UserMBB to fallthrough block.
804 // Record it for branch lengthening; this new branch will not get out of
805 // range, but if the preceding conditional branch is out of range, the
806 // targets will be exchanged, and the altered branch may be out of
807 // range, so the machinery has to know about it.
808 int UncondBr = isThumb ? ARM::tB : ARM::B;
809 BuildMI(UserMBB, TII->get(UncondBr)).addMBB(*NewMBB);
810 unsigned MaxDisp = getUnconditionalBrDisp(UncondBr);
811 ImmBranches.push_back(ImmBranch(&UserMBB->back(),
812 MaxDisp, false, UncondBr));
813 int delta = isThumb ? 2 : 4;
814 BBSizes[UserMBB->getNumber()] += delta;
815 AdjustBBOffsetsAfter(UserMBB, delta);
817 // What a big block. Find a place within the block to split it.
818 // This is a little tricky on Thumb since instructions are 2 bytes
819 // and constant pool entries are 4 bytes: if instruction I references
820 // island CPE, and instruction I+1 references CPE', it will
821 // not work well to put CPE as far forward as possible, since then
822 // CPE' cannot immediately follow it (that location is 2 bytes
823 // farther away from I+1 than CPE was from I) and we'd need to create
825 // The 4 in the following is for the unconditional branch we'll be
826 // inserting (allows for long branch on Thumb). The 2 or 0 is for
827 // alignment of the island.
828 unsigned BaseInsertOffset = UserOffset + U.MaxDisp -4 + (isThumb ? 2 : 0);
829 // This could point off the end of the block if we've already got
830 // constant pool entries following this block; only the last one is
831 // in the water list. Back past any possible branches (allow for a
832 // conditional and a maximally long unconditional).
833 if (BaseInsertOffset >= BBOffsets[UserMBB->getNumber()+1])
834 BaseInsertOffset = BBOffsets[UserMBB->getNumber()+1] -
836 unsigned EndInsertOffset = BaseInsertOffset +
837 CPEMI->getOperand(2).getImm();
838 MachineBasicBlock::iterator MI = UserMI;
840 unsigned CPUIndex = CPUserIndex+1;
841 for (unsigned Offset = UserOffset+ARM::GetInstSize(UserMI);
842 Offset < BaseInsertOffset;
843 Offset += ARM::GetInstSize(MI),
845 if (CPUIndex < CPUsers.size() && CPUsers[CPUIndex].MI == MI) {
846 if (!OffsetIsInRange(Offset, EndInsertOffset,
847 CPUsers[CPUIndex].MaxDisp, !isThumb)) {
848 BaseInsertOffset -= (isThumb ? 2 : 4);
849 EndInsertOffset -= (isThumb ? 2 : 4);
851 // This is overly conservative, as we don't account for CPEMIs
852 // being reused within the block, but it doesn't matter much.
853 EndInsertOffset += CPUsers[CPUIndex].CPEMI->getOperand(2).getImm();
857 DOUT << "Split in middle of big block\n";
858 *NewMBB = SplitBlockBeforeInstr(prior(MI));
862 /// HandleConstantPoolUser - Analyze the specified user, checking to see if it
863 /// is out-of-range. If so, pick it up the constant pool value and move it some
864 /// place in-range. Return true if we changed any addresses (thus must run
865 /// another pass of branch lengthening), false otherwise.
866 bool ARMConstantIslands::HandleConstantPoolUser(MachineFunction &Fn,
867 unsigned CPUserIndex){
868 CPUser &U = CPUsers[CPUserIndex];
869 MachineInstr *UserMI = U.MI;
870 MachineInstr *CPEMI = U.CPEMI;
871 unsigned CPI = CPEMI->getOperand(1).getConstantPoolIndex();
872 unsigned Size = CPEMI->getOperand(2).getImm();
873 MachineBasicBlock *NewMBB;
874 // Compute this only once, it's expensive
875 unsigned UserOffset = GetOffsetOf(UserMI) + (isThumb ? 4 : 8);
877 // Special case: tLEApcrel are two instructions MI's. The actual user is the
878 // second instruction.
879 if (UserMI->getOpcode() == ARM::tLEApcrel)
882 // See if the current entry is within range, or there is a clone of it
884 int result = LookForExistingCPEntry(U, UserOffset);
885 if (result==1) return false;
886 else if (result==2) return true;
888 // No existing clone of this CPE is within range.
889 // We will be generating a new clone. Get a UID for it.
890 unsigned ID = NextUID++;
892 // Look for water where we can place this CPE. We look for the farthest one
893 // away that will work. Forward references only for now (although later
894 // we might find some that are backwards).
895 bool PadNewWater = true;
897 if (!LookForWater(U, UserOffset, &PadNewWater, &NewMBB)) {
899 DOUT << "No water found\n";
900 CreateNewWater(CPUserIndex, UserOffset, &NewMBB);
903 // Okay, we know we can put an island before NewMBB now, do it!
904 MachineBasicBlock *NewIsland = new MachineBasicBlock();
905 Fn.getBasicBlockList().insert(NewMBB, NewIsland);
907 // Update internal data structures to account for the newly inserted MBB.
908 UpdateForInsertedWaterBlock(NewIsland);
910 // Decrement the old entry, and remove it if refcount becomes 0.
911 DecrementOldEntry(CPI, CPEMI);
913 // Now that we have an island to add the CPE to, clone the original CPE and
914 // add it to the island.
915 U.CPEMI = BuildMI(NewIsland, TII->get(ARM::CONSTPOOL_ENTRY))
916 .addImm(ID).addConstantPoolIndex(CPI).addImm(Size);
917 CPEntries[CPI].push_back(CPEntry(U.CPEMI, ID, 1));
920 // Compensate for .align 2 in thumb mode.
921 if (isThumb && PadNewWater) Size += 2;
922 // Increase the size of the island block to account for the new entry.
923 BBSizes[NewIsland->getNumber()] += Size;
924 BBOffsets[NewIsland->getNumber()] = BBOffsets[NewMBB->getNumber()];
925 AdjustBBOffsetsAfter(NewIsland, Size);
927 // Finally, change the CPI in the instruction operand to be ID.
928 for (unsigned i = 0, e = UserMI->getNumOperands(); i != e; ++i)
929 if (UserMI->getOperand(i).isConstantPoolIndex()) {
930 UserMI->getOperand(i).setConstantPoolIndex(ID);
934 DOUT << " Moved CPE to #" << ID << " CPI=" << CPI << "\t" << *UserMI;
939 /// RemoveDeadCPEMI - Remove a dead constant pool entry instruction. Update
940 /// sizes and offsets of impacted basic blocks.
941 void ARMConstantIslands::RemoveDeadCPEMI(MachineInstr *CPEMI) {
942 MachineBasicBlock *CPEBB = CPEMI->getParent();
943 if (CPEBB->empty()) {
944 // In thumb mode, the size of island is padded by two to compensate for
945 // the alignment requirement. Thus it will now be 2 when the block is
946 // empty, so fix this.
947 // All succeeding offsets have the current size value added in, fix this.
948 if (BBSizes[CPEBB->getNumber()] != 0) {
949 AdjustBBOffsetsAfter(CPEBB, -BBSizes[CPEBB->getNumber()]);
950 BBSizes[CPEBB->getNumber()] = 0;
952 // An island has only one predecessor BB and one successor BB. Check if
953 // this BB's predecessor jumps directly to this BB's successor. This
954 // shouldn't happen currently.
955 assert(!BBIsJumpedOver(CPEBB) && "How did this happen?");
956 // FIXME: remove the empty blocks after all the work is done?
958 unsigned Size = CPEMI->getOperand(2).getImm();
959 BBSizes[CPEBB->getNumber()] -= Size;
960 // All succeeding offsets have the current size value added in, fix this.
961 AdjustBBOffsetsAfter(CPEBB, -Size);
964 CPEMI->eraseFromParent();
967 /// RemoveUnusedCPEntries - Remove constant pool entries whose refcounts
969 bool ARMConstantIslands::RemoveUnusedCPEntries() {
970 unsigned MadeChange = false;
971 for (unsigned i = 0, e = CPEntries.size(); i != e; ++i) {
972 std::vector<CPEntry> &CPEs = CPEntries[i];
973 for (unsigned j = 0, ee = CPEs.size(); j != ee; ++j) {
974 if (CPEs[j].RefCount == 0 && CPEs[j].CPEMI) {
975 RemoveDeadCPEMI(CPEs[j].CPEMI);
976 CPEs[j].CPEMI = NULL;
984 /// BBIsInRange - Returns true if the distance between specific MI and
985 /// specific BB can fit in MI's displacement field.
986 bool ARMConstantIslands::BBIsInRange(MachineInstr *MI,MachineBasicBlock *DestBB,
988 unsigned PCAdj = isThumb ? 4 : 8;
989 unsigned BrOffset = GetOffsetOf(MI) + PCAdj;
990 unsigned DestOffset = BBOffsets[DestBB->getNumber()];
992 DOUT << "Branch of destination BB#" << DestBB->getNumber()
993 << " from BB#" << MI->getParent()->getNumber()
994 << " max delta=" << MaxDisp
995 << " at offset " << int(DestOffset-BrOffset) << "\t" << *MI;
997 return OffsetIsInRange(BrOffset, DestOffset, MaxDisp, true);
1000 /// FixUpImmediateBr - Fix up an immediate branch whose destination is too far
1001 /// away to fit in its displacement field.
1002 bool ARMConstantIslands::FixUpImmediateBr(MachineFunction &Fn, ImmBranch &Br) {
1003 MachineInstr *MI = Br.MI;
1004 MachineBasicBlock *DestBB = MI->getOperand(0).getMachineBasicBlock();
1006 // Check to see if the DestBB is already in-range.
1007 if (BBIsInRange(MI, DestBB, Br.MaxDisp))
1011 return FixUpUnconditionalBr(Fn, Br);
1012 return FixUpConditionalBr(Fn, Br);
1015 /// FixUpUnconditionalBr - Fix up an unconditional branch whose destination is
1016 /// too far away to fit in its displacement field. If the LR register has been
1017 /// spilled in the epilogue, then we can use BL to implement a far jump.
1018 /// Otherwise, add an intermediate branch instruction to to a branch.
1020 ARMConstantIslands::FixUpUnconditionalBr(MachineFunction &Fn, ImmBranch &Br) {
1021 MachineInstr *MI = Br.MI;
1022 MachineBasicBlock *MBB = MI->getParent();
1023 assert(isThumb && "Expected a Thumb function!");
1025 // Use BL to implement far jump.
1026 Br.MaxDisp = (1 << 21) * 2;
1027 MI->setInstrDescriptor(TII->get(ARM::tBfar));
1028 BBSizes[MBB->getNumber()] += 2;
1029 AdjustBBOffsetsAfter(MBB, 2);
1033 DOUT << " Changed B to long jump " << *MI;
1038 /// FixUpConditionalBr - Fix up a conditional branch whose destination is too
1039 /// far away to fit in its displacement field. It is converted to an inverse
1040 /// conditional branch + an unconditional branch to the destination.
1042 ARMConstantIslands::FixUpConditionalBr(MachineFunction &Fn, ImmBranch &Br) {
1043 MachineInstr *MI = Br.MI;
1044 MachineBasicBlock *DestBB = MI->getOperand(0).getMachineBasicBlock();
1046 // Add a unconditional branch to the destination and invert the branch
1047 // condition to jump over it:
1053 ARMCC::CondCodes CC = (ARMCC::CondCodes)MI->getOperand(1).getImmedValue();
1054 CC = ARMCC::getOppositeCondition(CC);
1056 // If the branch is at the end of its MBB and that has a fall-through block,
1057 // direct the updated conditional branch to the fall-through block. Otherwise,
1058 // split the MBB before the next instruction.
1059 MachineBasicBlock *MBB = MI->getParent();
1060 MachineInstr *BMI = &MBB->back();
1061 bool NeedSplit = (BMI != MI) || !BBHasFallthrough(MBB);
1065 if (next(MachineBasicBlock::iterator(MI)) == MBB->back() &&
1066 BMI->getOpcode() == Br.UncondBr) {
1067 // Last MI in the BB is a unconditional branch. Can we simply invert the
1068 // condition and swap destinations:
1074 MachineBasicBlock *NewDest = BMI->getOperand(0).getMachineBasicBlock();
1075 if (BBIsInRange(MI, NewDest, Br.MaxDisp)) {
1076 DOUT << " Invert Bcc condition and swap its destination with " << *BMI;
1077 BMI->getOperand(0).setMachineBasicBlock(DestBB);
1078 MI->getOperand(0).setMachineBasicBlock(NewDest);
1079 MI->getOperand(1).setImm(CC);
1086 SplitBlockBeforeInstr(MI);
1087 // No need for the branch to the next block. We're adding a unconditional
1088 // branch to the destination.
1089 int delta = ARM::GetInstSize(&MBB->back());
1090 BBSizes[MBB->getNumber()] -= delta;
1091 AdjustBBOffsetsAfter(MBB, -delta);
1092 MBB->back().eraseFromParent();
1094 MachineBasicBlock *NextBB = next(MachineFunction::iterator(MBB));
1096 DOUT << " Insert B to BB#" << DestBB->getNumber()
1097 << " also invert condition and change dest. to BB#"
1098 << NextBB->getNumber() << "\n";
1100 // Insert a new conditional branch and a new unconditional branch.
1101 // Also update the ImmBranch as well as adding a new entry for the new branch.
1102 BuildMI(MBB, TII->get(MI->getOpcode())).addMBB(NextBB).addImm(CC);
1103 Br.MI = &MBB->back();
1104 BBSizes[MBB->getNumber()] += ARM::GetInstSize(&MBB->back());
1105 BuildMI(MBB, TII->get(Br.UncondBr)).addMBB(DestBB);
1106 BBSizes[MBB->getNumber()] += ARM::GetInstSize(&MBB->back());
1107 unsigned MaxDisp = getUnconditionalBrDisp(Br.UncondBr);
1108 ImmBranches.push_back(ImmBranch(&MBB->back(), MaxDisp, false, Br.UncondBr));
1110 // Remove the old conditional branch. It may or may not still be in MBB.
1111 BBSizes[MI->getParent()->getNumber()] -= ARM::GetInstSize(MI);
1112 MI->eraseFromParent();
1114 // The net size change is an addition of one unconditional branch.
1115 int delta = ARM::GetInstSize(&MBB->back());
1116 AdjustBBOffsetsAfter(MBB, delta);
1120 /// UndoLRSpillRestore - Remove Thumb push / pop instructions that only spills
1121 /// LR / restores LR to pc.
1122 bool ARMConstantIslands::UndoLRSpillRestore() {
1123 bool MadeChange = false;
1124 for (unsigned i = 0, e = PushPopMIs.size(); i != e; ++i) {
1125 MachineInstr *MI = PushPopMIs[i];
1126 if (MI->getNumOperands() == 1) {
1127 if (MI->getOpcode() == ARM::tPOP_RET &&
1128 MI->getOperand(0).getReg() == ARM::PC)
1129 BuildMI(MI->getParent(), TII->get(ARM::tBX_RET));
1130 MI->eraseFromParent();