1 //===-- ARMFeatures.h - Checks for ARM instruction features -----*- C++ -*-===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file contains the code shared between ARM CodeGen and ARM MC
12 //===----------------------------------------------------------------------===//
14 #ifndef TARGET_ARM_FEATURES_H
15 #define TARGET_ARM_FEATURES_H
17 #include "MCTargetDesc/ARMMCTargetDesc.h"
21 template<typename InstrType> // could be MachineInstr or MCInst
22 bool IsCPSRDead(InstrType *Instr);
24 template<typename InstrType> // could be MachineInstr or MCInst
25 inline bool isV8EligibleForIT(InstrType *Instr) {
26 switch (Instr->getOpcode()) {
52 // Outside of an IT block, these set CPSR.
53 return IsCPSRDead(Instr);
76 // there are some "conditionally deprecated" opcodes
79 return Instr->getOperand(2).getReg() != ARM::PC;
80 // ADD PC, SP and BLX PC were always unpredictable,
81 // now on top of it they're deprecated
84 return Instr->getOperand(0).getReg() != ARM::PC;
86 return Instr->getOperand(0).getReg() != ARM::PC &&
87 Instr->getOperand(2).getReg() != ARM::PC;
90 return Instr->getOperand(0).getReg() != ARM::PC &&
91 Instr->getOperand(1).getReg() != ARM::PC;