1 //===-- ARMJITInfo.cpp - Implement the JIT interfaces for the ARM target --===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file implements the JIT interfaces for the ARM target.
12 //===----------------------------------------------------------------------===//
14 #define DEBUG_TYPE "jit"
15 #include "ARMJITInfo.h"
16 #include "ARMConstantPoolValue.h"
17 #include "ARMRelocations.h"
18 #include "ARMSubtarget.h"
19 #include "llvm/Function.h"
20 #include "llvm/CodeGen/MachineCodeEmitter.h"
21 #include "llvm/Config/alloca.h"
22 #include "llvm/Support/Debug.h"
23 #include "llvm/Support/Streams.h"
24 #include "llvm/System/Memory.h"
28 void ARMJITInfo::replaceMachineCodeForFunction(void *Old, void *New) {
32 /// JITCompilerFunction - This contains the address of the JIT function used to
33 /// compile a function lazily.
34 static TargetJITInfo::JITCompilerFn JITCompilerFunction;
36 // Get the ASMPREFIX for the current host. This is often '_'.
37 #ifndef __USER_LABEL_PREFIX__
38 #define __USER_LABEL_PREFIX__
40 #define GETASMPREFIX2(X) #X
41 #define GETASMPREFIX(X) GETASMPREFIX2(X)
42 #define ASMPREFIX GETASMPREFIX(__USER_LABEL_PREFIX__)
44 // CompilationCallback stub - We can't use a C function with inline assembly in
45 // it, because we the prolog/epilog inserted by GCC won't work for us (we need
46 // to preserve more context and manipulate the stack directly). Instead,
47 // write our own wrapper, which does things our way, so we have complete
48 // control over register saving and restoring.
51 void ARMCompilationCallback(void);
55 ".globl " ASMPREFIX "ARMCompilationCallback\n"
56 ASMPREFIX "ARMCompilationCallback:\n"
57 // Save caller saved registers since they may contain stuff
58 // for the real target function right now. We have to act as if this
59 // whole compilation callback doesn't exist as far as the caller is
60 // concerned, so we can't just preserve the callee saved regs.
61 "stmdb sp!, {r0, r1, r2, r3, lr}\n"
62 // The LR contains the address of the stub function on entry.
63 // pass it as the argument to the C part of the callback
66 // Call the C portion of the callback
67 "bl " ASMPREFIX "ARMCompilationCallbackC\n"
69 // Restoring the LR to the return address of the function that invoked
70 // the stub and de-allocating the stack space for it requires us to
71 // swap the two saved LR values on the stack, as they're backwards
72 // for what we need since the pop instruction has a pre-determined
73 // order for the registers.
75 // 0 | LR | Original return address
77 // 1 | LR | Stub address (start of stub)
78 // 2-5 | R3..R0 | Saved registers (we need to preserve all regs)
81 // We need to exchange the values in slots 0 and 1 so we can
82 // return to the address in slot 1 with the address in slot 0
83 // restored to the LR.
88 // Return to the (newly modified) stub to invoke the real function.
89 // The above twiddling of the saved return addresses allows us to
90 // deallocate everything, including the LR the stub saved, all in one
92 "ldmia sp!, {r0, r1, r2, r3, lr, pc}\n"
94 #else // Not an ARM host
95 void ARMCompilationCallback() {
96 assert(0 && "Cannot call ARMCompilationCallback() on a non-ARM arch!\n");
102 /// ARMCompilationCallbackC - This is the target-specific function invoked
103 /// by the function stub when we did not know the real target of a call.
104 /// This function must locate the start of the stub or call site and pass
105 /// it into the JIT compiler function.
106 extern "C" void ARMCompilationCallbackC(intptr_t StubAddr) {
107 // Get the address of the compiled code for this function.
108 intptr_t NewVal = (intptr_t)JITCompilerFunction((void*)StubAddr);
110 // Rewrite the call target... so that we don't end up here every time we
111 // execute the call. We're replacing the first two instructions of the
115 if (!sys::Memory::setRangeWritable((void*)StubAddr, 8)) {
116 cerr << "ERROR: Unable to mark stub writable\n";
119 *(intptr_t *)StubAddr = 0xe51ff004; // ldr pc, [pc, #-4]
120 *(intptr_t *)(StubAddr+4) = NewVal;
121 if (!sys::Memory::setRangeExecutable((void*)StubAddr, 8)) {
122 cerr << "ERROR: Unable to mark stub executable\n";
127 TargetJITInfo::LazyResolverFn
128 ARMJITInfo::getLazyResolverFunction(JITCompilerFn F) {
129 JITCompilerFunction = F;
130 return ARMCompilationCallback;
133 void *ARMJITInfo::emitGlobalValueIndirectSym(const GlobalValue *GV, void *Ptr,
134 MachineCodeEmitter &MCE) {
135 MCE.startGVStub(GV, 4, 4);
136 MCE.emitWordLE((intptr_t)Ptr);
137 void *PtrAddr = MCE.finishGVStub(GV);
138 addIndirectSymAddr(Ptr, (intptr_t)PtrAddr);
142 void *ARMJITInfo::emitFunctionStub(const Function* F, void *Fn,
143 MachineCodeEmitter &MCE) {
144 // If this is just a call to an external function, emit a branch instead of a
145 // call. The code is the same except for one bit of the last instruction.
146 if (Fn != (void*)(intptr_t)ARMCompilationCallback) {
147 // Branch to the corresponding function addr.
149 // The stub is 8-byte size and 4-aligned.
150 intptr_t LazyPtr = getIndirectSymAddr(Fn);
152 // In PIC mode, the function stub is loading a lazy-ptr.
153 LazyPtr= (intptr_t)emitGlobalValueIndirectSym((GlobalValue*)F, Fn, MCE);
155 DOUT << "JIT: Indirect symbol emitted at [" << LazyPtr << "] for GV '"
156 << F->getName() << "'\n";
158 DOUT << "JIT: Stub emitted at [" << LazyPtr
159 << "] for external function at '" << Fn << "'\n";
161 MCE.startGVStub(F, 16, 4);
162 intptr_t Addr = (intptr_t)MCE.getCurrentPCValue();
163 MCE.emitWordLE(0xe59fc004); // ldr pc, [pc, #+4]
164 MCE.emitWordLE(0xe08fc00c); // L_func$scv: add ip, pc, ip
165 MCE.emitWordLE(0xe59cf000); // ldr pc, [ip]
166 MCE.emitWordLE(LazyPtr - (Addr+4+8)); // func - (L_func$scv+8)
167 sys::Memory::InvalidateInstructionCache((void*)Addr, 16);
169 // The stub is 8-byte size and 4-aligned.
170 MCE.startGVStub(F, 8, 4);
171 intptr_t Addr = (intptr_t)MCE.getCurrentPCValue();
172 MCE.emitWordLE(0xe51ff004); // ldr pc, [pc, #-4]
173 MCE.emitWordLE((intptr_t)Fn); // addr of function
174 sys::Memory::InvalidateInstructionCache((void*)Addr, 8);
177 // The compilation callback will overwrite the first two words of this
178 // stub with indirect branch instructions targeting the compiled code.
179 // This stub sets the return address to restart the stub, so that
180 // the new branch will be invoked when we come back.
182 // Branch and link to the compilation callback.
183 // The stub is 16-byte size and 4-byte aligned.
184 MCE.startGVStub(F, 16, 4);
185 intptr_t Addr = (intptr_t)MCE.getCurrentPCValue();
186 // Save LR so the callback can determine which stub called it.
187 // The compilation callback is responsible for popping this prior
189 MCE.emitWordLE(0xe92d4000); // push {lr}
190 // Set the return address to go back to the start of this stub.
191 MCE.emitWordLE(0xe24fe00c); // sub lr, pc, #12
192 // Invoke the compilation callback.
193 MCE.emitWordLE(0xe51ff004); // ldr pc, [pc, #-4]
194 // The address of the compilation callback.
195 MCE.emitWordLE((intptr_t)ARMCompilationCallback);
196 sys::Memory::InvalidateInstructionCache((void*)Addr, 16);
199 return MCE.finishGVStub(F);
202 intptr_t ARMJITInfo::resolveRelocDestAddr(MachineRelocation *MR) const {
203 ARM::RelocationType RT = (ARM::RelocationType)MR->getRelocationType();
204 if (RT == ARM::reloc_arm_pic_jt)
205 // Destination address - jump table base.
206 return (intptr_t)(MR->getResultPointer()) - MR->getConstantVal();
207 else if (RT == ARM::reloc_arm_jt_base)
208 // Jump table base address.
209 return getJumpTableBaseAddr(MR->getJumpTableIndex());
210 else if (RT == ARM::reloc_arm_cp_entry)
211 // Constant pool entry address.
212 return getConstantPoolEntryAddr(MR->getConstantPoolIndex());
213 else if (RT == ARM::reloc_arm_machine_cp_entry) {
214 ARMConstantPoolValue *ACPV = (ARMConstantPoolValue*)MR->getConstantVal();
215 assert((!ACPV->hasModifier() && !ACPV->mustAddCurrentAddress()) &&
216 "Can't handle this machine constant pool entry yet!");
217 intptr_t Addr = (intptr_t)(MR->getResultPointer());
218 Addr -= getPCLabelAddr(ACPV->getLabelId()) + ACPV->getPCAdjustment();
221 return (intptr_t)(MR->getResultPointer());
224 /// relocate - Before the JIT can run a block of code that has been emitted,
225 /// it must rewrite the code to contain the actual addresses of any
226 /// referenced global symbols.
227 void ARMJITInfo::relocate(void *Function, MachineRelocation *MR,
228 unsigned NumRelocs, unsigned char* GOTBase) {
229 for (unsigned i = 0; i != NumRelocs; ++i, ++MR) {
230 void *RelocPos = (char*)Function + MR->getMachineCodeOffset();
231 intptr_t ResultPtr = resolveRelocDestAddr(MR);
232 switch ((ARM::RelocationType)MR->getRelocationType()) {
233 case ARM::reloc_arm_cp_entry:
234 case ARM::reloc_arm_relative: {
235 // It is necessary to calculate the correct PC relative value. We
236 // subtract the base addr from the target addr to form a byte offset.
237 ResultPtr = ResultPtr-(intptr_t)RelocPos-8;
238 // If the result is positive, set bit U(23) to 1.
240 *((unsigned*)RelocPos) |= 1 << 23;
242 // Otherwise, obtain the absolute value and set
245 *((unsigned*)RelocPos) &= 0xFF7FFFFF;
247 // Set the immed value calculated.
248 *((unsigned*)RelocPos) |= (unsigned)ResultPtr;
249 // Set register Rn to PC.
250 *((unsigned*)RelocPos) |= 0xF << 16;
253 case ARM::reloc_arm_pic_jt:
254 case ARM::reloc_arm_machine_cp_entry:
255 case ARM::reloc_arm_absolute: {
256 // These addresses have already been resolved.
257 *((unsigned*)RelocPos) |= (unsigned)ResultPtr;
260 case ARM::reloc_arm_branch: {
261 // It is necessary to calculate the correct value of signed_immed_24
262 // field. We subtract the base addr from the target addr to form a
263 // byte offset, which must be inside the range -33554432 and +33554428.
264 // Then, we set the signed_immed_24 field of the instruction to bits
265 // [25:2] of the byte offset. More details ARM-ARM p. A4-11.
266 ResultPtr = ResultPtr - (intptr_t)RelocPos - 8;
267 ResultPtr = (ResultPtr & 0x03FFFFFC) >> 2;
268 assert(ResultPtr >= -33554432 && ResultPtr <= 33554428);
269 *((unsigned*)RelocPos) |= ResultPtr;
272 case ARM::reloc_arm_jt_base: {
273 // JT base - (instruction addr + 8)
274 ResultPtr = ResultPtr - (intptr_t)RelocPos - 8;
275 *((unsigned*)RelocPos) |= ResultPtr;