1 //====- ARMMachineFuctionInfo.h - ARM machine function info -----*- C++ -*-===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file declares ARM-specific per-machine-function information.
12 //===----------------------------------------------------------------------===//
14 #ifndef ARMMACHINEFUNCTIONINFO_H
15 #define ARMMACHINEFUNCTIONINFO_H
17 #include "ARMSubtarget.h"
18 #include "llvm/CodeGen/MachineFunction.h"
19 #include "llvm/Target/TargetRegisterInfo.h"
20 #include "llvm/Target/TargetMachine.h"
21 #include "llvm/ADT/BitVector.h"
25 /// ARMFunctionInfo - This class is derived from MachineFunction private
26 /// ARM target-specific information for each MachineFunction.
27 class ARMFunctionInfo : public MachineFunctionInfo {
29 /// isThumb - True if this function is compiled under Thumb mode.
30 /// Used to initialized Align, so must precede it.
33 /// Align - required alignment. ARM functions and Thumb functions with
34 /// constant pools require 4-byte alignment; other Thumb functions
35 /// require only 2-byte alignment.
38 /// VarArgsRegSaveSize - Size of the register save area for vararg functions.
40 unsigned VarArgsRegSaveSize;
42 /// HasStackFrame - True if this function has a stack frame. Set by
43 /// processFunctionBeforeCalleeSavedScan().
46 /// LRSpilledForFarJump - True if the LR register has been for spilled to
48 bool LRSpilledForFarJump;
50 /// R3IsLiveIn - True if R3 is live in to this function.
51 /// FIXME: Remove when register scavenger for Thumb is done.
54 /// FramePtrSpillOffset - If HasStackFrame, this records the frame pointer
55 /// spill stack offset.
56 unsigned FramePtrSpillOffset;
58 /// GPRCS1Offset, GPRCS2Offset, DPRCSOffset - Starting offset of callee saved
59 /// register spills areas. For Mac OS X:
61 /// GPR callee-saved (1) : r4, r5, r6, r7, lr
62 /// --------------------------------------------
63 /// GPR callee-saved (2) : r8, r10, r11
64 /// --------------------------------------------
65 /// DPR callee-saved : d8 - d15
66 unsigned GPRCS1Offset;
67 unsigned GPRCS2Offset;
70 /// GPRCS1Size, GPRCS2Size, DPRCSSize - Sizes of callee saved register spills
76 /// GPRCS1Frames, GPRCS2Frames, DPRCSFrames - Keeps track of frame indices
77 /// which belong to these spill areas.
78 BitVector GPRCS1Frames;
79 BitVector GPRCS2Frames;
80 BitVector DPRCSFrames;
82 /// SpilledCSRegs - A BitVector mask of all spilled callee-saved registers.
84 BitVector SpilledCSRegs;
86 /// JumpTableUId - Unique id for jumptables.
88 unsigned JumpTableUId;
94 VarArgsRegSaveSize(0), HasStackFrame(false),
95 LRSpilledForFarJump(false), R3IsLiveIn(false),
96 FramePtrSpillOffset(0), GPRCS1Offset(0), GPRCS2Offset(0), DPRCSOffset(0),
97 GPRCS1Size(0), GPRCS2Size(0), DPRCSSize(0),
98 GPRCS1Frames(0), GPRCS2Frames(0), DPRCSFrames(0),
101 ARMFunctionInfo(MachineFunction &MF) :
102 isThumb(MF.getTarget().getSubtarget<ARMSubtarget>().isThumb()),
103 Align(isThumb ? 1U : 2U),
104 VarArgsRegSaveSize(0), HasStackFrame(false),
105 LRSpilledForFarJump(false), R3IsLiveIn(false),
106 FramePtrSpillOffset(0), GPRCS1Offset(0), GPRCS2Offset(0), DPRCSOffset(0),
107 GPRCS1Size(0), GPRCS2Size(0), DPRCSSize(0),
108 GPRCS1Frames(32), GPRCS2Frames(32), DPRCSFrames(32),
109 SpilledCSRegs(MF.getTarget().getRegisterInfo()->getNumRegs()),
112 bool isThumbFunction() const { return isThumb; }
114 unsigned getAlign() const { return Align; }
115 void setAlign(unsigned a) { Align = a; }
117 unsigned getVarArgsRegSaveSize() const { return VarArgsRegSaveSize; }
118 void setVarArgsRegSaveSize(unsigned s) { VarArgsRegSaveSize = s; }
120 bool hasStackFrame() const { return HasStackFrame; }
121 void setHasStackFrame(bool s) { HasStackFrame = s; }
123 bool isLRSpilledForFarJump() const { return LRSpilledForFarJump; }
124 void setLRIsSpilledForFarJump(bool s) { LRSpilledForFarJump = s; }
126 // FIXME: Remove when register scavenger for Thumb is done.
127 bool isR3LiveIn() const { return R3IsLiveIn; }
128 void setR3IsLiveIn(bool l) { R3IsLiveIn = l; }
130 unsigned getFramePtrSpillOffset() const { return FramePtrSpillOffset; }
131 void setFramePtrSpillOffset(unsigned o) { FramePtrSpillOffset = o; }
133 unsigned getGPRCalleeSavedArea1Offset() const { return GPRCS1Offset; }
134 unsigned getGPRCalleeSavedArea2Offset() const { return GPRCS2Offset; }
135 unsigned getDPRCalleeSavedAreaOffset() const { return DPRCSOffset; }
137 void setGPRCalleeSavedArea1Offset(unsigned o) { GPRCS1Offset = o; }
138 void setGPRCalleeSavedArea2Offset(unsigned o) { GPRCS2Offset = o; }
139 void setDPRCalleeSavedAreaOffset(unsigned o) { DPRCSOffset = o; }
141 unsigned getGPRCalleeSavedArea1Size() const { return GPRCS1Size; }
142 unsigned getGPRCalleeSavedArea2Size() const { return GPRCS2Size; }
143 unsigned getDPRCalleeSavedAreaSize() const { return DPRCSSize; }
145 void setGPRCalleeSavedArea1Size(unsigned s) { GPRCS1Size = s; }
146 void setGPRCalleeSavedArea2Size(unsigned s) { GPRCS2Size = s; }
147 void setDPRCalleeSavedAreaSize(unsigned s) { DPRCSSize = s; }
149 bool isGPRCalleeSavedArea1Frame(int fi) const {
150 if (fi < 0 || fi >= (int)GPRCS1Frames.size())
152 return GPRCS1Frames[fi];
154 bool isGPRCalleeSavedArea2Frame(int fi) const {
155 if (fi < 0 || fi >= (int)GPRCS2Frames.size())
157 return GPRCS2Frames[fi];
159 bool isDPRCalleeSavedAreaFrame(int fi) const {
160 if (fi < 0 || fi >= (int)DPRCSFrames.size())
162 return DPRCSFrames[fi];
165 void addGPRCalleeSavedArea1Frame(int fi) {
167 int Size = GPRCS1Frames.size();
172 GPRCS1Frames.resize(Size);
174 GPRCS1Frames[fi] = true;
177 void addGPRCalleeSavedArea2Frame(int fi) {
179 int Size = GPRCS2Frames.size();
184 GPRCS2Frames.resize(Size);
186 GPRCS2Frames[fi] = true;
189 void addDPRCalleeSavedAreaFrame(int fi) {
191 int Size = DPRCSFrames.size();
196 DPRCSFrames.resize(Size);
198 DPRCSFrames[fi] = true;
202 void setCSRegisterIsSpilled(unsigned Reg) {
203 SpilledCSRegs.set(Reg);
206 bool isCSRegisterSpilled(unsigned Reg) {
207 return SpilledCSRegs[Reg];
210 const BitVector &getSpilledCSRegisters() const {
211 return SpilledCSRegs;
214 unsigned createJumpTableUId() {
215 return JumpTableUId++;
218 } // End llvm namespace
220 #endif // ARMMACHINEFUNCTIONINFO_H