1 //===-- ARMSubtarget.cpp - ARM Subtarget Information ------------*- C++ -*-===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file implements the ARM specific subclass of TargetSubtarget.
12 //===----------------------------------------------------------------------===//
14 #include "ARMSubtarget.h"
15 #include "ARMGenSubtarget.inc"
16 #include "llvm/GlobalValue.h"
17 #include "llvm/Target/TargetOptions.h"
18 #include "llvm/Support/CommandLine.h"
19 #include "llvm/ADT/SmallVector.h"
23 ReserveR9("arm-reserve-r9", cl::Hidden,
24 cl::desc("Reserve R9, making it unavailable as GPR"));
27 UseMOVT("arm-use-movt",
28 cl::init(true), cl::Hidden);
31 StrictAlign("arm-strict-align", cl::Hidden,
32 cl::desc("Disallow all unaligned memory accesses"));
34 ARMSubtarget::ARMSubtarget(const std::string &TT, const std::string &FS,
37 , ARMProcFamily(Others)
39 , UseNEONForSinglePrecisionFP(false)
45 , PostRAScheduler(false)
46 , IsR9Reserved(ReserveR9)
50 , HasHardwareDivide(false)
51 , HasT2ExtractPack(false)
52 , HasDataBarrier(false)
53 , Pref32BitThumb(false)
54 , HasMPExtension(false)
56 , AllowsUnalignedMem(false)
58 , CPUString("generic")
59 , TargetType(isELF) // Default to ELF unless otherwise specified.
60 , TargetABI(ARM_ABI_APCS) {
61 // Default to soft float ABI
62 if (FloatABIType == FloatABI::Default)
63 FloatABIType = FloatABI::Soft;
65 // Determine default and user specified characteristics
67 // Parse features string.
68 CPUString = ParseSubtargetFeatures(FS, CPUString);
70 // When no arch is specified either by CPU or by attributes, make the default
72 if (CPUString == "generic" && (FS.empty() || FS == "generic"))
75 // Set the boolean corresponding to the current target triple, or the default
76 // if one cannot be determined, to true.
77 unsigned Len = TT.length();
80 if (Len >= 5 && TT.substr(0, 4) == "armv")
82 else if (Len >= 6 && TT.substr(0, 5) == "thumb") {
84 if (Len >= 7 && TT[5] == 'v')
88 unsigned SubVer = TT[Idx];
89 if (SubVer >= '7' && SubVer <= '9') {
91 if (Len >= Idx+2 && TT[Idx+1] == 'm')
93 } else if (SubVer == '6') {
95 if (Len >= Idx+3 && TT[Idx+1] == 't' && TT[Idx+2] == '2')
96 ARMArchVersion = V6T2;
97 } else if (SubVer == '5') {
99 if (Len >= Idx+3 && TT[Idx+1] == 't' && TT[Idx+2] == 'e')
100 ARMArchVersion = V5TE;
101 } else if (SubVer == '4') {
102 if (Len >= Idx+2 && TT[Idx+1] == 't')
103 ARMArchVersion = V4T;
109 // Thumb2 implies at least V6T2.
110 if (ARMArchVersion >= V6T2)
112 else if (ThumbMode >= Thumb2)
113 ARMArchVersion = V6T2;
116 if (TT.find("-darwin") != std::string::npos)
118 TargetType = isDarwin;
121 if (TT.find("eabi") != std::string::npos)
122 TargetABI = ARM_ABI_AAPCS;
127 if (isTargetDarwin())
128 IsR9Reserved = ReserveR9 | (ARMArchVersion < V6);
130 if (!isThumb() || hasThumb2())
131 PostRAScheduler = true;
133 // v6+ may or may not support unaligned mem access depending on the system
135 if (!StrictAlign && hasV6Ops() && isTargetDarwin())
136 AllowsUnalignedMem = true;
139 /// GVIsIndirectSymbol - true if the GV will be accessed via an indirect symbol.
141 ARMSubtarget::GVIsIndirectSymbol(const GlobalValue *GV,
142 Reloc::Model RelocM) const {
143 if (RelocM == Reloc::Static)
146 // Materializable GVs (in JIT lazy compilation mode) do not require an extra
148 bool isDecl = GV->isDeclaration() && !GV->isMaterializable();
150 if (!isTargetDarwin()) {
151 // Extra load is needed for all externally visible.
152 if (GV->hasLocalLinkage() || GV->hasHiddenVisibility())
156 if (RelocM == Reloc::PIC_) {
157 // If this is a strong reference to a definition, it is definitely not
159 if (!isDecl && !GV->isWeakForLinker())
162 // Unless we have a symbol with hidden visibility, we have to go through a
163 // normal $non_lazy_ptr stub because this symbol might be resolved late.
164 if (!GV->hasHiddenVisibility()) // Non-hidden $non_lazy_ptr reference.
167 // If symbol visibility is hidden, we have a stub for common symbol
168 // references and external declarations.
169 if (isDecl || GV->hasCommonLinkage())
170 // Hidden $non_lazy_ptr reference.
175 // If this is a strong reference to a definition, it is definitely not
177 if (!isDecl && !GV->isWeakForLinker())
180 // Unless we have a symbol with hidden visibility, we have to go through a
181 // normal $non_lazy_ptr stub because this symbol might be resolved late.
182 if (!GV->hasHiddenVisibility()) // Non-hidden $non_lazy_ptr reference.
190 unsigned ARMSubtarget::getMispredictionPenalty() const {
191 // If we have a reasonable estimate of the pipeline depth, then we can
192 // estimate the penalty of a misprediction based on that.
195 else if (isCortexA9())
198 // Otherwise, just return a sensible default.
202 bool ARMSubtarget::enablePostRAScheduler(
203 CodeGenOpt::Level OptLevel,
204 TargetSubtarget::AntiDepBreakMode& Mode,
205 RegClassVector& CriticalPathRCs) const {
206 Mode = TargetSubtarget::ANTIDEP_CRITICAL;
207 CriticalPathRCs.clear();
208 CriticalPathRCs.push_back(&ARM::GPRRegClass);
209 return PostRAScheduler && OptLevel >= CodeGenOpt::Default;