1 //===-- ARMSubtarget.cpp - ARM Subtarget Information ------------*- C++ -*-===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file implements the ARM specific subclass of TargetSubtarget.
12 //===----------------------------------------------------------------------===//
14 #include "ARMSubtarget.h"
15 #include "ARMGenSubtarget.inc"
16 #include "llvm/GlobalValue.h"
17 #include "llvm/Target/TargetOptions.h"
18 #include "llvm/Support/CommandLine.h"
19 #include "llvm/ADT/SmallVector.h"
23 ReserveR9("arm-reserve-r9", cl::Hidden,
24 cl::desc("Reserve R9, making it unavailable as GPR"));
27 UseMOVT("arm-use-movt",
28 cl::init(true), cl::Hidden);
30 ARMSubtarget::ARMSubtarget(const std::string &TT, const std::string &FS,
34 , UseNEONForSinglePrecisionFP(false)
38 , PostRAScheduler(false)
39 , IsR9Reserved(ReserveR9)
42 , HasHardwareDivide(false)
43 , HasT2ExtractPack(false)
45 , CPUString("generic")
46 , TargetType(isELF) // Default to ELF unless otherwise specified.
47 , TargetABI(ARM_ABI_APCS) {
48 // default to soft float ABI
49 if (FloatABIType == FloatABI::Default)
50 FloatABIType = FloatABI::Soft;
52 // Determine default and user specified characteristics
54 // Parse features string.
55 CPUString = ParseSubtargetFeatures(FS, CPUString);
57 // When no arch is specified either by CPU or by attributes, make the default
59 if (CPUString == "generic" && (FS.empty() || FS == "generic"))
62 // Set the boolean corresponding to the current target triple, or the default
63 // if one cannot be determined, to true.
64 unsigned Len = TT.length();
67 if (Len >= 5 && TT.substr(0, 4) == "armv")
69 else if (Len >= 6 && TT.substr(0, 5) == "thumb") {
71 if (Len >= 7 && TT[5] == 'v')
75 unsigned SubVer = TT[Idx];
76 if (SubVer >= '7' && SubVer <= '9') {
78 if (Len >= Idx+2 && TT[Idx+1] == 'm')
80 } else if (SubVer == '6') {
82 if (Len >= Idx+3 && TT[Idx+1] == 't' && TT[Idx+2] == '2')
83 ARMArchVersion = V6T2;
84 } else if (SubVer == '5') {
86 if (Len >= Idx+3 && TT[Idx+1] == 't' && TT[Idx+2] == 'e')
87 ARMArchVersion = V5TE;
88 } else if (SubVer == '4') {
89 if (Len >= Idx+2 && TT[Idx+1] == 't')
96 // Thumb2 implies at least V6T2.
97 if (ARMArchVersion >= V6T2)
99 else if (ThumbMode >= Thumb2)
100 ARMArchVersion = V6T2;
103 if (TT.find("-darwin") != std::string::npos)
105 TargetType = isDarwin;
108 if (TT.find("eabi") != std::string::npos)
109 TargetABI = ARM_ABI_AAPCS;
114 if (isTargetDarwin())
115 IsR9Reserved = ReserveR9 | (ARMArchVersion < V6);
117 if (!isThumb() || hasThumb2())
118 PostRAScheduler = true;
121 /// GVIsIndirectSymbol - true if the GV will be accessed via an indirect symbol.
123 ARMSubtarget::GVIsIndirectSymbol(const GlobalValue *GV,
124 Reloc::Model RelocM) const {
125 if (RelocM == Reloc::Static)
128 // Materializable GVs (in JIT lazy compilation mode) do not require an extra
130 bool isDecl = GV->isDeclaration() && !GV->isMaterializable();
132 if (!isTargetDarwin()) {
133 // Extra load is needed for all externally visible.
134 if (GV->hasLocalLinkage() || GV->hasHiddenVisibility())
138 if (RelocM == Reloc::PIC_) {
139 // If this is a strong reference to a definition, it is definitely not
141 if (!isDecl && !GV->isWeakForLinker())
144 // Unless we have a symbol with hidden visibility, we have to go through a
145 // normal $non_lazy_ptr stub because this symbol might be resolved late.
146 if (!GV->hasHiddenVisibility()) // Non-hidden $non_lazy_ptr reference.
149 // If symbol visibility is hidden, we have a stub for common symbol
150 // references and external declarations.
151 if (isDecl || GV->hasCommonLinkage())
152 // Hidden $non_lazy_ptr reference.
157 // If this is a strong reference to a definition, it is definitely not
159 if (!isDecl && !GV->isWeakForLinker())
162 // Unless we have a symbol with hidden visibility, we have to go through a
163 // normal $non_lazy_ptr stub because this symbol might be resolved late.
164 if (!GV->hasHiddenVisibility()) // Non-hidden $non_lazy_ptr reference.
172 bool ARMSubtarget::enablePostRAScheduler(
173 CodeGenOpt::Level OptLevel,
174 TargetSubtarget::AntiDepBreakMode& Mode,
175 RegClassVector& CriticalPathRCs) const {
176 Mode = TargetSubtarget::ANTIDEP_CRITICAL;
177 CriticalPathRCs.clear();
178 CriticalPathRCs.push_back(&ARM::GPRRegClass);
179 return PostRAScheduler && OptLevel >= CodeGenOpt::Default;