1 //===-- ARMSubtarget.cpp - ARM Subtarget Information ------------*- C++ -*-===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file implements the ARM specific subclass of TargetSubtarget.
12 //===----------------------------------------------------------------------===//
14 #include "ARMSubtarget.h"
15 #include "ARMGenSubtarget.inc"
16 #include "llvm/GlobalValue.h"
17 #include "llvm/Target/TargetOptions.h"
18 #include "llvm/Support/CommandLine.h"
19 #include "llvm/ADT/SmallVector.h"
23 ReserveR9("arm-reserve-r9", cl::Hidden,
24 cl::desc("Reserve R9, making it unavailable as GPR"));
26 UseNEONFP("arm-use-neon-fp",
27 cl::desc("Use NEON for single-precision FP"),
28 cl::init(false), cl::Hidden);
30 UseVMLxInstructions("arm-use-vmlx",
31 cl::desc("Use VFP vmla and vmls instructions"),
32 cl::init(true), cl::Hidden);
35 UseMOVT("arm-use-movt",
36 cl::init(true), cl::Hidden);
38 ARMSubtarget::ARMSubtarget(const std::string &TT, const std::string &FS,
42 , UseNEONForSinglePrecisionFP(UseNEONFP)
43 , UseVMLx(UseVMLxInstructions)
46 , PostRAScheduler(false)
47 , IsR9Reserved(ReserveR9)
51 , CPUString("generic")
52 , TargetType(isELF) // Default to ELF unless otherwise specified.
53 , TargetABI(ARM_ABI_APCS) {
54 // default to soft float ABI
55 if (FloatABIType == FloatABI::Default)
56 FloatABIType = FloatABI::Soft;
58 // Determine default and user specified characteristics
60 // Parse features string.
61 CPUString = ParseSubtargetFeatures(FS, CPUString);
63 // When no arch is specified either by CPU or by attributes, make the default
65 if (CPUString == "generic" && (FS.empty() || FS == "generic"))
68 // Set the boolean corresponding to the current target triple, or the default
69 // if one cannot be determined, to true.
70 unsigned Len = TT.length();
73 if (Len >= 5 && TT.substr(0, 4) == "armv")
75 else if (Len >= 6 && TT.substr(0, 5) == "thumb") {
77 if (Len >= 7 && TT[5] == 'v')
81 unsigned SubVer = TT[Idx];
82 if (SubVer >= '7' && SubVer <= '9') {
84 } else if (SubVer == '6') {
86 if (Len >= Idx+3 && TT[Idx+1] == 't' && TT[Idx+2] == '2')
87 ARMArchVersion = V6T2;
88 } else if (SubVer == '5') {
90 if (Len >= Idx+3 && TT[Idx+1] == 't' && TT[Idx+2] == 'e')
91 ARMArchVersion = V5TE;
92 } else if (SubVer == '4') {
93 if (Len >= Idx+2 && TT[Idx+1] == 't')
100 // Thumb2 implies at least V6T2.
101 if (ARMArchVersion >= V6T2)
103 else if (ThumbMode >= Thumb2)
104 ARMArchVersion = V6T2;
107 if (TT.find("-darwin") != std::string::npos)
109 TargetType = isDarwin;
112 if (TT.find("eabi") != std::string::npos)
113 TargetABI = ARM_ABI_AAPCS;
118 if (isTargetDarwin())
119 IsR9Reserved = ReserveR9 | (ARMArchVersion < V6);
121 if (!isThumb() || hasThumb2())
122 PostRAScheduler = true;
124 // Set CPU specific features.
125 if (CPUString == "cortex-a8") {
126 // On Cortex-a8, it's faster to perform some single-precision FP
127 // operations with NEON instructions.
128 if (UseNEONFP.getPosition() == 0)
129 UseNEONForSinglePrecisionFP = true;
130 // The VFP vlma and vlms instructions don't play nicely with others;
132 // FIXME: This may be true for other variants as well. Get benchmark
133 // numbers and add them if determined that's the case.
134 if (UseVMLxInstructions.getPosition() == 0)
139 /// GVIsIndirectSymbol - true if the GV will be accessed via an indirect symbol.
141 ARMSubtarget::GVIsIndirectSymbol(GlobalValue *GV, Reloc::Model RelocM) const {
142 if (RelocM == Reloc::Static)
145 // Materializable GVs (in JIT lazy compilation mode) do not require an extra
147 bool isDecl = GV->isDeclaration() && !GV->isMaterializable();
149 if (!isTargetDarwin()) {
150 // Extra load is needed for all externally visible.
151 if (GV->hasLocalLinkage() || GV->hasHiddenVisibility())
155 if (RelocM == Reloc::PIC_) {
156 // If this is a strong reference to a definition, it is definitely not
158 if (!isDecl && !GV->isWeakForLinker())
161 // Unless we have a symbol with hidden visibility, we have to go through a
162 // normal $non_lazy_ptr stub because this symbol might be resolved late.
163 if (!GV->hasHiddenVisibility()) // Non-hidden $non_lazy_ptr reference.
166 // If symbol visibility is hidden, we have a stub for common symbol
167 // references and external declarations.
168 if (isDecl || GV->hasCommonLinkage())
169 // Hidden $non_lazy_ptr reference.
174 // If this is a strong reference to a definition, it is definitely not
176 if (!isDecl && !GV->isWeakForLinker())
179 // Unless we have a symbol with hidden visibility, we have to go through a
180 // normal $non_lazy_ptr stub because this symbol might be resolved late.
181 if (!GV->hasHiddenVisibility()) // Non-hidden $non_lazy_ptr reference.
189 bool ARMSubtarget::enablePostRAScheduler(
190 CodeGenOpt::Level OptLevel,
191 TargetSubtarget::AntiDepBreakMode& Mode,
192 RegClassVector& CriticalPathRCs) const {
193 Mode = TargetSubtarget::ANTIDEP_CRITICAL;
194 CriticalPathRCs.clear();
195 CriticalPathRCs.push_back(&ARM::GPRRegClass);
196 return PostRAScheduler && OptLevel >= CodeGenOpt::Default;