lib/Target/ARM/ARMTargetMachine.cpp

   1 //===-- ARMTargetMachine.cpp - Define TargetMachine for ARM ---------------===//
   2 //
   3 //                     The LLVM Compiler Infrastructure
   4 //
   5 // This file is distributed under the University of Illinois Open Source
   6 // License. See LICENSE.TXT for details.
   7 //
   8 //===----------------------------------------------------------------------===//
   9 //
  10 //
  11 //===----------------------------------------------------------------------===//
  12
  13 #include "ARMTargetMachine.h"
  14 #include "ARMTargetAsmInfo.h"
  15 #include "ARMFrameInfo.h"
  16 #include "ARM.h"
  17 #include "llvm/PassManager.h"
  18 #include "llvm/CodeGen/Passes.h"
  19 #include "llvm/Support/CommandLine.h"
  20 #include "llvm/Support/FormattedStream.h"
  21 #include "llvm/Target/TargetOptions.h"
  22 #include "llvm/Target/TargetRegistry.h"
  23 using namespace llvm;
  24
  25 static cl::opt<bool> DisableLdStOpti("disable-arm-loadstore-opti", cl::Hidden,
  26                               cl::desc("Disable load store optimization pass"));
  27 static cl::opt<bool> DisableIfConversion("disable-arm-if-conversion",cl::Hidden,
  28                               cl::desc("Disable if-conversion pass"));
  29 extern "C" void LLVMInitializeARMTarget() {
  30   // Register the target.
  31   RegisterTargetMachine<ARMTargetMachine> X(TheARMTarget);
  32   RegisterTargetMachine<ThumbTargetMachine> Y(TheThumbTarget);
  33 }
  34
  35 /// TargetMachine ctor - Create an ARM architecture model.
  36 ///
  37 ARMBaseTargetMachine::ARMBaseTargetMachine(const Target &T,
  38                                            const std::string &TT,
  39                                            const std::string &FS,
  40                                            bool isThumb)
  41   : LLVMTargetMachine(T),
  42     Subtarget(TT, FS, isThumb),
  43     FrameInfo(Subtarget),
  44     JITInfo(),
  45     InstrItins(Subtarget.getInstrItineraryData()) {
  46   DefRelocModel = getRelocationModel();
  47 }
  48
  49 ARMTargetMachine::ARMTargetMachine(const Target &T, const std::string &TT,
  50                                    const std::string &FS)
  51   : ARMBaseTargetMachine(T, TT, FS, false), InstrInfo(Subtarget),
  52     DataLayout(Subtarget.isAPCS_ABI() ?
  53                std::string("e-p:32:32-f64:32:32-i64:32:32") :
  54                std::string("e-p:32:32-f64:64:64-i64:64:64")),
  55     TLInfo(*this) {
  56 }
  57
  58 ThumbTargetMachine::ThumbTargetMachine(const Target &T, const std::string &TT,
  59                                        const std::string &FS)
  60   : ARMBaseTargetMachine(T, TT, FS, true),
  61     DataLayout(Subtarget.isAPCS_ABI() ?
  62                std::string("e-p:32:32-f64:32:32-i64:32:32-"
  63                            "i16:16:32-i8:8:32-i1:8:32-a:0:32") :
  64                std::string("e-p:32:32-f64:64:64-i64:64:64-"
  65                            "i16:16:32-i8:8:32-i1:8:32-a:0:32")),
  66     TLInfo(*this) {
  67   // Create the approriate type of Thumb InstrInfo
  68   if (Subtarget.hasThumb2())
  69     InstrInfo = new Thumb2InstrInfo(Subtarget);
  70   else
  71     InstrInfo = new Thumb1InstrInfo(Subtarget);
  72 }
  73
  74
  75 const TargetAsmInfo *ARMBaseTargetMachine::createTargetAsmInfo() const {
  76   switch (Subtarget.TargetType) {
  77   default: llvm_unreachable("Unknown ARM subtarget kind");
  78   case ARMSubtarget::isDarwin:
  79     return new ARMDarwinTargetAsmInfo();
  80   case ARMSubtarget::isELF:
  81     return new ARMELFTargetAsmInfo();
  82   }
  83 }
  84
  85
  86 // Pass Pipeline Configuration
  87 bool ARMBaseTargetMachine::addInstSelector(PassManagerBase &PM,
  88                                            CodeGenOpt::Level OptLevel) {
  89   PM.add(createARMISelDag(*this));
  90   return false;
  91 }
  92
  93 bool ARMBaseTargetMachine::addPreRegAlloc(PassManagerBase &PM,
  94                                           CodeGenOpt::Level OptLevel) {
  95   if (Subtarget.hasNEON())
  96     PM.add(createNEONPreAllocPass());
  97
  98   // FIXME: temporarily disabling load / store optimization pass for Thumb mode.
  99   if (OptLevel != CodeGenOpt::None && !DisableLdStOpti && !Subtarget.isThumb())
 100     PM.add(createARMLoadStoreOptimizationPass(true));
 101   return true;
 102 }
 103
 104 bool ARMBaseTargetMachine::addPreEmitPass(PassManagerBase &PM,
 105                                           CodeGenOpt::Level OptLevel) {
 106   // FIXME: temporarily disabling load / store optimization pass for Thumb1 mode.
 107   if (OptLevel != CodeGenOpt::None && !DisableLdStOpti &&
 108       !Subtarget.isThumb1Only())
 109     PM.add(createARMLoadStoreOptimizationPass());
 110
 111   if (OptLevel != CodeGenOpt::None &&
 112       !DisableIfConversion && !Subtarget.isThumb())
 113     PM.add(createIfConverterPass());
 114
 115   if (Subtarget.isThumb2()) {
 116     PM.add(createThumb2ITBlockPass());
 117     PM.add(createThumb2SizeReductionPass());
 118   }
 119
 120   PM.add(createARMConstantIslandPass());
 121   return true;
 122 }
 123
 124 bool ARMBaseTargetMachine::addCodeEmitter(PassManagerBase &PM,
 125                                           CodeGenOpt::Level OptLevel,
 126                                           MachineCodeEmitter &MCE) {
 127   // FIXME: Move this to TargetJITInfo!
 128   if (DefRelocModel == Reloc::Default)
 129     setRelocationModel(Reloc::Static);
 130
 131   // Machine code emitter pass for ARM.
 132   PM.add(createARMCodeEmitterPass(*this, MCE));
 133   return false;
 134 }
 135
 136 bool ARMBaseTargetMachine::addCodeEmitter(PassManagerBase &PM,
 137                                           CodeGenOpt::Level OptLevel,
 138                                           JITCodeEmitter &JCE) {
 139   // FIXME: Move this to TargetJITInfo!
 140   if (DefRelocModel == Reloc::Default)
 141     setRelocationModel(Reloc::Static);
 142
 143   // Machine code emitter pass for ARM.
 144   PM.add(createARMJITCodeEmitterPass(*this, JCE));
 145   return false;
 146 }
 147
 148 bool ARMBaseTargetMachine::addCodeEmitter(PassManagerBase &PM,
 149                                           CodeGenOpt::Level OptLevel,
 150                                           ObjectCodeEmitter &OCE) {
 151   // FIXME: Move this to TargetJITInfo!
 152   if (DefRelocModel == Reloc::Default)
 153     setRelocationModel(Reloc::Static);
 154
 155   // Machine code emitter pass for ARM.
 156   PM.add(createARMObjectCodeEmitterPass(*this, OCE));
 157   return false;
 158 }
 159
 160 bool ARMBaseTargetMachine::addSimpleCodeEmitter(PassManagerBase &PM,
 161                                                 CodeGenOpt::Level OptLevel,
 162                                                 MachineCodeEmitter &MCE) {
 163   // Machine code emitter pass for ARM.
 164   PM.add(createARMCodeEmitterPass(*this, MCE));
 165   return false;
 166 }
 167
 168 bool ARMBaseTargetMachine::addSimpleCodeEmitter(PassManagerBase &PM,
 169                                                 CodeGenOpt::Level OptLevel,
 170                                                 JITCodeEmitter &JCE) {
 171   // Machine code emitter pass for ARM.
 172   PM.add(createARMJITCodeEmitterPass(*this, JCE));
 173   return false;
 174 }
 175
 176 bool ARMBaseTargetMachine::addSimpleCodeEmitter(PassManagerBase &PM,
 177                                             CodeGenOpt::Level OptLevel,
 178                                             ObjectCodeEmitter &OCE) {
 179   // Machine code emitter pass for ARM.
 180   PM.add(createARMObjectCodeEmitterPass(*this, OCE));
 181   return false;
 182 }
 183