lib/Target/ARM/ARMTargetMachine.cpp

   1 //===-- ARMTargetMachine.cpp - Define TargetMachine for ARM ---------------===//
   2 //
   3 //                     The LLVM Compiler Infrastructure
   4 //
   5 // This file is distributed under the University of Illinois Open Source
   6 // License. See LICENSE.TXT for details.
   7 //
   8 //===----------------------------------------------------------------------===//
   9 //
  10 //
  11 //===----------------------------------------------------------------------===//
  12
  13 #include "ARMTargetMachine.h"
  14 #include "ARMMCAsmInfo.h"
  15 #include "ARMFrameInfo.h"
  16 #include "ARM.h"
  17 #include "llvm/PassManager.h"
  18 #include "llvm/CodeGen/Passes.h"
  19 #include "llvm/Support/CommandLine.h"
  20 #include "llvm/Support/FormattedStream.h"
  21 #include "llvm/Target/TargetOptions.h"
  22 #include "llvm/Target/TargetRegistry.h"
  23 using namespace llvm;
  24
  25 static const MCAsmInfo *createMCAsmInfo(const Target &T,
  26                                         const StringRef &TT) {
  27   Triple TheTriple(TT);
  28   switch (TheTriple.getOS()) {
  29   case Triple::Darwin:
  30     return new ARMMCAsmInfoDarwin();
  31   default:
  32     return new ARMELFMCAsmInfo();
  33   }
  34 }
  35
  36
  37 extern "C" void LLVMInitializeARMTarget() {
  38   // Register the target.
  39   RegisterTargetMachine<ARMTargetMachine> X(TheARMTarget);
  40   RegisterTargetMachine<ThumbTargetMachine> Y(TheThumbTarget);
  41
  42   // Register the target asm info.
  43   RegisterAsmInfoFn A(TheARMTarget, createMCAsmInfo);
  44   RegisterAsmInfoFn B(TheThumbTarget, createMCAsmInfo);
  45 }
  46
  47 /// TargetMachine ctor - Create an ARM architecture model.
  48 ///
  49 ARMBaseTargetMachine::ARMBaseTargetMachine(const Target &T,
  50                                            const std::string &TT,
  51                                            const std::string &FS,
  52                                            bool isThumb)
  53   : LLVMTargetMachine(T, TT),
  54     Subtarget(TT, FS, isThumb),
  55     FrameInfo(Subtarget),
  56     JITInfo(),
  57     InstrItins(Subtarget.getInstrItineraryData()) {
  58   DefRelocModel = getRelocationModel();
  59 }
  60
  61 ARMTargetMachine::ARMTargetMachine(const Target &T, const std::string &TT,
  62                                    const std::string &FS)
  63   : ARMBaseTargetMachine(T, TT, FS, false), InstrInfo(Subtarget),
  64     DataLayout(Subtarget.isAPCS_ABI() ?
  65                std::string("e-p:32:32-f64:32:32-i64:32:32") :
  66                std::string("e-p:32:32-f64:64:64-i64:64:64")),
  67     TLInfo(*this) {
  68 }
  69
  70 ThumbTargetMachine::ThumbTargetMachine(const Target &T, const std::string &TT,
  71                                        const std::string &FS)
  72   : ARMBaseTargetMachine(T, TT, FS, true),
  73     InstrInfo(Subtarget.hasThumb2()
  74               ? ((ARMBaseInstrInfo*)new Thumb2InstrInfo(Subtarget))
  75               : ((ARMBaseInstrInfo*)new Thumb1InstrInfo(Subtarget))),
  76     DataLayout(Subtarget.isAPCS_ABI() ?
  77                std::string("e-p:32:32-f64:32:32-i64:32:32-"
  78                            "i16:16:32-i8:8:32-i1:8:32-a:0:32") :
  79                std::string("e-p:32:32-f64:64:64-i64:64:64-"
  80                            "i16:16:32-i8:8:32-i1:8:32-a:0:32")),
  81     TLInfo(*this) {
  82 }
  83
  84
  85
  86 // Pass Pipeline Configuration
  87 bool ARMBaseTargetMachine::addInstSelector(PassManagerBase &PM,
  88                                            CodeGenOpt::Level OptLevel) {
  89   PM.add(createARMISelDag(*this));
  90   return false;
  91 }
  92
  93 bool ARMBaseTargetMachine::addPreRegAlloc(PassManagerBase &PM,
  94                                           CodeGenOpt::Level OptLevel) {
  95   if (Subtarget.hasNEON())
  96     PM.add(createNEONPreAllocPass());
  97
  98   // FIXME: temporarily disabling load / store optimization pass for Thumb mode.
  99   if (OptLevel != CodeGenOpt::None && !Subtarget.isThumb())
 100     PM.add(createARMLoadStoreOptimizationPass(true));
 101   return true;
 102 }
 103
 104 bool ARMBaseTargetMachine::addPreEmitPass(PassManagerBase &PM,
 105                                           CodeGenOpt::Level OptLevel) {
 106   // FIXME: temporarily disabling load / store optimization pass for Thumb1 mode.
 107   if (OptLevel != CodeGenOpt::None && !Subtarget.isThumb1Only())
 108     PM.add(createARMLoadStoreOptimizationPass());
 109
 110   if (OptLevel != CodeGenOpt::None && !Subtarget.isThumb1Only())
 111     PM.add(createIfConverterPass());
 112
 113   if (Subtarget.isThumb2()) {
 114     PM.add(createThumb2ITBlockPass());
 115     PM.add(createThumb2SizeReductionPass());
 116   }
 117
 118   PM.add(createARMConstantIslandPass());
 119   return true;
 120 }
 121
 122 bool ARMBaseTargetMachine::addCodeEmitter(PassManagerBase &PM,
 123                                           CodeGenOpt::Level OptLevel,
 124                                           MachineCodeEmitter &MCE) {
 125   // FIXME: Move this to TargetJITInfo!
 126   if (DefRelocModel == Reloc::Default)
 127     setRelocationModel(Reloc::Static);
 128
 129   // Machine code emitter pass for ARM.
 130   PM.add(createARMCodeEmitterPass(*this, MCE));
 131   return false;
 132 }
 133
 134 bool ARMBaseTargetMachine::addCodeEmitter(PassManagerBase &PM,
 135                                           CodeGenOpt::Level OptLevel,
 136                                           JITCodeEmitter &JCE) {
 137   // FIXME: Move this to TargetJITInfo!
 138   if (DefRelocModel == Reloc::Default)
 139     setRelocationModel(Reloc::Static);
 140
 141   // Machine code emitter pass for ARM.
 142   PM.add(createARMJITCodeEmitterPass(*this, JCE));
 143   return false;
 144 }
 145
 146 bool ARMBaseTargetMachine::addCodeEmitter(PassManagerBase &PM,
 147                                           CodeGenOpt::Level OptLevel,
 148                                           ObjectCodeEmitter &OCE) {
 149   // FIXME: Move this to TargetJITInfo!
 150   if (DefRelocModel == Reloc::Default)
 151     setRelocationModel(Reloc::Static);
 152
 153   // Machine code emitter pass for ARM.
 154   PM.add(createARMObjectCodeEmitterPass(*this, OCE));
 155   return false;
 156 }
 157
 158 bool ARMBaseTargetMachine::addSimpleCodeEmitter(PassManagerBase &PM,
 159                                                 CodeGenOpt::Level OptLevel,
 160                                                 MachineCodeEmitter &MCE) {
 161   // Machine code emitter pass for ARM.
 162   PM.add(createARMCodeEmitterPass(*this, MCE));
 163   return false;
 164 }
 165
 166 bool ARMBaseTargetMachine::addSimpleCodeEmitter(PassManagerBase &PM,
 167                                                 CodeGenOpt::Level OptLevel,
 168                                                 JITCodeEmitter &JCE) {
 169   // Machine code emitter pass for ARM.
 170   PM.add(createARMJITCodeEmitterPass(*this, JCE));
 171   return false;
 172 }
 173
 174 bool ARMBaseTargetMachine::addSimpleCodeEmitter(PassManagerBase &PM,
 175                                             CodeGenOpt::Level OptLevel,
 176                                             ObjectCodeEmitter &OCE) {
 177   // Machine code emitter pass for ARM.
 178   PM.add(createARMObjectCodeEmitterPass(*this, OCE));
 179   return false;
 180 }
 181