1 //===-- ARMTargetMachine.cpp - Define TargetMachine for ARM ---------------===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
11 //===----------------------------------------------------------------------===//
13 #include "ARMTargetMachine.h"
14 #include "ARMMCAsmInfo.h"
15 #include "ARMFrameInfo.h"
17 #include "llvm/PassManager.h"
18 #include "llvm/CodeGen/Passes.h"
19 #include "llvm/Support/CommandLine.h"
20 #include "llvm/Support/FormattedStream.h"
21 #include "llvm/Target/TargetOptions.h"
22 #include "llvm/Target/TargetRegistry.h"
25 static cl::opt<bool> DisableIfConversion("disable-arm-if-conversion",cl::Hidden,
26 cl::desc("Disable if-conversion pass"));
28 static const MCAsmInfo *createMCAsmInfo(const Target &T,
29 const StringRef &TT) {
31 switch (TheTriple.getOS()) {
33 return new ARMMCAsmInfoDarwin();
35 return new ARMELFMCAsmInfo();
40 extern "C" void LLVMInitializeARMTarget() {
41 // Register the target.
42 RegisterTargetMachine<ARMTargetMachine> X(TheARMTarget);
43 RegisterTargetMachine<ThumbTargetMachine> Y(TheThumbTarget);
45 // Register the target asm info.
46 RegisterAsmInfoFn A(TheARMTarget, createMCAsmInfo);
47 RegisterAsmInfoFn B(TheThumbTarget, createMCAsmInfo);
50 /// TargetMachine ctor - Create an ARM architecture model.
52 ARMBaseTargetMachine::ARMBaseTargetMachine(const Target &T,
53 const std::string &TT,
54 const std::string &FS,
56 : LLVMTargetMachine(T, TT),
57 Subtarget(TT, FS, isThumb),
60 InstrItins(Subtarget.getInstrItineraryData()) {
61 DefRelocModel = getRelocationModel();
64 ARMTargetMachine::ARMTargetMachine(const Target &T, const std::string &TT,
65 const std::string &FS)
66 : ARMBaseTargetMachine(T, TT, FS, false), InstrInfo(Subtarget),
67 DataLayout(Subtarget.isAPCS_ABI() ?
68 std::string("e-p:32:32-f64:32:32-i64:32:32") :
69 std::string("e-p:32:32-f64:64:64-i64:64:64")),
73 ThumbTargetMachine::ThumbTargetMachine(const Target &T, const std::string &TT,
74 const std::string &FS)
75 : ARMBaseTargetMachine(T, TT, FS, true),
76 InstrInfo(Subtarget.hasThumb2()
77 ? ((ARMBaseInstrInfo*)new Thumb2InstrInfo(Subtarget))
78 : ((ARMBaseInstrInfo*)new Thumb1InstrInfo(Subtarget))),
79 DataLayout(Subtarget.isAPCS_ABI() ?
80 std::string("e-p:32:32-f64:32:32-i64:32:32-"
81 "i16:16:32-i8:8:32-i1:8:32-a:0:32") :
82 std::string("e-p:32:32-f64:64:64-i64:64:64-"
83 "i16:16:32-i8:8:32-i1:8:32-a:0:32")),
89 // Pass Pipeline Configuration
90 bool ARMBaseTargetMachine::addInstSelector(PassManagerBase &PM,
91 CodeGenOpt::Level OptLevel) {
92 PM.add(createARMISelDag(*this));
96 bool ARMBaseTargetMachine::addPreRegAlloc(PassManagerBase &PM,
97 CodeGenOpt::Level OptLevel) {
98 if (Subtarget.hasNEON())
99 PM.add(createNEONPreAllocPass());
101 // FIXME: temporarily disabling load / store optimization pass for Thumb mode.
102 if (OptLevel != CodeGenOpt::None && !Subtarget.isThumb())
103 PM.add(createARMLoadStoreOptimizationPass(true));
107 bool ARMBaseTargetMachine::addPreEmitPass(PassManagerBase &PM,
108 CodeGenOpt::Level OptLevel) {
109 // FIXME: temporarily disabling load / store optimization pass for Thumb1 mode.
110 if (OptLevel != CodeGenOpt::None && !Subtarget.isThumb1Only())
111 PM.add(createARMLoadStoreOptimizationPass());
113 if (OptLevel != CodeGenOpt::None && !Subtarget.isThumb1Only())
114 PM.add(createIfConverterPass());
116 if (Subtarget.isThumb2()) {
117 PM.add(createThumb2ITBlockPass());
118 PM.add(createThumb2SizeReductionPass());
121 PM.add(createARMConstantIslandPass());
125 bool ARMBaseTargetMachine::addCodeEmitter(PassManagerBase &PM,
126 CodeGenOpt::Level OptLevel,
127 MachineCodeEmitter &MCE) {
128 // FIXME: Move this to TargetJITInfo!
129 if (DefRelocModel == Reloc::Default)
130 setRelocationModel(Reloc::Static);
132 // Machine code emitter pass for ARM.
133 PM.add(createARMCodeEmitterPass(*this, MCE));
137 bool ARMBaseTargetMachine::addCodeEmitter(PassManagerBase &PM,
138 CodeGenOpt::Level OptLevel,
139 JITCodeEmitter &JCE) {
140 // FIXME: Move this to TargetJITInfo!
141 if (DefRelocModel == Reloc::Default)
142 setRelocationModel(Reloc::Static);
144 // Machine code emitter pass for ARM.
145 PM.add(createARMJITCodeEmitterPass(*this, JCE));
149 bool ARMBaseTargetMachine::addCodeEmitter(PassManagerBase &PM,
150 CodeGenOpt::Level OptLevel,
151 ObjectCodeEmitter &OCE) {
152 // FIXME: Move this to TargetJITInfo!
153 if (DefRelocModel == Reloc::Default)
154 setRelocationModel(Reloc::Static);
156 // Machine code emitter pass for ARM.
157 PM.add(createARMObjectCodeEmitterPass(*this, OCE));
161 bool ARMBaseTargetMachine::addSimpleCodeEmitter(PassManagerBase &PM,
162 CodeGenOpt::Level OptLevel,
163 MachineCodeEmitter &MCE) {
164 // Machine code emitter pass for ARM.
165 PM.add(createARMCodeEmitterPass(*this, MCE));
169 bool ARMBaseTargetMachine::addSimpleCodeEmitter(PassManagerBase &PM,
170 CodeGenOpt::Level OptLevel,
171 JITCodeEmitter &JCE) {
172 // Machine code emitter pass for ARM.
173 PM.add(createARMJITCodeEmitterPass(*this, JCE));
177 bool ARMBaseTargetMachine::addSimpleCodeEmitter(PassManagerBase &PM,
178 CodeGenOpt::Level OptLevel,
179 ObjectCodeEmitter &OCE) {
180 // Machine code emitter pass for ARM.
181 PM.add(createARMObjectCodeEmitterPass(*this, OCE));