lib/Target/ARM/ARMTargetMachine.cpp

   1 //===-- ARMTargetMachine.cpp - Define TargetMachine for ARM ---------------===//
   2 //
   3 //                     The LLVM Compiler Infrastructure
   4 //
   5 // This file is distributed under the University of Illinois Open Source
   6 // License. See LICENSE.TXT for details.
   7 //
   8 //===----------------------------------------------------------------------===//
   9 //
  10 //
  11 //===----------------------------------------------------------------------===//
  12
  13 #include "ARMTargetMachine.h"
  14 #include "ARMMCAsmInfo.h"
  15 #include "ARMFrameInfo.h"
  16 #include "ARM.h"
  17 #include "llvm/PassManager.h"
  18 #include "llvm/CodeGen/Passes.h"
  19 #include "llvm/Support/FormattedStream.h"
  20 #include "llvm/Target/TargetOptions.h"
  21 #include "llvm/Target/TargetRegistry.h"
  22 using namespace llvm;
  23
  24 static MCAsmInfo *createMCAsmInfo(const Target &T, StringRef TT) {
  25   Triple TheTriple(TT);
  26   switch (TheTriple.getOS()) {
  27   case Triple::Darwin:
  28     return new ARMMCAsmInfoDarwin();
  29   default:
  30     return new ARMELFMCAsmInfo();
  31   }
  32 }
  33
  34
  35 extern "C" void LLVMInitializeARMTarget() {
  36   // Register the target.
  37   RegisterTargetMachine<ARMTargetMachine> X(TheARMTarget);
  38   RegisterTargetMachine<ThumbTargetMachine> Y(TheThumbTarget);
  39
  40   // Register the target asm info.
  41   RegisterAsmInfoFn A(TheARMTarget, createMCAsmInfo);
  42   RegisterAsmInfoFn B(TheThumbTarget, createMCAsmInfo);
  43 }
  44
  45 /// TargetMachine ctor - Create an ARM architecture model.
  46 ///
  47 ARMBaseTargetMachine::ARMBaseTargetMachine(const Target &T,
  48                                            const std::string &TT,
  49                                            const std::string &FS,
  50                                            bool isThumb)
  51   : LLVMTargetMachine(T, TT),
  52     Subtarget(TT, FS, isThumb),
  53     FrameInfo(Subtarget),
  54     JITInfo(),
  55     InstrItins(Subtarget.getInstrItineraryData()) {
  56   DefRelocModel = getRelocationModel();
  57 }
  58
  59 ARMTargetMachine::ARMTargetMachine(const Target &T, const std::string &TT,
  60                                    const std::string &FS)
  61   : ARMBaseTargetMachine(T, TT, FS, false), InstrInfo(Subtarget),
  62     DataLayout(Subtarget.isAPCS_ABI() ?
  63                std::string("e-p:32:32-f64:32:32-i64:32:32-"
  64                            "v128:32:128-v64:32:64-n32") :
  65                std::string("e-p:32:32-f64:64:64-i64:64:64-"
  66                            "v128:64:128-v64:64:64-n32")),
  67     TLInfo(*this),
  68     TSInfo(*this) {
  69 }
  70
  71 ThumbTargetMachine::ThumbTargetMachine(const Target &T, const std::string &TT,
  72                                        const std::string &FS)
  73   : ARMBaseTargetMachine(T, TT, FS, true),
  74     InstrInfo(Subtarget.hasThumb2()
  75               ? ((ARMBaseInstrInfo*)new Thumb2InstrInfo(Subtarget))
  76               : ((ARMBaseInstrInfo*)new Thumb1InstrInfo(Subtarget))),
  77     DataLayout(Subtarget.isAPCS_ABI() ?
  78                std::string("e-p:32:32-f64:32:32-i64:32:32-"
  79                            "i16:16:32-i8:8:32-i1:8:32-"
  80                            "v128:32:128-v64:32:64-a:0:32-n32") :
  81                std::string("e-p:32:32-f64:64:64-i64:64:64-"
  82                            "i16:16:32-i8:8:32-i1:8:32-"
  83                            "v128:64:128-v64:64:64-a:0:32-n32")),
  84     TLInfo(*this),
  85     TSInfo(*this) {
  86 }
  87
  88 // Pass Pipeline Configuration
  89 bool ARMBaseTargetMachine::addPreISel(PassManagerBase &PM,
  90                                       CodeGenOpt::Level OptLevel) {
  91   if (OptLevel != CodeGenOpt::None)
  92     PM.add(createARMGlobalMergePass(getTargetLowering()));
  93
  94   return false;
  95 }
  96
  97 bool ARMBaseTargetMachine::addInstSelector(PassManagerBase &PM,
  98                                            CodeGenOpt::Level OptLevel) {
  99   PM.add(createARMISelDag(*this, OptLevel));
 100   return false;
 101 }
 102
 103 bool ARMBaseTargetMachine::addPreRegAlloc(PassManagerBase &PM,
 104                                           CodeGenOpt::Level OptLevel) {
 105   if (Subtarget.hasNEON())
 106     PM.add(createNEONPreAllocPass());
 107
 108   // FIXME: temporarily disabling load / store optimization pass for Thumb1.
 109   if (OptLevel != CodeGenOpt::None && !Subtarget.isThumb1Only())
 110     PM.add(createARMLoadStoreOptimizationPass(true));
 111
 112   return true;
 113 }
 114
 115 bool ARMBaseTargetMachine::addPreSched2(PassManagerBase &PM,
 116                                         CodeGenOpt::Level OptLevel) {
 117   // FIXME: temporarily disabling load / store optimization pass for Thumb1.
 118   if (OptLevel != CodeGenOpt::None) {
 119     if (!Subtarget.isThumb1Only())
 120       PM.add(createARMLoadStoreOptimizationPass());
 121     if (Subtarget.hasNEON())
 122       PM.add(createNEONMoveFixPass());
 123   }
 124
 125   // Expand some pseudo instructions into multiple instructions to allow
 126   // proper scheduling.
 127   PM.add(createARMExpandPseudoPass());
 128
 129   if (OptLevel != CodeGenOpt::None) {
 130     if (!Subtarget.isThumb1Only())
 131       PM.add(createIfConverterPass());
 132   }
 133   if (Subtarget.isThumb2())
 134     PM.add(createThumb2ITBlockPass());
 135
 136   return true;
 137 }
 138
 139 bool ARMBaseTargetMachine::addPreEmitPass(PassManagerBase &PM,
 140                                           CodeGenOpt::Level OptLevel) {
 141   if (Subtarget.isThumb2())
 142     PM.add(createThumb2SizeReductionPass());
 143
 144   PM.add(createARMConstantIslandPass());
 145   return true;
 146 }
 147
 148 bool ARMBaseTargetMachine::addCodeEmitter(PassManagerBase &PM,
 149                                           CodeGenOpt::Level OptLevel,
 150                                           JITCodeEmitter &JCE) {
 151   // FIXME: Move this to TargetJITInfo!
 152   if (DefRelocModel == Reloc::Default)
 153     setRelocationModel(Reloc::Static);
 154
 155   // Machine code emitter pass for ARM.
 156   PM.add(createARMJITCodeEmitterPass(*this, JCE));
 157   return false;
 158 }