lib/Target/ARM/ARMTargetMachine.cpp

   1 //===-- ARMTargetMachine.cpp - Define TargetMachine for ARM ---------------===//
   2 //
   3 //                     The LLVM Compiler Infrastructure
   4 //
   5 // This file is distributed under the University of Illinois Open Source
   6 // License. See LICENSE.TXT for details.
   7 //
   8 //===----------------------------------------------------------------------===//
   9 //
  10 //
  11 //===----------------------------------------------------------------------===//
  12
  13 #include "ARMTargetMachine.h"
  14 #include "ARMTargetAsmInfo.h"
  15 #include "ARMFrameInfo.h"
  16 #include "ARM.h"
  17 #include "llvm/Module.h"
  18 #include "llvm/PassManager.h"
  19 #include "llvm/CodeGen/Passes.h"
  20 #include "llvm/Support/CommandLine.h"
  21 #include "llvm/Support/FormattedStream.h"
  22 #include "llvm/Target/TargetOptions.h"
  23 #include "llvm/Target/TargetRegistry.h"
  24 using namespace llvm;
  25
  26 static cl::opt<bool> DisableLdStOpti("disable-arm-loadstore-opti", cl::Hidden,
  27                               cl::desc("Disable load store optimization pass"));
  28 static cl::opt<bool> DisableIfConversion("disable-arm-if-conversion",cl::Hidden,
  29                               cl::desc("Disable if-conversion pass"));
  30
  31 extern "C" void LLVMInitializeARMTarget() {
  32   // Register the target.
  33   RegisterTargetMachine<ARMTargetMachine> X(TheARMTarget);
  34   RegisterTargetMachine<ThumbTargetMachine> Y(TheThumbTarget);
  35 }
  36
  37 /// TargetMachine ctor - Create an ARM architecture model.
  38 ///
  39 ARMBaseTargetMachine::ARMBaseTargetMachine(const Target &T,
  40                                            const Module &M,
  41                                            const std::string &FS,
  42                                            bool isThumb)
  43   : LLVMTargetMachine(T),
  44     Subtarget(M, FS, isThumb),
  45     FrameInfo(Subtarget),
  46     JITInfo(),
  47     InstrItins(Subtarget.getInstrItineraryData()) {
  48   DefRelocModel = getRelocationModel();
  49 }
  50
  51 ARMTargetMachine::ARMTargetMachine(const Target &T, const Module &M,
  52                                    const std::string &FS)
  53   : ARMBaseTargetMachine(T, M, FS, false), InstrInfo(Subtarget),
  54     DataLayout(Subtarget.isAPCS_ABI() ?
  55                std::string("e-p:32:32-f64:32:32-i64:32:32") :
  56                std::string("e-p:32:32-f64:64:64-i64:64:64")),
  57     TLInfo(*this) {
  58 }
  59
  60 ThumbTargetMachine::ThumbTargetMachine(const Target &T, const Module &M,
  61                                        const std::string &FS)
  62   : ARMBaseTargetMachine(T, M, FS, true),
  63     DataLayout(Subtarget.isAPCS_ABI() ?
  64                std::string("e-p:32:32-f64:32:32-i64:32:32-"
  65                            "i16:16:32-i8:8:32-i1:8:32-a:0:32") :
  66                std::string("e-p:32:32-f64:64:64-i64:64:64-"
  67                            "i16:16:32-i8:8:32-i1:8:32-a:0:32")),
  68     TLInfo(*this) {
  69   // Create the approriate type of Thumb InstrInfo
  70   if (Subtarget.hasThumb2())
  71     InstrInfo = new Thumb2InstrInfo(Subtarget);
  72   else
  73     InstrInfo = new Thumb1InstrInfo(Subtarget);
  74 }
  75
  76
  77 const TargetAsmInfo *ARMBaseTargetMachine::createTargetAsmInfo() const {
  78   switch (Subtarget.TargetType) {
  79   default: llvm_unreachable("Unknown ARM subtarget kind");
  80   case ARMSubtarget::isDarwin:
  81     return new ARMDarwinTargetAsmInfo(*this);
  82   case ARMSubtarget::isELF:
  83     return new ARMELFTargetAsmInfo(*this);
  84   }
  85 }
  86
  87
  88 // Pass Pipeline Configuration
  89 bool ARMBaseTargetMachine::addInstSelector(PassManagerBase &PM,
  90                                            CodeGenOpt::Level OptLevel) {
  91   PM.add(createARMISelDag(*this));
  92   return false;
  93 }
  94
  95 bool ARMBaseTargetMachine::addPreRegAlloc(PassManagerBase &PM,
  96                                           CodeGenOpt::Level OptLevel) {
  97   // FIXME: temporarily disabling load / store optimization pass for Thumb mode.
  98   if (OptLevel != CodeGenOpt::None && !DisableLdStOpti && !Subtarget.isThumb())
  99     PM.add(createARMLoadStoreOptimizationPass(true));
 100   return true;
 101 }
 102
 103 bool ARMBaseTargetMachine::addPreEmitPass(PassManagerBase &PM,
 104                                           CodeGenOpt::Level OptLevel) {
 105   // FIXME: temporarily disabling load / store optimization pass for Thumb mode.
 106   if (OptLevel != CodeGenOpt::None && !DisableLdStOpti && !Subtarget.isThumb())
 107     PM.add(createARMLoadStoreOptimizationPass());
 108
 109   if (OptLevel != CodeGenOpt::None &&
 110       !DisableIfConversion && !Subtarget.isThumb())
 111     PM.add(createIfConverterPass());
 112
 113   if (Subtarget.isThumb2())
 114     PM.add(createThumb2ITBlockPass());
 115
 116   PM.add(createARMConstantIslandPass());
 117   return true;
 118 }
 119
 120 bool ARMBaseTargetMachine::addCodeEmitter(PassManagerBase &PM,
 121                                           CodeGenOpt::Level OptLevel,
 122                                           MachineCodeEmitter &MCE) {
 123   // FIXME: Move this to TargetJITInfo!
 124   if (DefRelocModel == Reloc::Default)
 125     setRelocationModel(Reloc::Static);
 126
 127   // Machine code emitter pass for ARM.
 128   PM.add(createARMCodeEmitterPass(*this, MCE));
 129   return false;
 130 }
 131
 132 bool ARMBaseTargetMachine::addCodeEmitter(PassManagerBase &PM,
 133                                           CodeGenOpt::Level OptLevel,
 134                                           JITCodeEmitter &JCE) {
 135   // FIXME: Move this to TargetJITInfo!
 136   if (DefRelocModel == Reloc::Default)
 137     setRelocationModel(Reloc::Static);
 138
 139   // Machine code emitter pass for ARM.
 140   PM.add(createARMJITCodeEmitterPass(*this, JCE));
 141   return false;
 142 }
 143
 144 bool ARMBaseTargetMachine::addCodeEmitter(PassManagerBase &PM,
 145                                           CodeGenOpt::Level OptLevel,
 146                                           ObjectCodeEmitter &OCE) {
 147   // FIXME: Move this to TargetJITInfo!
 148   if (DefRelocModel == Reloc::Default)
 149     setRelocationModel(Reloc::Static);
 150
 151   // Machine code emitter pass for ARM.
 152   PM.add(createARMObjectCodeEmitterPass(*this, OCE));
 153   return false;
 154 }
 155
 156 bool ARMBaseTargetMachine::addSimpleCodeEmitter(PassManagerBase &PM,
 157                                                 CodeGenOpt::Level OptLevel,
 158                                                 MachineCodeEmitter &MCE) {
 159   // Machine code emitter pass for ARM.
 160   PM.add(createARMCodeEmitterPass(*this, MCE));
 161   return false;
 162 }
 163
 164 bool ARMBaseTargetMachine::addSimpleCodeEmitter(PassManagerBase &PM,
 165                                                 CodeGenOpt::Level OptLevel,
 166                                                 JITCodeEmitter &JCE) {
 167   // Machine code emitter pass for ARM.
 168   PM.add(createARMJITCodeEmitterPass(*this, JCE));
 169   return false;
 170 }
 171
 172 bool ARMBaseTargetMachine::addSimpleCodeEmitter(PassManagerBase &PM,
 173                                             CodeGenOpt::Level OptLevel,
 174                                             ObjectCodeEmitter &OCE) {
 175   // Machine code emitter pass for ARM.
 176   PM.add(createARMObjectCodeEmitterPass(*this, OCE));
 177   return false;
 178 }
 179