1 //===-- ARMTargetMachine.cpp - Define TargetMachine for ARM ---------------===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
11 //===----------------------------------------------------------------------===//
13 #include "ARMTargetMachine.h"
14 #include "ARMTargetAsmInfo.h"
15 #include "ARMFrameInfo.h"
17 #include "llvm/Module.h"
18 #include "llvm/PassManager.h"
19 #include "llvm/CodeGen/Passes.h"
20 #include "llvm/Support/CommandLine.h"
21 #include "llvm/Support/FormattedStream.h"
22 #include "llvm/Target/TargetMachineRegistry.h"
23 #include "llvm/Target/TargetOptions.h"
26 static cl::opt<bool> DisableLdStOpti("disable-arm-loadstore-opti", cl::Hidden,
27 cl::desc("Disable load store optimization pass"));
28 static cl::opt<bool> DisableIfConversion("disable-arm-if-conversion",cl::Hidden,
29 cl::desc("Disable if-conversion pass"));
31 /// ARMTargetMachineModule - Note that this is used on hosts that cannot link
32 /// in a library unless there are references into the library. In particular,
33 /// it seems that it is not possible to get things to work on Win32 without
34 /// this. Though it is unused, do not remove it.
35 extern "C" int ARMTargetMachineModule;
36 int ARMTargetMachineModule = 0;
38 // Register the target.
39 extern Target TheARMTarget;
40 static RegisterTarget<ARMTargetMachine> X(TheARMTarget, "arm", "ARM");
42 extern Target TheThumbTarget;
43 static RegisterTarget<ThumbTargetMachine> Y(TheThumbTarget, "thumb", "Thumb");
45 // Force static initialization.
46 extern "C" void LLVMInitializeARMTarget() { }
48 // No assembler printer by default
49 ARMBaseTargetMachine::AsmPrinterCtorFn ARMBaseTargetMachine::AsmPrinterCtor = 0;
51 /// ThumbTargetMachine - Create an Thumb architecture model.
53 unsigned ThumbTargetMachine::getJITMatchQuality() {
54 #if defined(__thumb__)
60 unsigned ThumbTargetMachine::getModuleMatchQuality(const Module &M) {
61 std::string TT = M.getTargetTriple();
62 // Match thumb-foo-bar, as well as things like thumbv5blah-*
64 (TT.substr(0, 6) == "thumb-" || TT.substr(0, 6) == "thumbv"))
67 // If the target triple is something non-thumb, we don't match.
68 if (!TT.empty()) return 0;
70 if (M.getEndianness() == Module::LittleEndian &&
71 M.getPointerSize() == Module::Pointer32)
72 return 10; // Weak match
73 else if (M.getEndianness() != Module::AnyEndianness ||
74 M.getPointerSize() != Module::AnyPointerSize)
75 return 0; // Match for some other target
77 return getJITMatchQuality()/2;
80 /// TargetMachine ctor - Create an ARM architecture model.
82 ARMBaseTargetMachine::ARMBaseTargetMachine(const Module &M,
83 const std::string &FS,
85 : Subtarget(M, FS, isThumb),
88 InstrItins(Subtarget.getInstrItineraryData()) {
89 DefRelocModel = getRelocationModel();
92 ARMTargetMachine::ARMTargetMachine(const Module &M, const std::string &FS)
93 : ARMBaseTargetMachine(M, FS, false), InstrInfo(Subtarget),
94 DataLayout(Subtarget.isAPCS_ABI() ?
95 std::string("e-p:32:32-f64:32:32-i64:32:32") :
96 std::string("e-p:32:32-f64:64:64-i64:64:64")),
100 ThumbTargetMachine::ThumbTargetMachine(const Module &M, const std::string &FS)
101 : ARMBaseTargetMachine(M, FS, true),
102 DataLayout(Subtarget.isAPCS_ABI() ?
103 std::string("e-p:32:32-f64:32:32-i64:32:32-"
104 "i16:16:32-i8:8:32-i1:8:32-a:0:32") :
105 std::string("e-p:32:32-f64:64:64-i64:64:64-"
106 "i16:16:32-i8:8:32-i1:8:32-a:0:32")),
108 // Create the approriate type of Thumb InstrInfo
109 if (Subtarget.hasThumb2())
110 InstrInfo = new Thumb2InstrInfo(Subtarget);
112 InstrInfo = new Thumb1InstrInfo(Subtarget);
115 unsigned ARMTargetMachine::getJITMatchQuality() {
122 unsigned ARMTargetMachine::getModuleMatchQuality(const Module &M) {
123 std::string TT = M.getTargetTriple();
124 // Match arm-foo-bar, as well as things like armv5blah-*
125 if (TT.size() >= 4 &&
126 (TT.substr(0, 4) == "arm-" || TT.substr(0, 4) == "armv"))
128 // If the target triple is something non-arm, we don't match.
129 if (!TT.empty()) return 0;
131 if (M.getEndianness() == Module::LittleEndian &&
132 M.getPointerSize() == Module::Pointer32)
133 return 10; // Weak match
134 else if (M.getEndianness() != Module::AnyEndianness ||
135 M.getPointerSize() != Module::AnyPointerSize)
136 return 0; // Match for some other target
138 return getJITMatchQuality()/2;
142 const TargetAsmInfo *ARMBaseTargetMachine::createTargetAsmInfo() const {
143 switch (Subtarget.TargetType) {
144 case ARMSubtarget::isDarwin:
145 return new ARMDarwinTargetAsmInfo(*this);
146 case ARMSubtarget::isELF:
147 return new ARMELFTargetAsmInfo(*this);
149 return new ARMGenericTargetAsmInfo(*this);
154 // Pass Pipeline Configuration
155 bool ARMBaseTargetMachine::addInstSelector(PassManagerBase &PM,
156 CodeGenOpt::Level OptLevel) {
157 PM.add(createARMISelDag(*this));
161 bool ARMBaseTargetMachine::addPreRegAlloc(PassManagerBase &PM,
162 CodeGenOpt::Level OptLevel) {
163 // FIXME: temporarily disabling load / store optimization pass for Thumb mode.
164 if (OptLevel != CodeGenOpt::None && !DisableLdStOpti && !Subtarget.isThumb())
165 PM.add(createARMLoadStoreOptimizationPass(true));
169 bool ARMBaseTargetMachine::addPreEmitPass(PassManagerBase &PM,
170 CodeGenOpt::Level OptLevel) {
171 // FIXME: temporarily disabling load / store optimization pass for Thumb mode.
172 if (OptLevel != CodeGenOpt::None && !DisableLdStOpti && !Subtarget.isThumb())
173 PM.add(createARMLoadStoreOptimizationPass());
175 if (OptLevel != CodeGenOpt::None &&
176 !DisableIfConversion && !Subtarget.isThumb())
177 PM.add(createIfConverterPass());
179 if (Subtarget.isThumb2())
180 PM.add(createThumb2ITBlockPass());
182 PM.add(createARMConstantIslandPass());
186 bool ARMBaseTargetMachine::addAssemblyEmitter(PassManagerBase &PM,
187 CodeGenOpt::Level OptLevel,
189 formatted_raw_ostream &Out) {
190 // Output assembly language.
191 assert(AsmPrinterCtor && "AsmPrinter was not linked in");
193 PM.add(AsmPrinterCtor(Out, *this, Verbose));
199 bool ARMBaseTargetMachine::addCodeEmitter(PassManagerBase &PM,
200 CodeGenOpt::Level OptLevel,
202 MachineCodeEmitter &MCE) {
203 // FIXME: Move this to TargetJITInfo!
204 if (DefRelocModel == Reloc::Default)
205 setRelocationModel(Reloc::Static);
207 // Machine code emitter pass for ARM.
208 PM.add(createARMCodeEmitterPass(*this, MCE));
210 assert(AsmPrinterCtor && "AsmPrinter was not linked in");
212 PM.add(AsmPrinterCtor(ferrs(), *this, true));
218 bool ARMBaseTargetMachine::addCodeEmitter(PassManagerBase &PM,
219 CodeGenOpt::Level OptLevel,
221 JITCodeEmitter &JCE) {
222 // FIXME: Move this to TargetJITInfo!
223 if (DefRelocModel == Reloc::Default)
224 setRelocationModel(Reloc::Static);
226 // Machine code emitter pass for ARM.
227 PM.add(createARMJITCodeEmitterPass(*this, JCE));
229 assert(AsmPrinterCtor && "AsmPrinter was not linked in");
231 PM.add(AsmPrinterCtor(ferrs(), *this, true));
237 bool ARMBaseTargetMachine::addCodeEmitter(PassManagerBase &PM,
238 CodeGenOpt::Level OptLevel,
240 ObjectCodeEmitter &OCE) {
241 // FIXME: Move this to TargetJITInfo!
242 if (DefRelocModel == Reloc::Default)
243 setRelocationModel(Reloc::Static);
245 // Machine code emitter pass for ARM.
246 PM.add(createARMObjectCodeEmitterPass(*this, OCE));
248 assert(AsmPrinterCtor && "AsmPrinter was not linked in");
250 PM.add(AsmPrinterCtor(ferrs(), *this, true));
256 bool ARMBaseTargetMachine::addSimpleCodeEmitter(PassManagerBase &PM,
257 CodeGenOpt::Level OptLevel,
259 MachineCodeEmitter &MCE) {
260 // Machine code emitter pass for ARM.
261 PM.add(createARMCodeEmitterPass(*this, MCE));
263 assert(AsmPrinterCtor && "AsmPrinter was not linked in");
265 PM.add(AsmPrinterCtor(ferrs(), *this, true));
271 bool ARMBaseTargetMachine::addSimpleCodeEmitter(PassManagerBase &PM,
272 CodeGenOpt::Level OptLevel,
274 JITCodeEmitter &JCE) {
275 // Machine code emitter pass for ARM.
276 PM.add(createARMJITCodeEmitterPass(*this, JCE));
278 assert(AsmPrinterCtor && "AsmPrinter was not linked in");
280 PM.add(AsmPrinterCtor(ferrs(), *this, true));
286 bool ARMBaseTargetMachine::addSimpleCodeEmitter(PassManagerBase &PM,
287 CodeGenOpt::Level OptLevel,
289 ObjectCodeEmitter &OCE) {
290 // Machine code emitter pass for ARM.
291 PM.add(createARMObjectCodeEmitterPass(*this, OCE));
293 assert(AsmPrinterCtor && "AsmPrinter was not linked in");
295 PM.add(AsmPrinterCtor(ferrs(), *this, true));