lib/Target/ARM/ARMTargetMachine.cpp

   1 //===-- ARMTargetMachine.cpp - Define TargetMachine for ARM ---------------===//
   2 //
   3 //                     The LLVM Compiler Infrastructure
   4 //
   5 // This file is distributed under the University of Illinois Open Source
   6 // License. See LICENSE.TXT for details.
   7 //
   8 //===----------------------------------------------------------------------===//
   9 //
  10 //
  11 //===----------------------------------------------------------------------===//
  12
  13 #include "ARMTargetMachine.h"
  14 #include "ARMMCAsmInfo.h"
  15 #include "ARMFrameInfo.h"
  16 #include "ARM.h"
  17 #include "llvm/PassManager.h"
  18 #include "llvm/CodeGen/Passes.h"
  19 #include "llvm/Support/FormattedStream.h"
  20 #include "llvm/Target/TargetOptions.h"
  21 #include "llvm/Target/TargetRegistry.h"
  22 using namespace llvm;
  23
  24 static const MCAsmInfo *createMCAsmInfo(const Target &T,
  25                                         const StringRef &TT) {
  26   Triple TheTriple(TT);
  27   switch (TheTriple.getOS()) {
  28   case Triple::Darwin:
  29     return new ARMMCAsmInfoDarwin();
  30   default:
  31     return new ARMELFMCAsmInfo();
  32   }
  33 }
  34
  35
  36 extern "C" void LLVMInitializeARMTarget() {
  37   // Register the target.
  38   RegisterTargetMachine<ARMTargetMachine> X(TheARMTarget);
  39   RegisterTargetMachine<ThumbTargetMachine> Y(TheThumbTarget);
  40
  41   // Register the target asm info.
  42   RegisterAsmInfoFn A(TheARMTarget, createMCAsmInfo);
  43   RegisterAsmInfoFn B(TheThumbTarget, createMCAsmInfo);
  44 }
  45
  46 /// TargetMachine ctor - Create an ARM architecture model.
  47 ///
  48 ARMBaseTargetMachine::ARMBaseTargetMachine(const Target &T,
  49                                            const std::string &TT,
  50                                            const std::string &FS,
  51                                            bool isThumb)
  52   : LLVMTargetMachine(T, TT),
  53     Subtarget(TT, FS, isThumb),
  54     FrameInfo(Subtarget),
  55     JITInfo(),
  56     InstrItins(Subtarget.getInstrItineraryData()) {
  57   DefRelocModel = getRelocationModel();
  58 }
  59
  60 ARMTargetMachine::ARMTargetMachine(const Target &T, const std::string &TT,
  61                                    const std::string &FS)
  62   : ARMBaseTargetMachine(T, TT, FS, false), InstrInfo(Subtarget),
  63     DataLayout(Subtarget.isAPCS_ABI() ?
  64                std::string("e-p:32:32-f64:32:32-i64:32:32") :
  65                std::string("e-p:32:32-f64:64:64-i64:64:64")),
  66     TLInfo(*this) {
  67 }
  68
  69 ThumbTargetMachine::ThumbTargetMachine(const Target &T, const std::string &TT,
  70                                        const std::string &FS)
  71   : ARMBaseTargetMachine(T, TT, FS, true),
  72     InstrInfo(Subtarget.hasThumb2()
  73               ? ((ARMBaseInstrInfo*)new Thumb2InstrInfo(Subtarget))
  74               : ((ARMBaseInstrInfo*)new Thumb1InstrInfo(Subtarget))),
  75     DataLayout(Subtarget.isAPCS_ABI() ?
  76                std::string("e-p:32:32-f64:32:32-i64:32:32-"
  77                            "i16:16:32-i8:8:32-i1:8:32-a:0:32") :
  78                std::string("e-p:32:32-f64:64:64-i64:64:64-"
  79                            "i16:16:32-i8:8:32-i1:8:32-a:0:32")),
  80     TLInfo(*this) {
  81 }
  82
  83
  84
  85 // Pass Pipeline Configuration
  86 bool ARMBaseTargetMachine::addInstSelector(PassManagerBase &PM,
  87                                            CodeGenOpt::Level OptLevel) {
  88   PM.add(createARMISelDag(*this, OptLevel));
  89   return false;
  90 }
  91
  92 bool ARMBaseTargetMachine::addPreRegAlloc(PassManagerBase &PM,
  93                                           CodeGenOpt::Level OptLevel) {
  94   if (Subtarget.hasNEON())
  95     PM.add(createNEONPreAllocPass());
  96
  97   // FIXME: temporarily disabling load / store optimization pass for Thumb1.
  98   if (OptLevel != CodeGenOpt::None && !Subtarget.isThumb1Only())
  99     PM.add(createARMLoadStoreOptimizationPass(true));
 100   return true;
 101 }
 102
 103 bool ARMBaseTargetMachine::addPreSched2(PassManagerBase &PM,
 104                                         CodeGenOpt::Level OptLevel) {
 105   // FIXME: temporarily disabling load / store optimization pass for Thumb1.
 106   if (OptLevel != CodeGenOpt::None && !Subtarget.isThumb1Only())
 107     PM.add(createARMLoadStoreOptimizationPass());
 108
 109   return true;
 110 }
 111
 112 bool ARMBaseTargetMachine::addPreEmitPass(PassManagerBase &PM,
 113                                           CodeGenOpt::Level OptLevel) {
 114   // FIXME: temporarily disabling load / store optimization pass for Thumb1.
 115   if (OptLevel != CodeGenOpt::None && !Subtarget.isThumb1Only())
 116     PM.add(createIfConverterPass());
 117
 118   if (Subtarget.isThumb2()) {
 119     PM.add(createThumb2ITBlockPass());
 120     PM.add(createThumb2SizeReductionPass());
 121   }
 122
 123   PM.add(createARMConstantIslandPass());
 124   return true;
 125 }
 126
 127 bool ARMBaseTargetMachine::addCodeEmitter(PassManagerBase &PM,
 128                                           CodeGenOpt::Level OptLevel,
 129                                           MachineCodeEmitter &MCE) {
 130   // FIXME: Move this to TargetJITInfo!
 131   if (DefRelocModel == Reloc::Default)
 132     setRelocationModel(Reloc::Static);
 133
 134   // Machine code emitter pass for ARM.
 135   PM.add(createARMCodeEmitterPass(*this, MCE));
 136   return false;
 137 }
 138
 139 bool ARMBaseTargetMachine::addCodeEmitter(PassManagerBase &PM,
 140                                           CodeGenOpt::Level OptLevel,
 141                                           JITCodeEmitter &JCE) {
 142   // FIXME: Move this to TargetJITInfo!
 143   if (DefRelocModel == Reloc::Default)
 144     setRelocationModel(Reloc::Static);
 145
 146   // Machine code emitter pass for ARM.
 147   PM.add(createARMJITCodeEmitterPass(*this, JCE));
 148   return false;
 149 }
 150
 151 bool ARMBaseTargetMachine::addCodeEmitter(PassManagerBase &PM,
 152                                           CodeGenOpt::Level OptLevel,
 153                                           ObjectCodeEmitter &OCE) {
 154   // FIXME: Move this to TargetJITInfo!
 155   if (DefRelocModel == Reloc::Default)
 156     setRelocationModel(Reloc::Static);
 157
 158   // Machine code emitter pass for ARM.
 159   PM.add(createARMObjectCodeEmitterPass(*this, OCE));
 160   return false;
 161 }
 162
 163 bool ARMBaseTargetMachine::addSimpleCodeEmitter(PassManagerBase &PM,
 164                                                 CodeGenOpt::Level OptLevel,
 165                                                 MachineCodeEmitter &MCE) {
 166   // Machine code emitter pass for ARM.
 167   PM.add(createARMCodeEmitterPass(*this, MCE));
 168   return false;
 169 }
 170
 171 bool ARMBaseTargetMachine::addSimpleCodeEmitter(PassManagerBase &PM,
 172                                                 CodeGenOpt::Level OptLevel,
 173                                                 JITCodeEmitter &JCE) {
 174   // Machine code emitter pass for ARM.
 175   PM.add(createARMJITCodeEmitterPass(*this, JCE));
 176   return false;
 177 }
 178
 179 bool ARMBaseTargetMachine::addSimpleCodeEmitter(PassManagerBase &PM,
 180                                             CodeGenOpt::Level OptLevel,
 181                                             ObjectCodeEmitter &OCE) {
 182   // Machine code emitter pass for ARM.
 183   PM.add(createARMObjectCodeEmitterPass(*this, OCE));
 184   return false;
 185 }
 186