1 //===-- ARMTargetMachine.cpp - Define TargetMachine for ARM ---------------===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
11 //===----------------------------------------------------------------------===//
13 #include "ARMTargetMachine.h"
14 #include "ARMTargetAsmInfo.h"
15 #include "ARMFrameInfo.h"
17 #include "llvm/Module.h"
18 #include "llvm/PassManager.h"
19 #include "llvm/CodeGen/Passes.h"
20 #include "llvm/Support/CommandLine.h"
21 #include "llvm/Support/FormattedStream.h"
22 #include "llvm/Target/TargetMachineRegistry.h"
23 #include "llvm/Target/TargetOptions.h"
26 static cl::opt<bool> DisableLdStOpti("disable-arm-loadstore-opti", cl::Hidden,
27 cl::desc("Disable load store optimization pass"));
28 static cl::opt<bool> DisableIfConversion("disable-arm-if-conversion",cl::Hidden,
29 cl::desc("Disable if-conversion pass"));
31 /// ARMTargetMachineModule - Note that this is used on hosts that cannot link
32 /// in a library unless there are references into the library. In particular,
33 /// it seems that it is not possible to get things to work on Win32 without
34 /// this. Though it is unused, do not remove it.
35 extern "C" int ARMTargetMachineModule;
36 int ARMTargetMachineModule = 0;
38 // Register the target.
39 extern Target TheARMTarget;
40 static RegisterTarget<ARMTargetMachine> X(TheARMTarget, "arm", "ARM");
42 extern Target TheThumbTarget;
43 static RegisterTarget<ThumbTargetMachine> Y(TheThumbTarget, "thumb", "Thumb");
45 // Force static initialization.
46 extern "C" void LLVMInitializeARMTarget() { }
48 // No assembler printer by default
49 ARMBaseTargetMachine::AsmPrinterCtorFn ARMBaseTargetMachine::AsmPrinterCtor = 0;
51 /// ThumbTargetMachine - Create an Thumb architecture model.
53 unsigned ThumbTargetMachine::getJITMatchQuality() {
54 #if defined(__thumb__)
60 unsigned ThumbTargetMachine::getModuleMatchQuality(const Module &M) {
61 std::string TT = M.getTargetTriple();
62 // Match thumb-foo-bar, as well as things like thumbv5blah-*
64 (TT.substr(0, 6) == "thumb-" || TT.substr(0, 6) == "thumbv"))
67 // If the target triple is something non-thumb, we don't match.
68 if (!TT.empty()) return 0;
70 if (M.getEndianness() == Module::LittleEndian &&
71 M.getPointerSize() == Module::Pointer32)
72 return 10; // Weak match
73 else if (M.getEndianness() != Module::AnyEndianness ||
74 M.getPointerSize() != Module::AnyPointerSize)
75 return 0; // Match for some other target
77 return getJITMatchQuality()/2;
80 /// TargetMachine ctor - Create an ARM architecture model.
82 ARMBaseTargetMachine::ARMBaseTargetMachine(const Target &T,
84 const std::string &FS,
86 : LLVMTargetMachine(T),
87 Subtarget(M, FS, isThumb),
90 InstrItins(Subtarget.getInstrItineraryData()) {
91 DefRelocModel = getRelocationModel();
94 ARMTargetMachine::ARMTargetMachine(const Target &T, const Module &M,
95 const std::string &FS)
96 : ARMBaseTargetMachine(T, M, FS, false), InstrInfo(Subtarget),
97 DataLayout(Subtarget.isAPCS_ABI() ?
98 std::string("e-p:32:32-f64:32:32-i64:32:32") :
99 std::string("e-p:32:32-f64:64:64-i64:64:64")),
103 ThumbTargetMachine::ThumbTargetMachine(const Target &T, const Module &M,
104 const std::string &FS)
105 : ARMBaseTargetMachine(T, M, FS, true),
106 DataLayout(Subtarget.isAPCS_ABI() ?
107 std::string("e-p:32:32-f64:32:32-i64:32:32-"
108 "i16:16:32-i8:8:32-i1:8:32-a:0:32") :
109 std::string("e-p:32:32-f64:64:64-i64:64:64-"
110 "i16:16:32-i8:8:32-i1:8:32-a:0:32")),
112 // Create the approriate type of Thumb InstrInfo
113 if (Subtarget.hasThumb2())
114 InstrInfo = new Thumb2InstrInfo(Subtarget);
116 InstrInfo = new Thumb1InstrInfo(Subtarget);
119 unsigned ARMTargetMachine::getJITMatchQuality() {
126 unsigned ARMTargetMachine::getModuleMatchQuality(const Module &M) {
127 std::string TT = M.getTargetTriple();
128 // Match arm-foo-bar, as well as things like armv5blah-*
129 if (TT.size() >= 4 &&
130 (TT.substr(0, 4) == "arm-" || TT.substr(0, 4) == "armv"))
132 // If the target triple is something non-arm, we don't match.
133 if (!TT.empty()) return 0;
135 if (M.getEndianness() == Module::LittleEndian &&
136 M.getPointerSize() == Module::Pointer32)
137 return 10; // Weak match
138 else if (M.getEndianness() != Module::AnyEndianness ||
139 M.getPointerSize() != Module::AnyPointerSize)
140 return 0; // Match for some other target
142 return getJITMatchQuality()/2;
146 const TargetAsmInfo *ARMBaseTargetMachine::createTargetAsmInfo() const {
147 switch (Subtarget.TargetType) {
148 case ARMSubtarget::isDarwin:
149 return new ARMDarwinTargetAsmInfo(*this);
150 case ARMSubtarget::isELF:
151 return new ARMELFTargetAsmInfo(*this);
153 return new ARMGenericTargetAsmInfo(*this);
158 // Pass Pipeline Configuration
159 bool ARMBaseTargetMachine::addInstSelector(PassManagerBase &PM,
160 CodeGenOpt::Level OptLevel) {
161 PM.add(createARMISelDag(*this));
165 bool ARMBaseTargetMachine::addPreRegAlloc(PassManagerBase &PM,
166 CodeGenOpt::Level OptLevel) {
167 // FIXME: temporarily disabling load / store optimization pass for Thumb mode.
168 if (OptLevel != CodeGenOpt::None && !DisableLdStOpti && !Subtarget.isThumb())
169 PM.add(createARMLoadStoreOptimizationPass(true));
173 bool ARMBaseTargetMachine::addPreEmitPass(PassManagerBase &PM,
174 CodeGenOpt::Level OptLevel) {
175 // FIXME: temporarily disabling load / store optimization pass for Thumb mode.
176 if (OptLevel != CodeGenOpt::None && !DisableLdStOpti && !Subtarget.isThumb())
177 PM.add(createARMLoadStoreOptimizationPass());
179 if (OptLevel != CodeGenOpt::None &&
180 !DisableIfConversion && !Subtarget.isThumb())
181 PM.add(createIfConverterPass());
183 if (Subtarget.isThumb2())
184 PM.add(createThumb2ITBlockPass());
186 PM.add(createARMConstantIslandPass());
190 bool ARMBaseTargetMachine::addAssemblyEmitter(PassManagerBase &PM,
191 CodeGenOpt::Level OptLevel,
193 formatted_raw_ostream &Out) {
194 // Output assembly language.
195 assert(AsmPrinterCtor && "AsmPrinter was not linked in");
197 PM.add(AsmPrinterCtor(Out, *this, Verbose));
203 bool ARMBaseTargetMachine::addCodeEmitter(PassManagerBase &PM,
204 CodeGenOpt::Level OptLevel,
206 MachineCodeEmitter &MCE) {
207 // FIXME: Move this to TargetJITInfo!
208 if (DefRelocModel == Reloc::Default)
209 setRelocationModel(Reloc::Static);
211 // Machine code emitter pass for ARM.
212 PM.add(createARMCodeEmitterPass(*this, MCE));
214 assert(AsmPrinterCtor && "AsmPrinter was not linked in");
216 PM.add(AsmPrinterCtor(ferrs(), *this, true));
222 bool ARMBaseTargetMachine::addCodeEmitter(PassManagerBase &PM,
223 CodeGenOpt::Level OptLevel,
225 JITCodeEmitter &JCE) {
226 // FIXME: Move this to TargetJITInfo!
227 if (DefRelocModel == Reloc::Default)
228 setRelocationModel(Reloc::Static);
230 // Machine code emitter pass for ARM.
231 PM.add(createARMJITCodeEmitterPass(*this, JCE));
233 assert(AsmPrinterCtor && "AsmPrinter was not linked in");
235 PM.add(AsmPrinterCtor(ferrs(), *this, true));
241 bool ARMBaseTargetMachine::addCodeEmitter(PassManagerBase &PM,
242 CodeGenOpt::Level OptLevel,
244 ObjectCodeEmitter &OCE) {
245 // FIXME: Move this to TargetJITInfo!
246 if (DefRelocModel == Reloc::Default)
247 setRelocationModel(Reloc::Static);
249 // Machine code emitter pass for ARM.
250 PM.add(createARMObjectCodeEmitterPass(*this, OCE));
252 assert(AsmPrinterCtor && "AsmPrinter was not linked in");
254 PM.add(AsmPrinterCtor(ferrs(), *this, true));
260 bool ARMBaseTargetMachine::addSimpleCodeEmitter(PassManagerBase &PM,
261 CodeGenOpt::Level OptLevel,
263 MachineCodeEmitter &MCE) {
264 // Machine code emitter pass for ARM.
265 PM.add(createARMCodeEmitterPass(*this, MCE));
267 assert(AsmPrinterCtor && "AsmPrinter was not linked in");
269 PM.add(AsmPrinterCtor(ferrs(), *this, true));
275 bool ARMBaseTargetMachine::addSimpleCodeEmitter(PassManagerBase &PM,
276 CodeGenOpt::Level OptLevel,
278 JITCodeEmitter &JCE) {
279 // Machine code emitter pass for ARM.
280 PM.add(createARMJITCodeEmitterPass(*this, JCE));
282 assert(AsmPrinterCtor && "AsmPrinter was not linked in");
284 PM.add(AsmPrinterCtor(ferrs(), *this, true));
290 bool ARMBaseTargetMachine::addSimpleCodeEmitter(PassManagerBase &PM,
291 CodeGenOpt::Level OptLevel,
293 ObjectCodeEmitter &OCE) {
294 // Machine code emitter pass for ARM.
295 PM.add(createARMObjectCodeEmitterPass(*this, OCE));
297 assert(AsmPrinterCtor && "AsmPrinter was not linked in");
299 PM.add(AsmPrinterCtor(ferrs(), *this, true));