lib/Target/ARM/ARMTargetMachine.cpp

   1 //===-- ARMTargetMachine.cpp - Define TargetMachine for ARM ---------------===//
   2 //
   3 //                     The LLVM Compiler Infrastructure
   4 //
   5 // This file is distributed under the University of Illinois Open Source
   6 // License. See LICENSE.TXT for details.
   7 //
   8 //===----------------------------------------------------------------------===//
   9 //
  10 //
  11 //===----------------------------------------------------------------------===//
  12
  13 #include "ARMTargetMachine.h"
  14 #include "ARMTargetAsmInfo.h"
  15 #include "ARMFrameInfo.h"
  16 #include "ARM.h"
  17 #include "llvm/Module.h"
  18 #include "llvm/PassManager.h"
  19 #include "llvm/CodeGen/Passes.h"
  20 #include "llvm/Support/CommandLine.h"
  21 #include "llvm/Support/FormattedStream.h"
  22 #include "llvm/Target/TargetOptions.h"
  23 #include "llvm/Target/TargetRegistry.h"
  24 using namespace llvm;
  25
  26 static cl::opt<bool> DisableLdStOpti("disable-arm-loadstore-opti", cl::Hidden,
  27                               cl::desc("Disable load store optimization pass"));
  28 static cl::opt<bool> DisableIfConversion("disable-arm-if-conversion",cl::Hidden,
  29                               cl::desc("Disable if-conversion pass"));
  30
  31 extern "C" void LLVMInitializeARMTarget() {
  32   // Register the target.
  33   RegisterTargetMachine<ARMTargetMachine> X(TheARMTarget);
  34   RegisterTargetMachine<ThumbTargetMachine> Y(TheThumbTarget);
  35 }
  36
  37 /// TargetMachine ctor - Create an ARM architecture model.
  38 ///
  39 ARMBaseTargetMachine::ARMBaseTargetMachine(const Target &T,
  40                                            const Module &M,
  41                                            const std::string &FS,
  42                                            bool isThumb)
  43   : LLVMTargetMachine(T),
  44     Subtarget(M, FS, isThumb),
  45     FrameInfo(Subtarget),
  46     JITInfo(),
  47     InstrItins(Subtarget.getInstrItineraryData()) {
  48   DefRelocModel = getRelocationModel();
  49 }
  50
  51 ARMTargetMachine::ARMTargetMachine(const Target &T, const Module &M,
  52                                    const std::string &FS)
  53   : ARMBaseTargetMachine(T, M, FS, false), InstrInfo(Subtarget),
  54     DataLayout(Subtarget.isAPCS_ABI() ?
  55                std::string("e-p:32:32-f64:32:32-i64:32:32") :
  56                std::string("e-p:32:32-f64:64:64-i64:64:64")),
  57     TLInfo(*this) {
  58 }
  59
  60 ThumbTargetMachine::ThumbTargetMachine(const Target &T, const Module &M,
  61                                        const std::string &FS)
  62   : ARMBaseTargetMachine(T, M, FS, true),
  63     DataLayout(Subtarget.isAPCS_ABI() ?
  64                std::string("e-p:32:32-f64:32:32-i64:32:32-"
  65                            "i16:16:32-i8:8:32-i1:8:32-a:0:32") :
  66                std::string("e-p:32:32-f64:64:64-i64:64:64-"
  67                            "i16:16:32-i8:8:32-i1:8:32-a:0:32")),
  68     TLInfo(*this) {
  69   // Create the approriate type of Thumb InstrInfo
  70   if (Subtarget.hasThumb2())
  71     InstrInfo = new Thumb2InstrInfo(Subtarget);
  72   else
  73     InstrInfo = new Thumb1InstrInfo(Subtarget);
  74 }
  75
  76
  77 const TargetAsmInfo *ARMBaseTargetMachine::createTargetAsmInfo() const {
  78   switch (Subtarget.TargetType) {
  79    case ARMSubtarget::isDarwin:
  80     return new ARMDarwinTargetAsmInfo(*this);
  81    case ARMSubtarget::isELF:
  82     return new ARMELFTargetAsmInfo(*this);
  83    default:
  84     return new ARMGenericTargetAsmInfo(*this);
  85   }
  86 }
  87
  88
  89 // Pass Pipeline Configuration
  90 bool ARMBaseTargetMachine::addInstSelector(PassManagerBase &PM,
  91                                            CodeGenOpt::Level OptLevel) {
  92   PM.add(createARMISelDag(*this));
  93   return false;
  94 }
  95
  96 bool ARMBaseTargetMachine::addPreRegAlloc(PassManagerBase &PM,
  97                                           CodeGenOpt::Level OptLevel) {
  98   // FIXME: temporarily disabling load / store optimization pass for Thumb mode.
  99   if (OptLevel != CodeGenOpt::None && !DisableLdStOpti && !Subtarget.isThumb())
 100     PM.add(createARMLoadStoreOptimizationPass(true));
 101   return true;
 102 }
 103
 104 bool ARMBaseTargetMachine::addPreEmitPass(PassManagerBase &PM,
 105                                           CodeGenOpt::Level OptLevel) {
 106   // FIXME: temporarily disabling load / store optimization pass for Thumb mode.
 107   if (OptLevel != CodeGenOpt::None && !DisableLdStOpti && !Subtarget.isThumb())
 108     PM.add(createARMLoadStoreOptimizationPass());
 109
 110   if (OptLevel != CodeGenOpt::None &&
 111       !DisableIfConversion && !Subtarget.isThumb())
 112     PM.add(createIfConverterPass());
 113
 114   if (Subtarget.isThumb2())
 115     PM.add(createThumb2ITBlockPass());
 116
 117   PM.add(createARMConstantIslandPass());
 118   return true;
 119 }
 120
 121 bool ARMBaseTargetMachine::addCodeEmitter(PassManagerBase &PM,
 122                                           CodeGenOpt::Level OptLevel,
 123                                           MachineCodeEmitter &MCE) {
 124   // FIXME: Move this to TargetJITInfo!
 125   if (DefRelocModel == Reloc::Default)
 126     setRelocationModel(Reloc::Static);
 127
 128   // Machine code emitter pass for ARM.
 129   PM.add(createARMCodeEmitterPass(*this, MCE));
 130   return false;
 131 }
 132
 133 bool ARMBaseTargetMachine::addCodeEmitter(PassManagerBase &PM,
 134                                           CodeGenOpt::Level OptLevel,
 135                                           JITCodeEmitter &JCE) {
 136   // FIXME: Move this to TargetJITInfo!
 137   if (DefRelocModel == Reloc::Default)
 138     setRelocationModel(Reloc::Static);
 139
 140   // Machine code emitter pass for ARM.
 141   PM.add(createARMJITCodeEmitterPass(*this, JCE));
 142   return false;
 143 }
 144
 145 bool ARMBaseTargetMachine::addCodeEmitter(PassManagerBase &PM,
 146                                           CodeGenOpt::Level OptLevel,
 147                                           ObjectCodeEmitter &OCE) {
 148   // FIXME: Move this to TargetJITInfo!
 149   if (DefRelocModel == Reloc::Default)
 150     setRelocationModel(Reloc::Static);
 151
 152   // Machine code emitter pass for ARM.
 153   PM.add(createARMObjectCodeEmitterPass(*this, OCE));
 154   return false;
 155 }
 156
 157 bool ARMBaseTargetMachine::addSimpleCodeEmitter(PassManagerBase &PM,
 158                                                 CodeGenOpt::Level OptLevel,
 159                                                 MachineCodeEmitter &MCE) {
 160   // Machine code emitter pass for ARM.
 161   PM.add(createARMCodeEmitterPass(*this, MCE));
 162   return false;
 163 }
 164
 165 bool ARMBaseTargetMachine::addSimpleCodeEmitter(PassManagerBase &PM,
 166                                                 CodeGenOpt::Level OptLevel,
 167                                                 JITCodeEmitter &JCE) {
 168   // Machine code emitter pass for ARM.
 169   PM.add(createARMJITCodeEmitterPass(*this, JCE));
 170   return false;
 171 }
 172
 173 bool ARMBaseTargetMachine::addSimpleCodeEmitter(PassManagerBase &PM,
 174                                             CodeGenOpt::Level OptLevel,
 175                                             ObjectCodeEmitter &OCE) {
 176   // Machine code emitter pass for ARM.
 177   PM.add(createARMObjectCodeEmitterPass(*this, OCE));
 178   return false;
 179 }
 180