lib/Target/ARM/ARMTargetMachine.cpp

   1 //===-- ARMTargetMachine.cpp - Define TargetMachine for ARM ---------------===//
   2 //
   3 //                     The LLVM Compiler Infrastructure
   4 //
   5 // This file is distributed under the University of Illinois Open Source
   6 // License. See LICENSE.TXT for details.
   7 //
   8 //===----------------------------------------------------------------------===//
   9 //
  10 //
  11 //===----------------------------------------------------------------------===//
  12
  13 #include "ARMTargetMachine.h"
  14 #include "ARMMCAsmInfo.h"
  15 #include "ARMFrameInfo.h"
  16 #include "ARM.h"
  17 #include "llvm/PassManager.h"
  18 #include "llvm/CodeGen/Passes.h"
  19 #include "llvm/Support/CommandLine.h"
  20 #include "llvm/Support/FormattedStream.h"
  21 #include "llvm/Target/TargetOptions.h"
  22 #include "llvm/Target/TargetRegistry.h"
  23 using namespace llvm;
  24
  25 static cl::opt<bool>
  26 LdStBeforeSched("ldstopti-before-sched2", cl::Hidden,
  27             cl::desc("Move ld / st multiple pass before postalloc scheduling"));
  28
  29 static const MCAsmInfo *createMCAsmInfo(const Target &T,
  30                                         const StringRef &TT) {
  31   Triple TheTriple(TT);
  32   switch (TheTriple.getOS()) {
  33   case Triple::Darwin:
  34     return new ARMMCAsmInfoDarwin();
  35   default:
  36     return new ARMELFMCAsmInfo();
  37   }
  38 }
  39
  40
  41 extern "C" void LLVMInitializeARMTarget() {
  42   // Register the target.
  43   RegisterTargetMachine<ARMTargetMachine> X(TheARMTarget);
  44   RegisterTargetMachine<ThumbTargetMachine> Y(TheThumbTarget);
  45
  46   // Register the target asm info.
  47   RegisterAsmInfoFn A(TheARMTarget, createMCAsmInfo);
  48   RegisterAsmInfoFn B(TheThumbTarget, createMCAsmInfo);
  49 }
  50
  51 /// TargetMachine ctor - Create an ARM architecture model.
  52 ///
  53 ARMBaseTargetMachine::ARMBaseTargetMachine(const Target &T,
  54                                            const std::string &TT,
  55                                            const std::string &FS,
  56                                            bool isThumb)
  57   : LLVMTargetMachine(T, TT),
  58     Subtarget(TT, FS, isThumb),
  59     FrameInfo(Subtarget),
  60     JITInfo(),
  61     InstrItins(Subtarget.getInstrItineraryData()) {
  62   DefRelocModel = getRelocationModel();
  63 }
  64
  65 ARMTargetMachine::ARMTargetMachine(const Target &T, const std::string &TT,
  66                                    const std::string &FS)
  67   : ARMBaseTargetMachine(T, TT, FS, false), InstrInfo(Subtarget),
  68     DataLayout(Subtarget.isAPCS_ABI() ?
  69                std::string("e-p:32:32-f64:32:32-i64:32:32") :
  70                std::string("e-p:32:32-f64:64:64-i64:64:64")),
  71     TLInfo(*this) {
  72 }
  73
  74 ThumbTargetMachine::ThumbTargetMachine(const Target &T, const std::string &TT,
  75                                        const std::string &FS)
  76   : ARMBaseTargetMachine(T, TT, FS, true),
  77     InstrInfo(Subtarget.hasThumb2()
  78               ? ((ARMBaseInstrInfo*)new Thumb2InstrInfo(Subtarget))
  79               : ((ARMBaseInstrInfo*)new Thumb1InstrInfo(Subtarget))),
  80     DataLayout(Subtarget.isAPCS_ABI() ?
  81                std::string("e-p:32:32-f64:32:32-i64:32:32-"
  82                            "i16:16:32-i8:8:32-i1:8:32-a:0:32") :
  83                std::string("e-p:32:32-f64:64:64-i64:64:64-"
  84                            "i16:16:32-i8:8:32-i1:8:32-a:0:32")),
  85     TLInfo(*this) {
  86 }
  87
  88
  89
  90 // Pass Pipeline Configuration
  91 bool ARMBaseTargetMachine::addInstSelector(PassManagerBase &PM,
  92                                            CodeGenOpt::Level OptLevel) {
  93   PM.add(createARMISelDag(*this, OptLevel));
  94   return false;
  95 }
  96
  97 bool ARMBaseTargetMachine::addPreRegAlloc(PassManagerBase &PM,
  98                                           CodeGenOpt::Level OptLevel) {
  99   if (Subtarget.hasNEON())
 100     PM.add(createNEONPreAllocPass());
 101
 102   // FIXME: temporarily disabling load / store optimization pass for Thumb1.
 103   if (OptLevel != CodeGenOpt::None && !Subtarget.isThumb1Only())
 104     PM.add(createARMLoadStoreOptimizationPass(true));
 105   return true;
 106 }
 107
 108 bool ARMBaseTargetMachine::addPreSched2(PassManagerBase &PM,
 109                                         CodeGenOpt::Level OptLevel) {
 110   // FIXME: temporarily disabling load / store optimization pass for Thumb1.
 111   if (OptLevel != CodeGenOpt::None && !Subtarget.isThumb1Only())
 112     if (LdStBeforeSched)
 113       PM.add(createARMLoadStoreOptimizationPass());
 114
 115   return true;
 116 }
 117
 118 bool ARMBaseTargetMachine::addPreEmitPass(PassManagerBase &PM,
 119                                           CodeGenOpt::Level OptLevel) {
 120   // FIXME: temporarily disabling load / store optimization pass for Thumb1.
 121   if (OptLevel != CodeGenOpt::None && !Subtarget.isThumb1Only()) {
 122     if (!LdStBeforeSched)
 123       PM.add(createARMLoadStoreOptimizationPass());
 124     PM.add(createIfConverterPass());
 125   }
 126
 127   if (Subtarget.isThumb2()) {
 128     PM.add(createThumb2ITBlockPass());
 129     PM.add(createThumb2SizeReductionPass());
 130   }
 131
 132   PM.add(createARMConstantIslandPass());
 133   return true;
 134 }
 135
 136 bool ARMBaseTargetMachine::addCodeEmitter(PassManagerBase &PM,
 137                                           CodeGenOpt::Level OptLevel,
 138                                           MachineCodeEmitter &MCE) {
 139   // FIXME: Move this to TargetJITInfo!
 140   if (DefRelocModel == Reloc::Default)
 141     setRelocationModel(Reloc::Static);
 142
 143   // Machine code emitter pass for ARM.
 144   PM.add(createARMCodeEmitterPass(*this, MCE));
 145   return false;
 146 }
 147
 148 bool ARMBaseTargetMachine::addCodeEmitter(PassManagerBase &PM,
 149                                           CodeGenOpt::Level OptLevel,
 150                                           JITCodeEmitter &JCE) {
 151   // FIXME: Move this to TargetJITInfo!
 152   if (DefRelocModel == Reloc::Default)
 153     setRelocationModel(Reloc::Static);
 154
 155   // Machine code emitter pass for ARM.
 156   PM.add(createARMJITCodeEmitterPass(*this, JCE));
 157   return false;
 158 }
 159
 160 bool ARMBaseTargetMachine::addCodeEmitter(PassManagerBase &PM,
 161                                           CodeGenOpt::Level OptLevel,
 162                                           ObjectCodeEmitter &OCE) {
 163   // FIXME: Move this to TargetJITInfo!
 164   if (DefRelocModel == Reloc::Default)
 165     setRelocationModel(Reloc::Static);
 166
 167   // Machine code emitter pass for ARM.
 168   PM.add(createARMObjectCodeEmitterPass(*this, OCE));
 169   return false;
 170 }
 171
 172 bool ARMBaseTargetMachine::addSimpleCodeEmitter(PassManagerBase &PM,
 173                                                 CodeGenOpt::Level OptLevel,
 174                                                 MachineCodeEmitter &MCE) {
 175   // Machine code emitter pass for ARM.
 176   PM.add(createARMCodeEmitterPass(*this, MCE));
 177   return false;
 178 }
 179
 180 bool ARMBaseTargetMachine::addSimpleCodeEmitter(PassManagerBase &PM,
 181                                                 CodeGenOpt::Level OptLevel,
 182                                                 JITCodeEmitter &JCE) {
 183   // Machine code emitter pass for ARM.
 184   PM.add(createARMJITCodeEmitterPass(*this, JCE));
 185   return false;
 186 }
 187
 188 bool ARMBaseTargetMachine::addSimpleCodeEmitter(PassManagerBase &PM,
 189                                             CodeGenOpt::Level OptLevel,
 190                                             ObjectCodeEmitter &OCE) {
 191   // Machine code emitter pass for ARM.
 192   PM.add(createARMObjectCodeEmitterPass(*this, OCE));
 193   return false;
 194 }
 195