1 //===-- ARMTargetMachine.cpp - Define TargetMachine for ARM ---------------===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
11 //===----------------------------------------------------------------------===//
13 #include "ARMTargetMachine.h"
14 #include "ARMMCAsmInfo.h"
15 #include "ARMFrameInfo.h"
17 #include "llvm/PassManager.h"
18 #include "llvm/CodeGen/Passes.h"
19 #include "llvm/Support/CommandLine.h"
20 #include "llvm/Support/FormattedStream.h"
21 #include "llvm/Target/TargetOptions.h"
22 #include "llvm/Target/TargetRegistry.h"
26 EarlyITBlockFormation("thumb2-early-it-blocks", cl::Hidden,
27 cl::desc("Form IT blocks early before register allocation"),
30 static MCAsmInfo *createMCAsmInfo(const Target &T, StringRef TT) {
32 switch (TheTriple.getOS()) {
34 return new ARMMCAsmInfoDarwin();
36 return new ARMELFMCAsmInfo();
41 extern "C" void LLVMInitializeARMTarget() {
42 // Register the target.
43 RegisterTargetMachine<ARMTargetMachine> X(TheARMTarget);
44 RegisterTargetMachine<ThumbTargetMachine> Y(TheThumbTarget);
46 // Register the target asm info.
47 RegisterAsmInfoFn A(TheARMTarget, createMCAsmInfo);
48 RegisterAsmInfoFn B(TheThumbTarget, createMCAsmInfo);
51 /// TargetMachine ctor - Create an ARM architecture model.
53 ARMBaseTargetMachine::ARMBaseTargetMachine(const Target &T,
54 const std::string &TT,
55 const std::string &FS,
57 : LLVMTargetMachine(T, TT),
58 Subtarget(TT, FS, isThumb),
61 InstrItins(Subtarget.getInstrItineraryData()) {
62 DefRelocModel = getRelocationModel();
65 ARMTargetMachine::ARMTargetMachine(const Target &T, const std::string &TT,
66 const std::string &FS)
67 : ARMBaseTargetMachine(T, TT, FS, false), InstrInfo(Subtarget),
68 DataLayout(Subtarget.isAPCS_ABI() ?
69 std::string("e-p:32:32-f64:32:32-i64:32:32-"
70 "v128:32:128-v64:32:64-n32") :
71 std::string("e-p:32:32-f64:64:64-i64:64:64-"
72 "v128:64:128-v64:64:64-n32")),
77 ThumbTargetMachine::ThumbTargetMachine(const Target &T, const std::string &TT,
78 const std::string &FS)
79 : ARMBaseTargetMachine(T, TT, FS, true),
80 InstrInfo(Subtarget.hasThumb2()
81 ? ((ARMBaseInstrInfo*)new Thumb2InstrInfo(Subtarget))
82 : ((ARMBaseInstrInfo*)new Thumb1InstrInfo(Subtarget))),
83 DataLayout(Subtarget.isAPCS_ABI() ?
84 std::string("e-p:32:32-f64:32:32-i64:32:32-"
85 "i16:16:32-i8:8:32-i1:8:32-"
86 "v128:32:128-v64:32:64-a:0:32-n32") :
87 std::string("e-p:32:32-f64:64:64-i64:64:64-"
88 "i16:16:32-i8:8:32-i1:8:32-"
89 "v128:64:128-v64:64:64-a:0:32-n32")),
96 // Pass Pipeline Configuration
97 bool ARMBaseTargetMachine::addInstSelector(PassManagerBase &PM,
98 CodeGenOpt::Level OptLevel) {
99 PM.add(createARMISelDag(*this, OptLevel));
103 bool ARMBaseTargetMachine::addPreRegAlloc(PassManagerBase &PM,
104 CodeGenOpt::Level OptLevel) {
105 if (Subtarget.hasNEON())
106 PM.add(createNEONPreAllocPass());
108 // FIXME: temporarily disabling load / store optimization pass for Thumb1.
109 if (OptLevel != CodeGenOpt::None && !Subtarget.isThumb1Only())
110 PM.add(createARMLoadStoreOptimizationPass(true));
112 if (Subtarget.isThumb2() && EarlyITBlockFormation)
113 PM.add(createThumb2ITBlockPass(true));
117 bool ARMBaseTargetMachine::addPreSched2(PassManagerBase &PM,
118 CodeGenOpt::Level OptLevel) {
119 // FIXME: temporarily disabling load / store optimization pass for Thumb1.
120 if (OptLevel != CodeGenOpt::None) {
121 if (!Subtarget.isThumb1Only())
122 PM.add(createARMLoadStoreOptimizationPass());
123 if (Subtarget.hasNEON())
124 PM.add(createNEONMoveFixPass());
127 // Expand some pseudo instructions into multiple instructions to allow
128 // proper scheduling.
129 PM.add(createARMExpandPseudoPass());
131 if (OptLevel != CodeGenOpt::None) {
132 if (!Subtarget.isThumb1Only())
133 PM.add(createIfConverterPass());
135 if (Subtarget.isThumb2())
136 PM.add(createThumb2ITBlockPass());
141 bool ARMBaseTargetMachine::addPreEmitPass(PassManagerBase &PM,
142 CodeGenOpt::Level OptLevel) {
143 if (Subtarget.isThumb2())
144 PM.add(createThumb2SizeReductionPass());
146 PM.add(createARMConstantIslandPass());
150 bool ARMBaseTargetMachine::addCodeEmitter(PassManagerBase &PM,
151 CodeGenOpt::Level OptLevel,
152 JITCodeEmitter &JCE) {
153 // FIXME: Move this to TargetJITInfo!
154 if (DefRelocModel == Reloc::Default)
155 setRelocationModel(Reloc::Static);
157 // Machine code emitter pass for ARM.
158 PM.add(createARMJITCodeEmitterPass(*this, JCE));