1 //===-- ARMTargetMachine.cpp - Define TargetMachine for ARM ---------------===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
11 //===----------------------------------------------------------------------===//
13 #include "ARMTargetMachine.h"
14 #include "ARMTargetAsmInfo.h"
15 #include "ARMFrameInfo.h"
17 #include "llvm/Module.h"
18 #include "llvm/PassManager.h"
19 #include "llvm/CodeGen/Passes.h"
20 #include "llvm/Support/CommandLine.h"
21 #include "llvm/Support/FormattedStream.h"
22 #include "llvm/Target/TargetMachineRegistry.h"
23 #include "llvm/Target/TargetOptions.h"
26 static cl::opt<bool> DisableLdStOpti("disable-arm-loadstore-opti", cl::Hidden,
27 cl::desc("Disable load store optimization pass"));
28 static cl::opt<bool> DisableIfConversion("disable-arm-if-conversion",cl::Hidden,
29 cl::desc("Disable if-conversion pass"));
31 /// ARMTargetMachineModule - Note that this is used on hosts that cannot link
32 /// in a library unless there are references into the library. In particular,
33 /// it seems that it is not possible to get things to work on Win32 without
34 /// this. Though it is unused, do not remove it.
35 extern "C" int ARMTargetMachineModule;
36 int ARMTargetMachineModule = 0;
38 // Register the target.
39 extern Target TheARMTarget;
40 static RegisterTarget<ARMTargetMachine> X(TheARMTarget, "arm", "ARM");
42 extern Target TheThumbTarget;
43 static RegisterTarget<ThumbTargetMachine> Y(TheThumbTarget, "thumb", "Thumb");
45 // Force static initialization.
46 extern "C" void LLVMInitializeARMTarget() { }
48 /// TargetMachine ctor - Create an ARM architecture model.
50 ARMBaseTargetMachine::ARMBaseTargetMachine(const Target &T,
52 const std::string &FS,
54 : LLVMTargetMachine(T),
55 Subtarget(M, FS, isThumb),
58 InstrItins(Subtarget.getInstrItineraryData()) {
59 DefRelocModel = getRelocationModel();
62 ARMTargetMachine::ARMTargetMachine(const Target &T, const Module &M,
63 const std::string &FS)
64 : ARMBaseTargetMachine(T, M, FS, false), InstrInfo(Subtarget),
65 DataLayout(Subtarget.isAPCS_ABI() ?
66 std::string("e-p:32:32-f64:32:32-i64:32:32") :
67 std::string("e-p:32:32-f64:64:64-i64:64:64")),
71 ThumbTargetMachine::ThumbTargetMachine(const Target &T, const Module &M,
72 const std::string &FS)
73 : ARMBaseTargetMachine(T, M, FS, true),
74 DataLayout(Subtarget.isAPCS_ABI() ?
75 std::string("e-p:32:32-f64:32:32-i64:32:32-"
76 "i16:16:32-i8:8:32-i1:8:32-a:0:32") :
77 std::string("e-p:32:32-f64:64:64-i64:64:64-"
78 "i16:16:32-i8:8:32-i1:8:32-a:0:32")),
80 // Create the approriate type of Thumb InstrInfo
81 if (Subtarget.hasThumb2())
82 InstrInfo = new Thumb2InstrInfo(Subtarget);
84 InstrInfo = new Thumb1InstrInfo(Subtarget);
88 const TargetAsmInfo *ARMBaseTargetMachine::createTargetAsmInfo() const {
89 switch (Subtarget.TargetType) {
90 case ARMSubtarget::isDarwin:
91 return new ARMDarwinTargetAsmInfo(*this);
92 case ARMSubtarget::isELF:
93 return new ARMELFTargetAsmInfo(*this);
95 return new ARMGenericTargetAsmInfo(*this);
100 // Pass Pipeline Configuration
101 bool ARMBaseTargetMachine::addInstSelector(PassManagerBase &PM,
102 CodeGenOpt::Level OptLevel) {
103 PM.add(createARMISelDag(*this));
107 bool ARMBaseTargetMachine::addPreRegAlloc(PassManagerBase &PM,
108 CodeGenOpt::Level OptLevel) {
109 // FIXME: temporarily disabling load / store optimization pass for Thumb mode.
110 if (OptLevel != CodeGenOpt::None && !DisableLdStOpti && !Subtarget.isThumb())
111 PM.add(createARMLoadStoreOptimizationPass(true));
115 bool ARMBaseTargetMachine::addPreEmitPass(PassManagerBase &PM,
116 CodeGenOpt::Level OptLevel) {
117 // FIXME: temporarily disabling load / store optimization pass for Thumb mode.
118 if (OptLevel != CodeGenOpt::None && !DisableLdStOpti && !Subtarget.isThumb())
119 PM.add(createARMLoadStoreOptimizationPass());
121 if (OptLevel != CodeGenOpt::None &&
122 !DisableIfConversion && !Subtarget.isThumb())
123 PM.add(createIfConverterPass());
125 if (Subtarget.isThumb2())
126 PM.add(createThumb2ITBlockPass());
128 PM.add(createARMConstantIslandPass());
132 bool ARMBaseTargetMachine::addAssemblyEmitter(PassManagerBase &PM,
133 CodeGenOpt::Level OptLevel,
135 formatted_raw_ostream &Out) {
136 FunctionPass *Printer = getTarget().createAsmPrinter(Out, *this, Verbose);
138 llvm_report_error("unable to create assembly printer");
144 bool ARMBaseTargetMachine::addCodeEmitter(PassManagerBase &PM,
145 CodeGenOpt::Level OptLevel,
146 MachineCodeEmitter &MCE) {
147 // FIXME: Move this to TargetJITInfo!
148 if (DefRelocModel == Reloc::Default)
149 setRelocationModel(Reloc::Static);
151 // Machine code emitter pass for ARM.
152 PM.add(createARMCodeEmitterPass(*this, MCE));
156 bool ARMBaseTargetMachine::addCodeEmitter(PassManagerBase &PM,
157 CodeGenOpt::Level OptLevel,
158 JITCodeEmitter &JCE) {
159 // FIXME: Move this to TargetJITInfo!
160 if (DefRelocModel == Reloc::Default)
161 setRelocationModel(Reloc::Static);
163 // Machine code emitter pass for ARM.
164 PM.add(createARMJITCodeEmitterPass(*this, JCE));
168 bool ARMBaseTargetMachine::addCodeEmitter(PassManagerBase &PM,
169 CodeGenOpt::Level OptLevel,
170 ObjectCodeEmitter &OCE) {
171 // FIXME: Move this to TargetJITInfo!
172 if (DefRelocModel == Reloc::Default)
173 setRelocationModel(Reloc::Static);
175 // Machine code emitter pass for ARM.
176 PM.add(createARMObjectCodeEmitterPass(*this, OCE));
180 bool ARMBaseTargetMachine::addSimpleCodeEmitter(PassManagerBase &PM,
181 CodeGenOpt::Level OptLevel,
182 MachineCodeEmitter &MCE) {
183 // Machine code emitter pass for ARM.
184 PM.add(createARMCodeEmitterPass(*this, MCE));
188 bool ARMBaseTargetMachine::addSimpleCodeEmitter(PassManagerBase &PM,
189 CodeGenOpt::Level OptLevel,
190 JITCodeEmitter &JCE) {
191 // Machine code emitter pass for ARM.
192 PM.add(createARMJITCodeEmitterPass(*this, JCE));
196 bool ARMBaseTargetMachine::addSimpleCodeEmitter(PassManagerBase &PM,
197 CodeGenOpt::Level OptLevel,
198 ObjectCodeEmitter &OCE) {
199 // Machine code emitter pass for ARM.
200 PM.add(createARMObjectCodeEmitterPass(*this, OCE));