1 //===-- ARMTargetMachine.cpp - Define TargetMachine for ARM ---------------===//
3 // The LLVM Compiler Infrastructure
5 // This file was developed by the "Instituto Nokia de Tecnologia" and
6 // is distributed under the University of Illinois Open Source
7 // License. See LICENSE.TXT for details.
9 //===----------------------------------------------------------------------===//
12 //===----------------------------------------------------------------------===//
14 #include "ARMTargetMachine.h"
16 #include "llvm/Assembly/PrintModulePass.h"
17 #include "llvm/Module.h"
18 #include "llvm/PassManager.h"
19 #include "llvm/CodeGen/MachineFunction.h"
20 #include "llvm/CodeGen/Passes.h"
21 #include "llvm/Target/TargetOptions.h"
22 #include "llvm/Target/TargetMachineRegistry.h"
23 #include "llvm/Transforms/Scalar.h"
28 // Register the target.
29 RegisterTarget<ARMTargetMachine> X("arm", " ARM");
32 /// TargetMachine ctor - Create an ILP32 architecture model
34 ARMTargetMachine::ARMTargetMachine(const Module &M, const std::string &FS)
35 : TargetMachine("ARM"),
36 DataLayout(std::string("ARM"), std::string("E-p:32:32")),
38 FrameInfo(TargetFrameInfo::StackGrowsDown, 8, 0) {
41 unsigned ARMTargetMachine::getModuleMatchQuality(const Module &M) {
42 std::string TT = M.getTargetTriple();
43 if (TT.size() >= 4 && std::string(TT.begin(), TT.begin()+4) == "arm-")
46 if (M.getPointerSize() == Module::Pointer32)
52 /// addPassesToEmitFile - Add passes to the specified pass manager
53 /// to implement a static compiler for this target.
55 bool ARMTargetMachine::addPassesToEmitFile(PassManager &PM, std::ostream &Out,
56 CodeGenFileType FileType,
58 if (FileType != TargetMachine::AssemblyFile)
61 // Run loop strength reduction before anything else.
63 PM.add(createLoopStrengthReducePass());
65 // FIXME: Implement efficient support for garbage collection intrinsics.
66 PM.add(createLowerGCPass());
68 // FIXME: implement the invoke/unwind instructions!
69 PM.add(createLowerInvokePass());
71 // Print LLVM code input to instruction selector:
73 PM.add(new PrintFunctionPass());
75 // Make sure that no unreachable blocks are instruction selected.
76 PM.add(createUnreachableBlockEliminationPass());
78 PM.add(createARMISelDag(*this));
80 // Print machine instructions as they were initially generated.
82 PM.add(createMachineFunctionPrinterPass(&std::cerr));
84 PM.add(createRegisterAllocator());
85 PM.add(createPrologEpilogCodeInserter());
87 // Print machine instructions after register allocation and prolog/epilog
90 PM.add(createMachineFunctionPrinterPass(&std::cerr));
92 // Output assembly language.
93 PM.add(createARMCodePrinterPass(Out, *this));
95 // Delete the MachineInstrs we generated, since they're no longer needed.
96 PM.add(createMachineCodeDeleter());