1 //===-- ARMTargetMachine.h - Define TargetMachine for ARM -------*- C++ -*-===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file declares the ARM specific subclass of TargetMachine.
12 //===----------------------------------------------------------------------===//
14 #ifndef ARMTARGETMACHINE_H
15 #define ARMTARGETMACHINE_H
17 #include "llvm/Target/TargetMachine.h"
18 #include "llvm/Target/TargetData.h"
19 #include "ARMInstrInfo.h"
20 #include "ARMFrameInfo.h"
21 #include "ARMJITInfo.h"
22 #include "ARMSubtarget.h"
23 #include "ARMISelLowering.h"
24 #include "Thumb1InstrInfo.h"
25 #include "Thumb2InstrInfo.h"
31 class ARMBaseTargetMachine : public LLVMTargetMachine {
33 ARMSubtarget Subtarget;
36 ARMFrameInfo FrameInfo;
38 InstrItineraryData InstrItins;
39 Reloc::Model DefRelocModel; // Reloc model before it's overridden.
42 // To avoid having target depend on the asmprinter stuff libraries, asmprinter
43 // set this functions to ctor pointer at startup time if they are linked in.
44 typedef FunctionPass *(*AsmPrinterCtorFn)(formatted_raw_ostream &o,
45 ARMBaseTargetMachine &tm,
47 static AsmPrinterCtorFn AsmPrinterCtor;
50 ARMBaseTargetMachine(const Module &M, const std::string &FS, bool isThumb);
52 virtual const ARMFrameInfo *getFrameInfo() const { return &FrameInfo; }
53 virtual ARMJITInfo *getJITInfo() { return &JITInfo; }
54 virtual const ARMSubtarget *getSubtargetImpl() const { return &Subtarget; }
55 virtual const InstrItineraryData getInstrItineraryData() const {
59 static void registerAsmPrinter(AsmPrinterCtorFn F) {
63 static unsigned getModuleMatchQuality(const Module &M);
64 static unsigned getJITMatchQuality();
66 virtual const TargetAsmInfo *createTargetAsmInfo() const;
68 // Pass Pipeline Configuration
69 virtual bool addInstSelector(PassManagerBase &PM, CodeGenOpt::Level OptLevel);
70 virtual bool addPreRegAlloc(PassManagerBase &PM, CodeGenOpt::Level OptLevel);
71 virtual bool addPreEmitPass(PassManagerBase &PM, CodeGenOpt::Level OptLevel);
72 virtual bool addAssemblyEmitter(PassManagerBase &PM,
73 CodeGenOpt::Level OptLevel,
74 bool Verbose, formatted_raw_ostream &Out);
75 virtual bool addCodeEmitter(PassManagerBase &PM, CodeGenOpt::Level OptLevel,
76 bool DumpAsm, MachineCodeEmitter &MCE);
77 virtual bool addCodeEmitter(PassManagerBase &PM, CodeGenOpt::Level OptLevel,
78 bool DumpAsm, JITCodeEmitter &MCE);
79 virtual bool addCodeEmitter(PassManagerBase &PM, CodeGenOpt::Level OptLevel,
80 bool DumpAsm, ObjectCodeEmitter &OCE);
81 virtual bool addSimpleCodeEmitter(PassManagerBase &PM,
82 CodeGenOpt::Level OptLevel,
84 MachineCodeEmitter &MCE);
85 virtual bool addSimpleCodeEmitter(PassManagerBase &PM,
86 CodeGenOpt::Level OptLevel,
89 virtual bool addSimpleCodeEmitter(PassManagerBase &PM,
90 CodeGenOpt::Level OptLevel,
92 ObjectCodeEmitter &OCE);
95 /// ARMTargetMachine - ARM target machine.
97 class ARMTargetMachine : public ARMBaseTargetMachine {
98 ARMInstrInfo InstrInfo;
99 const TargetData DataLayout; // Calculates type size & alignment
100 ARMTargetLowering TLInfo;
102 ARMTargetMachine(const Module &M, const std::string &FS);
104 virtual const ARMRegisterInfo *getRegisterInfo() const {
105 return &InstrInfo.getRegisterInfo();
108 virtual ARMTargetLowering *getTargetLowering() const {
109 return const_cast<ARMTargetLowering*>(&TLInfo);
112 virtual const ARMInstrInfo *getInstrInfo() const { return &InstrInfo; }
113 virtual const TargetData *getTargetData() const { return &DataLayout; }
115 static unsigned getJITMatchQuality();
116 static unsigned getModuleMatchQuality(const Module &M);
119 /// ThumbTargetMachine - Thumb target machine.
120 /// Due to the way architectures are handled, this represents both
121 /// Thumb-1 and Thumb-2.
123 class ThumbTargetMachine : public ARMBaseTargetMachine {
124 ARMBaseInstrInfo *InstrInfo; // either Thumb1InstrInfo or Thumb2InstrInfo
125 const TargetData DataLayout; // Calculates type size & alignment
126 ARMTargetLowering TLInfo;
128 ThumbTargetMachine(const Module &M, const std::string &FS);
130 /// returns either Thumb1RegisterInfo of Thumb2RegisterInfo
131 virtual const ARMBaseRegisterInfo *getRegisterInfo() const {
132 return &InstrInfo->getRegisterInfo();
135 virtual ARMTargetLowering *getTargetLowering() const {
136 return const_cast<ARMTargetLowering*>(&TLInfo);
139 /// returns either Thumb1InstrInfo or Thumb2InstrInfo
140 virtual const ARMBaseInstrInfo *getInstrInfo() const { return InstrInfo; }
141 virtual const TargetData *getTargetData() const { return &DataLayout; }
143 static unsigned getJITMatchQuality();
144 static unsigned getModuleMatchQuality(const Module &M);
147 } // end namespace llvm