1 //===-- ARMTargetMachine.h - Define TargetMachine for ARM -------*- C++ -*-===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file declares the ARM specific subclass of TargetMachine.
12 //===----------------------------------------------------------------------===//
14 #ifndef ARMTARGETMACHINE_H
15 #define ARMTARGETMACHINE_H
17 #include "ARMInstrInfo.h"
18 #include "ARMELFWriterInfo.h"
19 #include "ARMFrameLowering.h"
20 #include "ARMJITInfo.h"
21 #include "ARMSubtarget.h"
22 #include "ARMISelLowering.h"
23 #include "ARMSelectionDAGInfo.h"
24 #include "Thumb1InstrInfo.h"
25 #include "Thumb1FrameLowering.h"
26 #include "Thumb2InstrInfo.h"
27 #include "llvm/Target/TargetMachine.h"
28 #include "llvm/Target/TargetData.h"
29 #include "llvm/MC/MCStreamer.h"
30 #include "llvm/ADT/OwningPtr.h"
34 class ARMBaseTargetMachine : public LLVMTargetMachine {
36 ARMSubtarget Subtarget;
39 InstrItineraryData InstrItins;
42 ARMBaseTargetMachine(const Target &T, StringRef TT,
43 StringRef CPU, StringRef FS,
44 const TargetOptions &Options,
45 Reloc::Model RM, CodeModel::Model CM,
46 CodeGenOpt::Level OL);
48 virtual ARMJITInfo *getJITInfo() { return &JITInfo; }
49 virtual const ARMSubtarget *getSubtargetImpl() const { return &Subtarget; }
50 virtual const InstrItineraryData *getInstrItineraryData() const {
54 // Pass Pipeline Configuration
55 virtual bool addPreISel(PassManagerBase &PM);
56 virtual bool addInstSelector(PassManagerBase &PM);
57 virtual bool addPreRegAlloc(PassManagerBase &PM);
58 virtual bool addPreSched2(PassManagerBase &PM);
59 virtual bool addPreEmitPass(PassManagerBase &PM);
60 virtual bool addCodeEmitter(PassManagerBase &PM, JITCodeEmitter &MCE);
63 /// ARMTargetMachine - ARM target machine.
65 class ARMTargetMachine : public ARMBaseTargetMachine {
66 virtual void anchor();
67 ARMInstrInfo InstrInfo;
68 const TargetData DataLayout; // Calculates type size & alignment
69 ARMELFWriterInfo ELFWriterInfo;
70 ARMTargetLowering TLInfo;
71 ARMSelectionDAGInfo TSInfo;
72 ARMFrameLowering FrameLowering;
74 ARMTargetMachine(const Target &T, StringRef TT,
75 StringRef CPU, StringRef FS,
76 const TargetOptions &Options,
77 Reloc::Model RM, CodeModel::Model CM,
78 CodeGenOpt::Level OL);
80 virtual const ARMRegisterInfo *getRegisterInfo() const {
81 return &InstrInfo.getRegisterInfo();
84 virtual const ARMTargetLowering *getTargetLowering() const {
88 virtual const ARMSelectionDAGInfo* getSelectionDAGInfo() const {
91 virtual const ARMFrameLowering *getFrameLowering() const {
92 return &FrameLowering;
95 virtual const ARMInstrInfo *getInstrInfo() const { return &InstrInfo; }
96 virtual const TargetData *getTargetData() const { return &DataLayout; }
97 virtual const ARMELFWriterInfo *getELFWriterInfo() const {
98 return Subtarget.isTargetELF() ? &ELFWriterInfo : 0;
102 /// ThumbTargetMachine - Thumb target machine.
103 /// Due to the way architectures are handled, this represents both
104 /// Thumb-1 and Thumb-2.
106 class ThumbTargetMachine : public ARMBaseTargetMachine {
107 virtual void anchor();
108 // Either Thumb1InstrInfo or Thumb2InstrInfo.
109 OwningPtr<ARMBaseInstrInfo> InstrInfo;
110 const TargetData DataLayout; // Calculates type size & alignment
111 ARMELFWriterInfo ELFWriterInfo;
112 ARMTargetLowering TLInfo;
113 ARMSelectionDAGInfo TSInfo;
114 // Either Thumb1FrameLowering or ARMFrameLowering.
115 OwningPtr<ARMFrameLowering> FrameLowering;
117 ThumbTargetMachine(const Target &T, StringRef TT,
118 StringRef CPU, StringRef FS,
119 const TargetOptions &Options,
120 Reloc::Model RM, CodeModel::Model CM,
121 CodeGenOpt::Level OL);
123 /// returns either Thumb1RegisterInfo or Thumb2RegisterInfo
124 virtual const ARMBaseRegisterInfo *getRegisterInfo() const {
125 return &InstrInfo->getRegisterInfo();
128 virtual const ARMTargetLowering *getTargetLowering() const {
132 virtual const ARMSelectionDAGInfo *getSelectionDAGInfo() const {
136 /// returns either Thumb1InstrInfo or Thumb2InstrInfo
137 virtual const ARMBaseInstrInfo *getInstrInfo() const {
138 return InstrInfo.get();
140 /// returns either Thumb1FrameLowering or ARMFrameLowering
141 virtual const ARMFrameLowering *getFrameLowering() const {
142 return FrameLowering.get();
144 virtual const TargetData *getTargetData() const { return &DataLayout; }
145 virtual const ARMELFWriterInfo *getELFWriterInfo() const {
146 return Subtarget.isTargetELF() ? &ELFWriterInfo : 0;
150 } // end namespace llvm