1 //===-- ARMAsmPrinter.cpp - ARM LLVM assembly writer ----------------------===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file contains a printer that converts from our internal representation
11 // of machine-dependent LLVM code to GAS-format ARM assembly language.
13 //===----------------------------------------------------------------------===//
15 #define DEBUG_TYPE "asm-printer"
17 #include "ARMBuildAttrs.h"
18 #include "ARMTargetMachine.h"
19 #include "ARMAddressingModes.h"
20 #include "ARMConstantPoolValue.h"
21 #include "ARMMachineFunctionInfo.h"
22 #include "llvm/Constants.h"
23 #include "llvm/Module.h"
24 #include "llvm/Metadata.h"
25 #include "llvm/CodeGen/AsmPrinter.h"
26 #include "llvm/CodeGen/DwarfWriter.h"
27 #include "llvm/CodeGen/MachineModuleInfo.h"
28 #include "llvm/CodeGen/MachineFunctionPass.h"
29 #include "llvm/CodeGen/MachineJumpTableInfo.h"
30 #include "llvm/MC/MCSection.h"
31 #include "llvm/Target/TargetAsmInfo.h"
32 #include "llvm/Target/TargetData.h"
33 #include "llvm/Target/TargetLoweringObjectFile.h"
34 #include "llvm/Target/TargetMachine.h"
35 #include "llvm/Target/TargetOptions.h"
36 #include "llvm/Target/TargetRegistry.h"
37 #include "llvm/ADT/SmallPtrSet.h"
38 #include "llvm/ADT/Statistic.h"
39 #include "llvm/ADT/StringSet.h"
40 #include "llvm/Support/Compiler.h"
41 #include "llvm/Support/ErrorHandling.h"
42 #include "llvm/Support/Mangler.h"
43 #include "llvm/Support/MathExtras.h"
44 #include "llvm/Support/FormattedStream.h"
48 STATISTIC(EmittedInsts, "Number of machine instrs printed");
51 class VISIBILITY_HIDDEN ARMAsmPrinter : public AsmPrinter {
54 /// Subtarget - Keep a pointer to the ARMSubtarget around so that we can
55 /// make the right decision when printing asm code for different targets.
56 const ARMSubtarget *Subtarget;
58 /// AFI - Keep a pointer to ARMFunctionInfo for the current
62 /// MCP - Keep a pointer to constantpool entries of the current
64 const MachineConstantPool *MCP;
66 /// We name each basic block in a Function with a unique number, so
67 /// that we can consistently refer to them later. This is cleared
68 /// at the beginning of each call to runOnMachineFunction().
70 typedef std::map<const Value *, unsigned> ValueMapTy;
71 ValueMapTy NumberForBB;
73 /// GVNonLazyPtrs - Keeps the set of GlobalValues that require
74 /// non-lazy-pointers for indirect access.
75 StringMap<std::string> GVNonLazyPtrs;
77 /// HiddenGVNonLazyPtrs - Keeps the set of GlobalValues with hidden
78 /// visibility that require non-lazy-pointers for indirect access.
79 StringMap<std::string> HiddenGVNonLazyPtrs;
82 std::string Stub, LazyPtr, SLP, SCV;
86 void Init(const GlobalValue *GV, Mangler *Mang) {
87 // Already initialized.
88 if (!Stub.empty()) return;
89 Stub = Mang->getMangledName(GV, "$stub", true);
90 LazyPtr = Mang->getMangledName(GV, "$lazy_ptr", true);
91 SLP = Mang->getMangledName(GV, "$slp", true);
92 SCV = Mang->getMangledName(GV, "$scv", true);
95 void Init(const std::string &GV, Mangler *Mang) {
96 // Already initialized.
97 if (!Stub.empty()) return;
98 Stub = Mang->makeNameProper(GV + "$stub", Mangler::Private);
99 LazyPtr = Mang->makeNameProper(GV + "$lazy_ptr", Mangler::Private);
100 SLP = Mang->makeNameProper(GV + "$slp", Mangler::Private);
101 SCV = Mang->makeNameProper(GV + "$scv", Mangler::Private);
105 /// FnStubs - Keeps the set of external function GlobalAddresses that the
106 /// asm printer should generate stubs for.
107 StringMap<FnStubInfo> FnStubs;
109 /// True if asm printer is printing a series of CONSTPOOL_ENTRY.
112 explicit ARMAsmPrinter(formatted_raw_ostream &O, TargetMachine &TM,
113 const TargetAsmInfo *T, bool V)
114 : AsmPrinter(O, TM, T, V), DW(0), AFI(NULL), MCP(NULL),
116 Subtarget = &TM.getSubtarget<ARMSubtarget>();
119 virtual const char *getPassName() const {
120 return "ARM Assembly Printer";
123 void printOperand(const MachineInstr *MI, int OpNum,
124 const char *Modifier = 0);
125 void printSOImmOperand(const MachineInstr *MI, int OpNum);
126 void printSOImm2PartOperand(const MachineInstr *MI, int OpNum);
127 void printSORegOperand(const MachineInstr *MI, int OpNum);
128 void printAddrMode2Operand(const MachineInstr *MI, int OpNum);
129 void printAddrMode2OffsetOperand(const MachineInstr *MI, int OpNum);
130 void printAddrMode3Operand(const MachineInstr *MI, int OpNum);
131 void printAddrMode3OffsetOperand(const MachineInstr *MI, int OpNum);
132 void printAddrMode4Operand(const MachineInstr *MI, int OpNum,
133 const char *Modifier = 0);
134 void printAddrMode5Operand(const MachineInstr *MI, int OpNum,
135 const char *Modifier = 0);
136 void printAddrMode6Operand(const MachineInstr *MI, int OpNum);
137 void printAddrModePCOperand(const MachineInstr *MI, int OpNum,
138 const char *Modifier = 0);
139 void printBitfieldInvMaskImmOperand (const MachineInstr *MI, int OpNum);
141 void printThumbITMask(const MachineInstr *MI, int OpNum);
142 void printThumbAddrModeRROperand(const MachineInstr *MI, int OpNum);
143 void printThumbAddrModeRI5Operand(const MachineInstr *MI, int OpNum,
145 void printThumbAddrModeS1Operand(const MachineInstr *MI, int OpNum);
146 void printThumbAddrModeS2Operand(const MachineInstr *MI, int OpNum);
147 void printThumbAddrModeS4Operand(const MachineInstr *MI, int OpNum);
148 void printThumbAddrModeSPOperand(const MachineInstr *MI, int OpNum);
150 void printT2SOOperand(const MachineInstr *MI, int OpNum);
151 void printT2AddrModeImm12Operand(const MachineInstr *MI, int OpNum);
152 void printT2AddrModeImm8Operand(const MachineInstr *MI, int OpNum);
153 void printT2AddrModeImm8s4Operand(const MachineInstr *MI, int OpNum);
154 void printT2AddrModeImm8OffsetOperand(const MachineInstr *MI, int OpNum);
155 void printT2AddrModeSoRegOperand(const MachineInstr *MI, int OpNum);
157 void printPredicateOperand(const MachineInstr *MI, int OpNum);
158 void printSBitModifierOperand(const MachineInstr *MI, int OpNum);
159 void printPCLabel(const MachineInstr *MI, int OpNum);
160 void printRegisterList(const MachineInstr *MI, int OpNum);
161 void printCPInstOperand(const MachineInstr *MI, int OpNum,
162 const char *Modifier);
163 void printJTBlockOperand(const MachineInstr *MI, int OpNum);
164 void printJT2BlockOperand(const MachineInstr *MI, int OpNum);
165 void printTBAddrMode(const MachineInstr *MI, int OpNum);
167 virtual bool PrintAsmOperand(const MachineInstr *MI, unsigned OpNum,
168 unsigned AsmVariant, const char *ExtraCode);
169 virtual bool PrintAsmMemoryOperand(const MachineInstr *MI, unsigned OpNum,
171 const char *ExtraCode);
173 void PrintGlobalVariable(const GlobalVariable* GVar);
174 bool printInstruction(const MachineInstr *MI); // autogenerated.
175 void printMachineInstruction(const MachineInstr *MI);
176 bool runOnMachineFunction(MachineFunction &F);
177 bool doInitialization(Module &M);
178 bool doFinalization(Module &M);
180 /// EmitMachineConstantPoolValue - Print a machine constantpool value to
182 virtual void EmitMachineConstantPoolValue(MachineConstantPoolValue *MCPV) {
183 printDataDirective(MCPV->getType());
185 ARMConstantPoolValue *ACPV = static_cast<ARMConstantPoolValue*>(MCPV);
186 GlobalValue *GV = ACPV->getGV();
190 if (ACPV->isNonLazyPointer()) {
191 std::string SymName = Mang->getMangledName(GV);
192 Name = Mang->getMangledName(GV, "$non_lazy_ptr", true);
194 if (GV->hasHiddenVisibility())
195 HiddenGVNonLazyPtrs[SymName] = Name;
197 GVNonLazyPtrs[SymName] = Name;
198 } else if (ACPV->isStub()) {
200 FnStubInfo &FnInfo = FnStubs[Mang->getMangledName(GV)];
201 FnInfo.Init(GV, Mang);
204 FnStubInfo &FnInfo = FnStubs[Mang->makeNameProper(ACPV->getSymbol())];
205 FnInfo.Init(ACPV->getSymbol(), Mang);
210 Name = Mang->getMangledName(GV);
212 Name = Mang->makeNameProper(ACPV->getSymbol());
218 if (ACPV->hasModifier()) O << "(" << ACPV->getModifier() << ")";
219 if (ACPV->getPCAdjustment() != 0) {
220 O << "-(" << TAI->getPrivateGlobalPrefix() << "PC"
221 << ACPV->getLabelId()
222 << "+" << (unsigned)ACPV->getPCAdjustment();
223 if (ACPV->mustAddCurrentAddress())
230 void getAnalysisUsage(AnalysisUsage &AU) const {
231 AsmPrinter::getAnalysisUsage(AU);
232 AU.setPreservesAll();
233 AU.addRequired<MachineModuleInfo>();
234 AU.addRequired<DwarfWriter>();
237 } // end of anonymous namespace
239 #include "ARMGenAsmWriter.inc"
241 /// runOnMachineFunction - This uses the printInstruction()
242 /// method to print assembly for each instruction.
244 bool ARMAsmPrinter::runOnMachineFunction(MachineFunction &MF) {
247 AFI = MF.getInfo<ARMFunctionInfo>();
248 MCP = MF.getConstantPool();
250 SetupMachineFunction(MF);
253 // NOTE: we don't print out constant pools here, they are handled as
258 // Print out labels for the function.
259 const Function *F = MF.getFunction();
260 SwitchToSection(getObjFileLowering().SectionForGlobal(F, Mang, TM));
262 switch (F->getLinkage()) {
263 default: llvm_unreachable("Unknown linkage type!");
264 case Function::PrivateLinkage:
265 case Function::LinkerPrivateLinkage:
266 case Function::InternalLinkage:
268 case Function::ExternalLinkage:
269 O << "\t.globl\t" << CurrentFnName << "\n";
271 case Function::WeakAnyLinkage:
272 case Function::WeakODRLinkage:
273 case Function::LinkOnceAnyLinkage:
274 case Function::LinkOnceODRLinkage:
275 if (Subtarget->isTargetDarwin()) {
276 O << "\t.globl\t" << CurrentFnName << "\n";
277 O << "\t.weak_definition\t" << CurrentFnName << "\n";
279 O << TAI->getWeakRefDirective() << CurrentFnName << "\n";
284 printVisibility(CurrentFnName, F->getVisibility());
286 if (AFI->isThumbFunction()) {
287 EmitAlignment(MF.getAlignment(), F, AFI->getAlign());
288 O << "\t.code\t16\n";
289 O << "\t.thumb_func";
290 if (Subtarget->isTargetDarwin())
291 O << "\t" << CurrentFnName;
295 EmitAlignment(MF.getAlignment(), F);
298 O << CurrentFnName << ":\n";
299 // Emit pre-function debug information.
300 DW->BeginFunction(&MF);
302 if (Subtarget->isTargetDarwin()) {
303 // If the function is empty, then we need to emit *something*. Otherwise,
304 // the function's label might be associated with something that it wasn't
305 // meant to be associated with. We emit a noop in this situation.
306 MachineFunction::iterator I = MF.begin();
308 if (++I == MF.end() && MF.front().empty())
312 // Print out code for the function.
313 for (MachineFunction::const_iterator I = MF.begin(), E = MF.end();
315 // Print a label for the basic block.
316 if (I != MF.begin()) {
317 printBasicBlockLabel(I, true, true, VerboseAsm);
320 for (MachineBasicBlock::const_iterator II = I->begin(), E = I->end();
322 // Print the assembly for the instruction.
323 printMachineInstruction(II);
327 if (TAI->hasDotTypeDotSizeDirective())
328 O << "\t.size " << CurrentFnName << ", .-" << CurrentFnName << "\n";
330 // Emit post-function debug information.
331 DW->EndFunction(&MF);
338 void ARMAsmPrinter::printOperand(const MachineInstr *MI, int OpNum,
339 const char *Modifier) {
340 const MachineOperand &MO = MI->getOperand(OpNum);
341 switch (MO.getType()) {
342 case MachineOperand::MO_Register: {
343 unsigned Reg = MO.getReg();
344 if (TargetRegisterInfo::isPhysicalRegister(Reg)) {
345 if (Modifier && strcmp(Modifier, "dregpair") == 0) {
346 unsigned DRegLo = TRI->getSubReg(Reg, 5); // arm_dsubreg_0
347 unsigned DRegHi = TRI->getSubReg(Reg, 6); // arm_dsubreg_1
349 << TRI->getAsmName(DRegLo) << ',' << TRI->getAsmName(DRegHi)
351 } else if (Modifier && strcmp(Modifier, "dregsingle") == 0) {
352 O << '{' << TRI->getAsmName(Reg) << '}';
354 O << TRI->getAsmName(Reg);
357 llvm_unreachable("not implemented");
360 case MachineOperand::MO_Immediate: {
361 if (!Modifier || strcmp(Modifier, "no_hash") != 0)
367 case MachineOperand::MO_MachineBasicBlock:
368 printBasicBlockLabel(MO.getMBB());
370 case MachineOperand::MO_GlobalAddress: {
371 bool isCallOp = Modifier && !strcmp(Modifier, "call");
372 GlobalValue *GV = MO.getGlobal();
374 bool isExt = GV->isDeclaration() || GV->isWeakForLinker();
375 if (isExt && isCallOp && Subtarget->isTargetDarwin() &&
376 TM.getRelocationModel() != Reloc::Static) {
377 FnStubInfo &FnInfo = FnStubs[Mang->getMangledName(GV)];
378 FnInfo.Init(GV, Mang);
381 Name = Mang->getMangledName(GV);
386 printOffset(MO.getOffset());
388 if (isCallOp && Subtarget->isTargetELF() &&
389 TM.getRelocationModel() == Reloc::PIC_)
393 case MachineOperand::MO_ExternalSymbol: {
394 bool isCallOp = Modifier && !strcmp(Modifier, "call");
396 if (isCallOp && Subtarget->isTargetDarwin() &&
397 TM.getRelocationModel() != Reloc::Static) {
398 FnStubInfo &FnInfo = FnStubs[Mang->makeNameProper(MO.getSymbolName())];
399 FnInfo.Init(MO.getSymbolName(), Mang);
402 Name = Mang->makeNameProper(MO.getSymbolName());
405 if (isCallOp && Subtarget->isTargetELF() &&
406 TM.getRelocationModel() == Reloc::PIC_)
410 case MachineOperand::MO_ConstantPoolIndex:
411 O << TAI->getPrivateGlobalPrefix() << "CPI" << getFunctionNumber()
412 << '_' << MO.getIndex();
414 case MachineOperand::MO_JumpTableIndex:
415 O << TAI->getPrivateGlobalPrefix() << "JTI" << getFunctionNumber()
416 << '_' << MO.getIndex();
419 O << "<unknown operand type>"; abort (); break;
423 static void printSOImm(formatted_raw_ostream &O, int64_t V, bool VerboseAsm,
424 const TargetAsmInfo *TAI) {
425 // Break it up into two parts that make up a shifter immediate.
426 V = ARM_AM::getSOImmVal(V);
427 assert(V != -1 && "Not a valid so_imm value!");
429 unsigned Imm = ARM_AM::getSOImmValImm(V);
430 unsigned Rot = ARM_AM::getSOImmValRot(V);
432 // Print low-level immediate formation info, per
433 // A5.1.3: "Data-processing operands - Immediate".
435 O << "#" << Imm << ", " << Rot;
436 // Pretty printed version.
438 O << ' ' << TAI->getCommentString()
439 << ' ' << (int)ARM_AM::rotr32(Imm, Rot);
445 /// printSOImmOperand - SOImm is 4-bit rotate amount in bits 8-11 with 8-bit
446 /// immediate in bits 0-7.
447 void ARMAsmPrinter::printSOImmOperand(const MachineInstr *MI, int OpNum) {
448 const MachineOperand &MO = MI->getOperand(OpNum);
449 assert(MO.isImm() && "Not a valid so_imm value!");
450 printSOImm(O, MO.getImm(), VerboseAsm, TAI);
453 /// printSOImm2PartOperand - SOImm is broken into two pieces using a 'mov'
454 /// followed by an 'orr' to materialize.
455 void ARMAsmPrinter::printSOImm2PartOperand(const MachineInstr *MI, int OpNum) {
456 const MachineOperand &MO = MI->getOperand(OpNum);
457 assert(MO.isImm() && "Not a valid so_imm value!");
458 unsigned V1 = ARM_AM::getSOImmTwoPartFirst(MO.getImm());
459 unsigned V2 = ARM_AM::getSOImmTwoPartSecond(MO.getImm());
460 printSOImm(O, V1, VerboseAsm, TAI);
462 printPredicateOperand(MI, 2);
468 printSOImm(O, V2, VerboseAsm, TAI);
471 // so_reg is a 4-operand unit corresponding to register forms of the A5.1
472 // "Addressing Mode 1 - Data-processing operands" forms. This includes:
474 // REG REG 0,SH_OPC - e.g. R5, ROR R3
475 // REG 0 IMM,SH_OPC - e.g. R5, LSL #3
476 void ARMAsmPrinter::printSORegOperand(const MachineInstr *MI, int Op) {
477 const MachineOperand &MO1 = MI->getOperand(Op);
478 const MachineOperand &MO2 = MI->getOperand(Op+1);
479 const MachineOperand &MO3 = MI->getOperand(Op+2);
481 assert(TargetRegisterInfo::isPhysicalRegister(MO1.getReg()));
482 O << TRI->getAsmName(MO1.getReg());
484 // Print the shift opc.
486 << ARM_AM::getShiftOpcStr(ARM_AM::getSORegShOp(MO3.getImm()))
490 assert(TargetRegisterInfo::isPhysicalRegister(MO2.getReg()));
491 O << TRI->getAsmName(MO2.getReg());
492 assert(ARM_AM::getSORegOffset(MO3.getImm()) == 0);
494 O << "#" << ARM_AM::getSORegOffset(MO3.getImm());
498 void ARMAsmPrinter::printAddrMode2Operand(const MachineInstr *MI, int Op) {
499 const MachineOperand &MO1 = MI->getOperand(Op);
500 const MachineOperand &MO2 = MI->getOperand(Op+1);
501 const MachineOperand &MO3 = MI->getOperand(Op+2);
503 if (!MO1.isReg()) { // FIXME: This is for CP entries, but isn't right.
504 printOperand(MI, Op);
508 O << "[" << TRI->getAsmName(MO1.getReg());
511 if (ARM_AM::getAM2Offset(MO3.getImm())) // Don't print +0.
513 << (char)ARM_AM::getAM2Op(MO3.getImm())
514 << ARM_AM::getAM2Offset(MO3.getImm());
520 << (char)ARM_AM::getAM2Op(MO3.getImm())
521 << TRI->getAsmName(MO2.getReg());
523 if (unsigned ShImm = ARM_AM::getAM2Offset(MO3.getImm()))
525 << ARM_AM::getShiftOpcStr(ARM_AM::getAM2ShiftOpc(MO3.getImm()))
530 void ARMAsmPrinter::printAddrMode2OffsetOperand(const MachineInstr *MI, int Op){
531 const MachineOperand &MO1 = MI->getOperand(Op);
532 const MachineOperand &MO2 = MI->getOperand(Op+1);
535 unsigned ImmOffs = ARM_AM::getAM2Offset(MO2.getImm());
536 assert(ImmOffs && "Malformed indexed load / store!");
538 << (char)ARM_AM::getAM2Op(MO2.getImm())
543 O << (char)ARM_AM::getAM2Op(MO2.getImm())
544 << TRI->getAsmName(MO1.getReg());
546 if (unsigned ShImm = ARM_AM::getAM2Offset(MO2.getImm()))
548 << ARM_AM::getShiftOpcStr(ARM_AM::getAM2ShiftOpc(MO2.getImm()))
552 void ARMAsmPrinter::printAddrMode3Operand(const MachineInstr *MI, int Op) {
553 const MachineOperand &MO1 = MI->getOperand(Op);
554 const MachineOperand &MO2 = MI->getOperand(Op+1);
555 const MachineOperand &MO3 = MI->getOperand(Op+2);
557 assert(TargetRegisterInfo::isPhysicalRegister(MO1.getReg()));
558 O << "[" << TRI->getAsmName(MO1.getReg());
562 << (char)ARM_AM::getAM3Op(MO3.getImm())
563 << TRI->getAsmName(MO2.getReg())
568 if (unsigned ImmOffs = ARM_AM::getAM3Offset(MO3.getImm()))
570 << (char)ARM_AM::getAM3Op(MO3.getImm())
575 void ARMAsmPrinter::printAddrMode3OffsetOperand(const MachineInstr *MI, int Op){
576 const MachineOperand &MO1 = MI->getOperand(Op);
577 const MachineOperand &MO2 = MI->getOperand(Op+1);
580 O << (char)ARM_AM::getAM3Op(MO2.getImm())
581 << TRI->getAsmName(MO1.getReg());
585 unsigned ImmOffs = ARM_AM::getAM3Offset(MO2.getImm());
586 assert(ImmOffs && "Malformed indexed load / store!");
588 << (char)ARM_AM::getAM3Op(MO2.getImm())
592 void ARMAsmPrinter::printAddrMode4Operand(const MachineInstr *MI, int Op,
593 const char *Modifier) {
594 const MachineOperand &MO1 = MI->getOperand(Op);
595 const MachineOperand &MO2 = MI->getOperand(Op+1);
596 ARM_AM::AMSubMode Mode = ARM_AM::getAM4SubMode(MO2.getImm());
597 if (Modifier && strcmp(Modifier, "submode") == 0) {
598 if (MO1.getReg() == ARM::SP) {
600 bool isLDM = (MI->getOpcode() == ARM::LDM ||
601 MI->getOpcode() == ARM::LDM_RET ||
602 MI->getOpcode() == ARM::t2LDM_RET);
603 O << ARM_AM::getAMSubModeAltStr(Mode, isLDM);
605 O << ARM_AM::getAMSubModeStr(Mode);
607 printOperand(MI, Op);
608 if (ARM_AM::getAM4WBFlag(MO2.getImm()))
613 void ARMAsmPrinter::printAddrMode5Operand(const MachineInstr *MI, int Op,
614 const char *Modifier) {
615 const MachineOperand &MO1 = MI->getOperand(Op);
616 const MachineOperand &MO2 = MI->getOperand(Op+1);
618 if (!MO1.isReg()) { // FIXME: This is for CP entries, but isn't right.
619 printOperand(MI, Op);
623 assert(TargetRegisterInfo::isPhysicalRegister(MO1.getReg()));
625 if (Modifier && strcmp(Modifier, "submode") == 0) {
626 ARM_AM::AMSubMode Mode = ARM_AM::getAM5SubMode(MO2.getImm());
627 if (MO1.getReg() == ARM::SP) {
628 bool isFLDM = (MI->getOpcode() == ARM::FLDMD ||
629 MI->getOpcode() == ARM::FLDMS);
630 O << ARM_AM::getAMSubModeAltStr(Mode, isFLDM);
632 O << ARM_AM::getAMSubModeStr(Mode);
634 } else if (Modifier && strcmp(Modifier, "base") == 0) {
635 // Used for FSTM{D|S} and LSTM{D|S} operations.
636 O << TRI->getAsmName(MO1.getReg());
637 if (ARM_AM::getAM5WBFlag(MO2.getImm()))
642 O << "[" << TRI->getAsmName(MO1.getReg());
644 if (unsigned ImmOffs = ARM_AM::getAM5Offset(MO2.getImm())) {
646 << (char)ARM_AM::getAM5Op(MO2.getImm())
652 void ARMAsmPrinter::printAddrMode6Operand(const MachineInstr *MI, int Op) {
653 const MachineOperand &MO1 = MI->getOperand(Op);
654 const MachineOperand &MO2 = MI->getOperand(Op+1);
655 const MachineOperand &MO3 = MI->getOperand(Op+2);
657 // FIXME: No support yet for specifying alignment.
658 O << "[" << TRI->getAsmName(MO1.getReg()) << "]";
660 if (ARM_AM::getAM6WBFlag(MO3.getImm())) {
661 if (MO2.getReg() == 0)
664 O << ", " << TRI->getAsmName(MO2.getReg());
668 void ARMAsmPrinter::printAddrModePCOperand(const MachineInstr *MI, int Op,
669 const char *Modifier) {
670 if (Modifier && strcmp(Modifier, "label") == 0) {
671 printPCLabel(MI, Op+1);
675 const MachineOperand &MO1 = MI->getOperand(Op);
676 assert(TargetRegisterInfo::isPhysicalRegister(MO1.getReg()));
677 O << "[pc, +" << TRI->getAsmName(MO1.getReg()) << "]";
681 ARMAsmPrinter::printBitfieldInvMaskImmOperand(const MachineInstr *MI, int Op) {
682 const MachineOperand &MO = MI->getOperand(Op);
683 uint32_t v = ~MO.getImm();
684 int32_t lsb = CountTrailingZeros_32(v);
685 int32_t width = (32 - CountLeadingZeros_32 (v)) - lsb;
686 assert(MO.isImm() && "Not a valid bf_inv_mask_imm value!");
687 O << "#" << lsb << ", #" << width;
690 //===--------------------------------------------------------------------===//
693 ARMAsmPrinter::printThumbITMask(const MachineInstr *MI, int Op) {
694 // (3 - the number of trailing zeros) is the number of then / else.
695 unsigned Mask = MI->getOperand(Op).getImm();
696 unsigned NumTZ = CountTrailingZeros_32(Mask);
697 assert(NumTZ <= 3 && "Invalid IT mask!");
698 for (unsigned Pos = 3, e = NumTZ; Pos > e; --Pos) {
699 bool T = (Mask & (1 << Pos)) != 0;
708 ARMAsmPrinter::printThumbAddrModeRROperand(const MachineInstr *MI, int Op) {
709 const MachineOperand &MO1 = MI->getOperand(Op);
710 const MachineOperand &MO2 = MI->getOperand(Op+1);
711 O << "[" << TRI->getAsmName(MO1.getReg());
712 O << ", " << TRI->getAsmName(MO2.getReg()) << "]";
716 ARMAsmPrinter::printThumbAddrModeRI5Operand(const MachineInstr *MI, int Op,
718 const MachineOperand &MO1 = MI->getOperand(Op);
719 const MachineOperand &MO2 = MI->getOperand(Op+1);
720 const MachineOperand &MO3 = MI->getOperand(Op+2);
722 if (!MO1.isReg()) { // FIXME: This is for CP entries, but isn't right.
723 printOperand(MI, Op);
727 O << "[" << TRI->getAsmName(MO1.getReg());
729 O << ", " << TRI->getAsmName(MO3.getReg());
730 else if (unsigned ImmOffs = MO2.getImm()) {
731 O << ", #" << ImmOffs;
739 ARMAsmPrinter::printThumbAddrModeS1Operand(const MachineInstr *MI, int Op) {
740 printThumbAddrModeRI5Operand(MI, Op, 1);
743 ARMAsmPrinter::printThumbAddrModeS2Operand(const MachineInstr *MI, int Op) {
744 printThumbAddrModeRI5Operand(MI, Op, 2);
747 ARMAsmPrinter::printThumbAddrModeS4Operand(const MachineInstr *MI, int Op) {
748 printThumbAddrModeRI5Operand(MI, Op, 4);
751 void ARMAsmPrinter::printThumbAddrModeSPOperand(const MachineInstr *MI,int Op) {
752 const MachineOperand &MO1 = MI->getOperand(Op);
753 const MachineOperand &MO2 = MI->getOperand(Op+1);
754 O << "[" << TRI->getAsmName(MO1.getReg());
755 if (unsigned ImmOffs = MO2.getImm())
756 O << ", #" << ImmOffs << " * 4";
760 //===--------------------------------------------------------------------===//
762 // Constant shifts t2_so_reg is a 2-operand unit corresponding to the Thumb2
763 // register with shift forms.
765 // REG IMM, SH_OPC - e.g. R5, LSL #3
766 void ARMAsmPrinter::printT2SOOperand(const MachineInstr *MI, int OpNum) {
767 const MachineOperand &MO1 = MI->getOperand(OpNum);
768 const MachineOperand &MO2 = MI->getOperand(OpNum+1);
770 unsigned Reg = MO1.getReg();
771 assert(TargetRegisterInfo::isPhysicalRegister(Reg));
772 O << TRI->getAsmName(Reg);
774 // Print the shift opc.
776 << ARM_AM::getShiftOpcStr(ARM_AM::getSORegShOp(MO2.getImm()))
779 assert(MO2.isImm() && "Not a valid t2_so_reg value!");
780 O << "#" << ARM_AM::getSORegOffset(MO2.getImm());
783 void ARMAsmPrinter::printT2AddrModeImm12Operand(const MachineInstr *MI,
785 const MachineOperand &MO1 = MI->getOperand(OpNum);
786 const MachineOperand &MO2 = MI->getOperand(OpNum+1);
788 O << "[" << TRI->getAsmName(MO1.getReg());
790 unsigned OffImm = MO2.getImm();
791 if (OffImm) // Don't print +0.
792 O << ", #+" << OffImm;
796 void ARMAsmPrinter::printT2AddrModeImm8Operand(const MachineInstr *MI,
798 const MachineOperand &MO1 = MI->getOperand(OpNum);
799 const MachineOperand &MO2 = MI->getOperand(OpNum+1);
801 O << "[" << TRI->getAsmName(MO1.getReg());
803 int32_t OffImm = (int32_t)MO2.getImm();
806 O << ", #-" << -OffImm;
808 O << ", #+" << OffImm;
812 void ARMAsmPrinter::printT2AddrModeImm8s4Operand(const MachineInstr *MI,
814 const MachineOperand &MO1 = MI->getOperand(OpNum);
815 const MachineOperand &MO2 = MI->getOperand(OpNum+1);
817 O << "[" << TRI->getAsmName(MO1.getReg());
819 int32_t OffImm = (int32_t)MO2.getImm() / 4;
822 O << ", #-" << -OffImm << " * 4";
824 O << ", #+" << OffImm << " * 4";
828 void ARMAsmPrinter::printT2AddrModeImm8OffsetOperand(const MachineInstr *MI,
830 const MachineOperand &MO1 = MI->getOperand(OpNum);
831 int32_t OffImm = (int32_t)MO1.getImm();
834 O << "#-" << -OffImm;
839 void ARMAsmPrinter::printT2AddrModeSoRegOperand(const MachineInstr *MI,
841 const MachineOperand &MO1 = MI->getOperand(OpNum);
842 const MachineOperand &MO2 = MI->getOperand(OpNum+1);
843 const MachineOperand &MO3 = MI->getOperand(OpNum+2);
845 O << "[" << TRI->getAsmName(MO1.getReg());
848 O << ", +" << TRI->getAsmName(MO2.getReg());
850 unsigned ShAmt = MO3.getImm();
852 assert(ShAmt <= 3 && "Not a valid Thumb2 addressing mode!");
853 O << ", lsl #" << ShAmt;
860 //===--------------------------------------------------------------------===//
862 void ARMAsmPrinter::printPredicateOperand(const MachineInstr *MI, int OpNum) {
863 ARMCC::CondCodes CC = (ARMCC::CondCodes)MI->getOperand(OpNum).getImm();
865 O << ARMCondCodeToString(CC);
868 void ARMAsmPrinter::printSBitModifierOperand(const MachineInstr *MI, int OpNum){
869 unsigned Reg = MI->getOperand(OpNum).getReg();
871 assert(Reg == ARM::CPSR && "Expect ARM CPSR register!");
876 void ARMAsmPrinter::printPCLabel(const MachineInstr *MI, int OpNum) {
877 int Id = (int)MI->getOperand(OpNum).getImm();
878 O << TAI->getPrivateGlobalPrefix() << "PC" << Id;
881 void ARMAsmPrinter::printRegisterList(const MachineInstr *MI, int OpNum) {
883 for (unsigned i = OpNum, e = MI->getNumOperands(); i != e; ++i) {
885 if (i != e-1) O << ", ";
890 void ARMAsmPrinter::printCPInstOperand(const MachineInstr *MI, int OpNum,
891 const char *Modifier) {
892 assert(Modifier && "This operand only works with a modifier!");
893 // There are two aspects to a CONSTANTPOOL_ENTRY operand, the label and the
895 if (!strcmp(Modifier, "label")) {
896 unsigned ID = MI->getOperand(OpNum).getImm();
897 O << TAI->getPrivateGlobalPrefix() << "CPI" << getFunctionNumber()
898 << '_' << ID << ":\n";
900 assert(!strcmp(Modifier, "cpentry") && "Unknown modifier for CPE");
901 unsigned CPI = MI->getOperand(OpNum).getIndex();
903 const MachineConstantPoolEntry &MCPE = MCP->getConstants()[CPI];
905 if (MCPE.isMachineConstantPoolEntry()) {
906 EmitMachineConstantPoolValue(MCPE.Val.MachineCPVal);
908 EmitGlobalConstant(MCPE.Val.ConstVal);
913 void ARMAsmPrinter::printJTBlockOperand(const MachineInstr *MI, int OpNum) {
914 assert(!Subtarget->isThumb2() && "Thumb2 should use double-jump jumptables!");
916 const MachineOperand &MO1 = MI->getOperand(OpNum);
917 const MachineOperand &MO2 = MI->getOperand(OpNum+1); // Unique Id
918 unsigned JTI = MO1.getIndex();
919 O << TAI->getPrivateGlobalPrefix() << "JTI" << getFunctionNumber()
920 << '_' << JTI << '_' << MO2.getImm() << ":\n";
922 const char *JTEntryDirective = TAI->getJumpTableDirective();
923 if (!JTEntryDirective)
924 JTEntryDirective = TAI->getData32bitsDirective();
926 const MachineFunction *MF = MI->getParent()->getParent();
927 const MachineJumpTableInfo *MJTI = MF->getJumpTableInfo();
928 const std::vector<MachineJumpTableEntry> &JT = MJTI->getJumpTables();
929 const std::vector<MachineBasicBlock*> &JTBBs = JT[JTI].MBBs;
930 bool UseSet= TAI->getSetDirective() && TM.getRelocationModel() == Reloc::PIC_;
931 SmallPtrSet<MachineBasicBlock*, 8> JTSets;
932 for (unsigned i = 0, e = JTBBs.size(); i != e; ++i) {
933 MachineBasicBlock *MBB = JTBBs[i];
934 bool isNew = JTSets.insert(MBB);
937 printPICJumpTableSetLabel(JTI, MO2.getImm(), MBB);
939 O << JTEntryDirective << ' ';
941 O << TAI->getPrivateGlobalPrefix() << getFunctionNumber()
942 << '_' << JTI << '_' << MO2.getImm()
943 << "_set_" << MBB->getNumber();
944 else if (TM.getRelocationModel() == Reloc::PIC_) {
945 printBasicBlockLabel(MBB, false, false, false);
946 // If the arch uses custom Jump Table directives, don't calc relative to JT
947 if (!TAI->getJumpTableDirective())
948 O << '-' << TAI->getPrivateGlobalPrefix() << "JTI"
949 << getFunctionNumber() << '_' << JTI << '_' << MO2.getImm();
951 printBasicBlockLabel(MBB, false, false, false);
958 void ARMAsmPrinter::printJT2BlockOperand(const MachineInstr *MI, int OpNum) {
959 const MachineOperand &MO1 = MI->getOperand(OpNum);
960 const MachineOperand &MO2 = MI->getOperand(OpNum+1); // Unique Id
961 unsigned JTI = MO1.getIndex();
962 O << TAI->getPrivateGlobalPrefix() << "JTI" << getFunctionNumber()
963 << '_' << JTI << '_' << MO2.getImm() << ":\n";
965 const MachineFunction *MF = MI->getParent()->getParent();
966 const MachineJumpTableInfo *MJTI = MF->getJumpTableInfo();
967 const std::vector<MachineJumpTableEntry> &JT = MJTI->getJumpTables();
968 const std::vector<MachineBasicBlock*> &JTBBs = JT[JTI].MBBs;
969 bool ByteOffset = false, HalfWordOffset = false;
970 if (MI->getOpcode() == ARM::t2TBB)
972 else if (MI->getOpcode() == ARM::t2TBH)
973 HalfWordOffset = true;
975 for (unsigned i = 0, e = JTBBs.size(); i != e; ++i) {
976 MachineBasicBlock *MBB = JTBBs[i];
978 O << TAI->getData8bitsDirective();
979 else if (HalfWordOffset)
980 O << TAI->getData16bitsDirective();
981 if (ByteOffset || HalfWordOffset) {
983 printBasicBlockLabel(MBB, false, false, false);
984 O << "-" << TAI->getPrivateGlobalPrefix() << "JTI" << getFunctionNumber()
985 << '_' << JTI << '_' << MO2.getImm() << ")/2";
988 printBasicBlockLabel(MBB, false, false, false);
994 // Make sure the instruction that follows TBB is 2-byte aligned.
995 // FIXME: Constant island pass should insert an "ALIGN" instruction instead.
996 if (ByteOffset && (JTBBs.size() & 1)) {
1002 void ARMAsmPrinter::printTBAddrMode(const MachineInstr *MI, int OpNum) {
1003 O << "[pc, " << TRI->getAsmName(MI->getOperand(OpNum).getReg());
1004 if (MI->getOpcode() == ARM::t2TBH)
1010 bool ARMAsmPrinter::PrintAsmOperand(const MachineInstr *MI, unsigned OpNum,
1011 unsigned AsmVariant, const char *ExtraCode){
1012 // Does this asm operand have a single letter operand modifier?
1013 if (ExtraCode && ExtraCode[0]) {
1014 if (ExtraCode[1] != 0) return true; // Unknown modifier.
1016 switch (ExtraCode[0]) {
1017 default: return true; // Unknown modifier.
1018 case 'a': // Print as a memory address.
1019 if (MI->getOperand(OpNum).isReg()) {
1020 O << "[" << TRI->getAsmName(MI->getOperand(OpNum).getReg()) << "]";
1024 case 'c': // Don't print "#" before an immediate operand.
1025 printOperand(MI, OpNum, "no_hash");
1027 case 'P': // Print a VFP double precision register.
1028 printOperand(MI, OpNum);
1031 if (TM.getTargetData()->isLittleEndian())
1035 if (TM.getTargetData()->isBigEndian())
1038 case 'H': // Write second word of DI / DF reference.
1039 // Verify that this operand has two consecutive registers.
1040 if (!MI->getOperand(OpNum).isReg() ||
1041 OpNum+1 == MI->getNumOperands() ||
1042 !MI->getOperand(OpNum+1).isReg())
1044 ++OpNum; // Return the high-part.
1048 printOperand(MI, OpNum);
1052 bool ARMAsmPrinter::PrintAsmMemoryOperand(const MachineInstr *MI,
1053 unsigned OpNum, unsigned AsmVariant,
1054 const char *ExtraCode) {
1055 if (ExtraCode && ExtraCode[0])
1056 return true; // Unknown modifier.
1057 printAddrMode2Operand(MI, OpNum);
1061 void ARMAsmPrinter::printMachineInstruction(const MachineInstr *MI) {
1064 int Opc = MI->getOpcode();
1066 case ARM::CONSTPOOL_ENTRY:
1067 if (!InCPMode && AFI->isThumbFunction()) {
1073 if (InCPMode && AFI->isThumbFunction())
1077 // Call the autogenerated instruction printer routines.
1078 printInstruction(MI);
1081 bool ARMAsmPrinter::doInitialization(Module &M) {
1083 bool Result = AsmPrinter::doInitialization(M);
1084 DW = getAnalysisIfAvailable<DwarfWriter>();
1086 // Use unified assembler syntax mode for Thumb.
1087 if (Subtarget->isThumb())
1088 O << "\t.syntax unified\n";
1090 // Emit ARM Build Attributes
1091 if (Subtarget->isTargetELF()) {
1093 std::string CPUString = Subtarget->getCPUString();
1094 if (CPUString != "generic")
1095 O << "\t.cpu " << CPUString << '\n';
1097 // FIXME: Emit FPU type
1098 if (Subtarget->hasVFP2())
1099 O << "\t.eabi_attribute " << ARMBuildAttrs::VFP_arch << ", 2\n";
1101 // Signal various FP modes.
1103 O << "\t.eabi_attribute " << ARMBuildAttrs::ABI_FP_denormal << ", 1\n"
1104 << "\t.eabi_attribute " << ARMBuildAttrs::ABI_FP_exceptions << ", 1\n";
1106 if (FiniteOnlyFPMath())
1107 O << "\t.eabi_attribute " << ARMBuildAttrs::ABI_FP_number_model << ", 1\n";
1109 O << "\t.eabi_attribute " << ARMBuildAttrs::ABI_FP_number_model << ", 3\n";
1111 // 8-bytes alignment stuff.
1112 O << "\t.eabi_attribute " << ARMBuildAttrs::ABI_align8_needed << ", 1\n"
1113 << "\t.eabi_attribute " << ARMBuildAttrs::ABI_align8_preserved << ", 1\n";
1115 // FIXME: Should we signal R9 usage?
1121 /// PrintUnmangledNameSafely - Print out the printable characters in the name.
1122 /// Don't print things like \\n or \\0.
1123 static void PrintUnmangledNameSafely(const Value *V,
1124 formatted_raw_ostream &OS) {
1125 for (StringRef::iterator it = V->getName().begin(),
1126 ie = V->getName().end(); it != ie; ++it)
1131 void ARMAsmPrinter::PrintGlobalVariable(const GlobalVariable* GVar) {
1132 const TargetData *TD = TM.getTargetData();
1134 if (!GVar->hasInitializer()) // External global require no code
1137 // Check to see if this is a special global used by LLVM, if so, emit it.
1139 if (EmitSpecialLLVMGlobal(GVar)) {
1140 if (Subtarget->isTargetDarwin() &&
1141 TM.getRelocationModel() == Reloc::Static) {
1142 if (GVar->getName() == "llvm.global_ctors")
1143 O << ".reference .constructors_used\n";
1144 else if (GVar->getName() == "llvm.global_dtors")
1145 O << ".reference .destructors_used\n";
1150 std::string name = Mang->getMangledName(GVar);
1151 Constant *C = GVar->getInitializer();
1152 if (isa<MDNode>(C) || isa<MDString>(C))
1154 const Type *Type = C->getType();
1155 unsigned Size = TD->getTypeAllocSize(Type);
1156 unsigned Align = TD->getPreferredAlignmentLog(GVar);
1157 bool isDarwin = Subtarget->isTargetDarwin();
1159 printVisibility(name, GVar->getVisibility());
1161 if (Subtarget->isTargetELF())
1162 O << "\t.type " << name << ",%object\n";
1164 const MCSection *TheSection =
1165 getObjFileLowering().SectionForGlobal(GVar, Mang, TM);
1166 SwitchToSection(TheSection);
1168 // FIXME: get this stuff from section kind flags.
1169 if (C->isNullValue() && !GVar->hasSection() && !GVar->isThreadLocal() &&
1170 // Don't put things that should go in the cstring section into "comm".
1171 !TheSection->getKind().isMergeableCString()) {
1172 if (GVar->hasExternalLinkage()) {
1173 if (const char *Directive = TAI->getZeroFillDirective()) {
1174 O << "\t.globl\t" << name << "\n";
1175 O << Directive << "__DATA, __common, " << name << ", "
1176 << Size << ", " << Align << "\n";
1181 if (GVar->hasLocalLinkage() || GVar->isWeakForLinker()) {
1182 if (Size == 0) Size = 1; // .comm Foo, 0 is undefined, avoid it.
1185 if (GVar->hasLocalLinkage()) {
1186 O << TAI->getLCOMMDirective() << name << "," << Size
1188 } else if (GVar->hasCommonLinkage()) {
1189 O << TAI->getCOMMDirective() << name << "," << Size
1192 SwitchToSection(getObjFileLowering().SectionForGlobal(GVar, Mang,TM));
1193 O << "\t.globl " << name << '\n'
1194 << TAI->getWeakDefDirective() << name << '\n';
1195 EmitAlignment(Align, GVar);
1198 O << "\t\t\t\t" << TAI->getCommentString() << ' ';
1199 PrintUnmangledNameSafely(GVar, O);
1202 EmitGlobalConstant(C);
1205 } else if (TAI->getLCOMMDirective() != NULL) {
1206 if (GVar->hasLocalLinkage()) {
1207 O << TAI->getLCOMMDirective() << name << "," << Size;
1209 O << TAI->getCOMMDirective() << name << "," << Size;
1210 if (TAI->getCOMMDirectiveTakesAlignment())
1211 O << ',' << (TAI->getAlignmentIsInBytes() ? (1 << Align) : Align);
1214 if (GVar->hasLocalLinkage())
1215 O << "\t.local\t" << name << "\n";
1216 O << TAI->getCOMMDirective() << name << "," << Size;
1217 if (TAI->getCOMMDirectiveTakesAlignment())
1218 O << "," << (TAI->getAlignmentIsInBytes() ? (1 << Align) : Align);
1221 O << "\t\t" << TAI->getCommentString() << " ";
1222 PrintUnmangledNameSafely(GVar, O);
1229 switch (GVar->getLinkage()) {
1230 case GlobalValue::CommonLinkage:
1231 case GlobalValue::LinkOnceAnyLinkage:
1232 case GlobalValue::LinkOnceODRLinkage:
1233 case GlobalValue::WeakAnyLinkage:
1234 case GlobalValue::WeakODRLinkage:
1236 O << "\t.globl " << name << "\n"
1237 << "\t.weak_definition " << name << "\n";
1239 O << "\t.weak " << name << "\n";
1242 case GlobalValue::AppendingLinkage:
1243 // FIXME: appending linkage variables should go into a section of
1244 // their name or something. For now, just emit them as external.
1245 case GlobalValue::ExternalLinkage:
1246 O << "\t.globl " << name << "\n";
1248 case GlobalValue::PrivateLinkage:
1249 case GlobalValue::LinkerPrivateLinkage:
1250 case GlobalValue::InternalLinkage:
1253 llvm_unreachable("Unknown linkage type!");
1256 EmitAlignment(Align, GVar);
1259 O << "\t\t\t\t" << TAI->getCommentString() << " ";
1260 PrintUnmangledNameSafely(GVar, O);
1263 if (TAI->hasDotTypeDotSizeDirective())
1264 O << "\t.size " << name << ", " << Size << "\n";
1266 EmitGlobalConstant(C);
1271 bool ARMAsmPrinter::doFinalization(Module &M) {
1272 if (Subtarget->isTargetDarwin()) {
1273 // All darwin targets use mach-o.
1274 TargetLoweringObjectFileMachO &TLOFMacho =
1275 static_cast<TargetLoweringObjectFileMachO &>(getObjFileLowering());
1279 if (!FnStubs.empty()) {
1280 const MCSection *StubSection;
1281 if (TM.getRelocationModel() == Reloc::PIC_)
1282 StubSection = TLOFMacho.getMachOSection(".section __TEXT,__picsymbolstu"
1283 "b4,symbol_stubs,none,16", true,
1284 SectionKind::getText());
1286 StubSection = TLOFMacho.getMachOSection(".section __TEXT,__symbol_stub4"
1287 ",symbol_stubs,none,12", true,
1288 SectionKind::getText());
1290 const MCSection *LazySymbolPointerSection
1291 = TLOFMacho.getMachOSection(".lazy_symbol_pointer", true,
1292 SectionKind::getMetadata());
1294 // Output stubs for dynamically-linked functions
1295 for (StringMap<FnStubInfo>::iterator I = FnStubs.begin(),
1296 E = FnStubs.end(); I != E; ++I) {
1297 const FnStubInfo &Info = I->second;
1299 SwitchToSection(StubSection);
1301 O << "\t.code\t32\n";
1303 O << Info.Stub << ":\n";
1304 O << "\t.indirect_symbol " << I->getKeyData() << '\n';
1305 O << "\tldr ip, " << Info.SLP << '\n';
1306 if (TM.getRelocationModel() == Reloc::PIC_) {
1307 O << Info.SCV << ":\n";
1308 O << "\tadd ip, pc, ip\n";
1310 O << "\tldr pc, [ip, #0]\n";
1311 O << Info.SLP << ":\n";
1312 O << "\t.long\t" << Info.LazyPtr;
1313 if (TM.getRelocationModel() == Reloc::PIC_)
1314 O << "-(" << Info.SCV << "+8)";
1317 SwitchToSection(LazySymbolPointerSection);
1318 O << Info.LazyPtr << ":\n";
1319 O << "\t.indirect_symbol " << I->getKeyData() << "\n";
1320 O << "\t.long\tdyld_stub_binding_helper\n";
1325 // Output non-lazy-pointers for external and common global variables.
1326 if (!GVNonLazyPtrs.empty()) {
1327 SwitchToSection(TLOFMacho.getMachOSection(".non_lazy_symbol_pointer",
1329 SectionKind::getMetadata()));
1330 for (StringMap<std::string>::iterator I = GVNonLazyPtrs.begin(),
1331 E = GVNonLazyPtrs.end(); I != E; ++I) {
1332 O << I->second << ":\n";
1333 O << "\t.indirect_symbol " << I->getKeyData() << "\n";
1334 O << "\t.long\t0\n";
1338 if (!HiddenGVNonLazyPtrs.empty()) {
1339 SwitchToSection(getObjFileLowering().getDataSection());
1340 for (StringMap<std::string>::iterator I = HiddenGVNonLazyPtrs.begin(),
1341 E = HiddenGVNonLazyPtrs.end(); I != E; ++I) {
1343 O << I->second << ":\n";
1344 O << "\t.long " << I->getKeyData() << "\n";
1349 // Funny Darwin hack: This flag tells the linker that no global symbols
1350 // contain code that falls through to other global symbols (e.g. the obvious
1351 // implementation of multiple entry points). If this doesn't occur, the
1352 // linker can safely perform dead code stripping. Since LLVM never
1353 // generates code that does this, it is always safe to set.
1354 O << "\t.subsections_via_symbols\n";
1357 return AsmPrinter::doFinalization(M);
1360 // Force static initialization.
1361 extern "C" void LLVMInitializeARMAsmPrinter() {
1362 RegisterAsmPrinter<ARMAsmPrinter> X(TheARMTarget);
1363 RegisterAsmPrinter<ARMAsmPrinter> Y(TheThumbTarget);