1 //===-- ARMAsmPrinter.cpp - ARM LLVM assembly writer ----------------------===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file contains a printer that converts from our internal representation
11 // of machine-dependent LLVM code to GAS-format ARM assembly language.
13 //===----------------------------------------------------------------------===//
15 #define DEBUG_TYPE "asm-printer"
17 #include "ARMTargetMachine.h"
18 #include "ARMAddressingModes.h"
19 #include "ARMConstantPoolValue.h"
20 #include "ARMMachineFunctionInfo.h"
21 #include "llvm/Constants.h"
22 #include "llvm/Module.h"
23 #include "llvm/CodeGen/AsmPrinter.h"
24 #include "llvm/CodeGen/DwarfWriter.h"
25 #include "llvm/CodeGen/MachineModuleInfo.h"
26 #include "llvm/CodeGen/MachineFunctionPass.h"
27 #include "llvm/CodeGen/MachineJumpTableInfo.h"
28 #include "llvm/Target/TargetAsmInfo.h"
29 #include "llvm/Target/TargetData.h"
30 #include "llvm/Target/TargetMachine.h"
31 #include "llvm/Target/TargetOptions.h"
32 #include "llvm/ADT/SmallPtrSet.h"
33 #include "llvm/ADT/Statistic.h"
34 #include "llvm/ADT/StringExtras.h"
35 #include "llvm/Support/Compiler.h"
36 #include "llvm/Support/Mangler.h"
37 #include "llvm/Support/MathExtras.h"
38 #include "llvm/Support/raw_ostream.h"
42 STATISTIC(EmittedInsts, "Number of machine instrs printed");
45 struct VISIBILITY_HIDDEN ARMAsmPrinter : public AsmPrinter {
46 ARMAsmPrinter(raw_ostream &O, TargetMachine &TM, const TargetAsmInfo *T)
47 : AsmPrinter(O, TM, T), DW(O, this, T), MMI(NULL), AFI(NULL), MCP(NULL),
49 Subtarget = &TM.getSubtarget<ARMSubtarget>();
53 MachineModuleInfo *MMI;
55 /// Subtarget - Keep a pointer to the ARMSubtarget around so that we can
56 /// make the right decision when printing asm code for different targets.
57 const ARMSubtarget *Subtarget;
59 /// AFI - Keep a pointer to ARMFunctionInfo for the current
63 /// MCP - Keep a pointer to constantpool entries of the current
65 const MachineConstantPool *MCP;
67 /// We name each basic block in a Function with a unique number, so
68 /// that we can consistently refer to them later. This is cleared
69 /// at the beginning of each call to runOnMachineFunction().
71 typedef std::map<const Value *, unsigned> ValueMapTy;
72 ValueMapTy NumberForBB;
74 /// GVNonLazyPtrs - Keeps the set of GlobalValues that require
75 /// non-lazy-pointers for indirect access.
76 std::set<std::string> GVNonLazyPtrs;
78 /// FnStubs - Keeps the set of external function GlobalAddresses that the
79 /// asm printer should generate stubs for.
80 std::set<std::string> FnStubs;
82 /// PCRelGVs - Keeps the set of GlobalValues used in pc relative
84 SmallPtrSet<const GlobalValue*, 8> PCRelGVs;
86 /// True if asm printer is printing a series of CONSTPOOL_ENTRY.
89 virtual const char *getPassName() const {
90 return "ARM Assembly Printer";
93 void printOperand(const MachineInstr *MI, int opNum,
94 const char *Modifier = 0);
95 void printSOImmOperand(const MachineInstr *MI, int opNum);
96 void printSOImm2PartOperand(const MachineInstr *MI, int opNum);
97 void printSORegOperand(const MachineInstr *MI, int opNum);
98 void printAddrMode2Operand(const MachineInstr *MI, int OpNo);
99 void printAddrMode2OffsetOperand(const MachineInstr *MI, int OpNo);
100 void printAddrMode3Operand(const MachineInstr *MI, int OpNo);
101 void printAddrMode3OffsetOperand(const MachineInstr *MI, int OpNo);
102 void printAddrMode4Operand(const MachineInstr *MI, int OpNo,
103 const char *Modifier = 0);
104 void printAddrMode5Operand(const MachineInstr *MI, int OpNo,
105 const char *Modifier = 0);
106 void printAddrModePCOperand(const MachineInstr *MI, int OpNo,
107 const char *Modifier = 0);
108 void printThumbAddrModeRROperand(const MachineInstr *MI, int OpNo);
109 void printThumbAddrModeRI5Operand(const MachineInstr *MI, int OpNo,
111 void printThumbAddrModeS1Operand(const MachineInstr *MI, int OpNo);
112 void printThumbAddrModeS2Operand(const MachineInstr *MI, int OpNo);
113 void printThumbAddrModeS4Operand(const MachineInstr *MI, int OpNo);
114 void printThumbAddrModeSPOperand(const MachineInstr *MI, int OpNo);
115 void printPredicateOperand(const MachineInstr *MI, int opNum);
116 void printSBitModifierOperand(const MachineInstr *MI, int opNum);
117 void printPCLabel(const MachineInstr *MI, int opNum);
118 void printRegisterList(const MachineInstr *MI, int opNum);
119 void printCPInstOperand(const MachineInstr *MI, int opNum,
120 const char *Modifier);
121 void printJTBlockOperand(const MachineInstr *MI, int opNum);
123 virtual bool PrintAsmOperand(const MachineInstr *MI, unsigned OpNo,
124 unsigned AsmVariant, const char *ExtraCode);
126 void printModuleLevelGV(const GlobalVariable* GVar);
127 bool printInstruction(const MachineInstr *MI); // autogenerated.
128 void printMachineInstruction(const MachineInstr *MI);
129 bool runOnMachineFunction(MachineFunction &F);
130 bool doInitialization(Module &M);
131 bool doFinalization(Module &M);
133 /// EmitMachineConstantPoolValue - Print a machine constantpool value to
135 virtual void EmitMachineConstantPoolValue(MachineConstantPoolValue *MCPV) {
136 printDataDirective(MCPV->getType());
138 ARMConstantPoolValue *ACPV = static_cast<ARMConstantPoolValue*>(MCPV);
139 GlobalValue *GV = ACPV->getGV();
140 std::string Name = GV ? Mang->getValueName(GV) : TAI->getGlobalPrefix();
142 Name += ACPV->getSymbol();
143 if (ACPV->isNonLazyPointer()) {
144 GVNonLazyPtrs.insert(Name);
145 printSuffixedName(Name, "$non_lazy_ptr");
146 } else if (ACPV->isStub()) {
147 FnStubs.insert(Name);
148 printSuffixedName(Name, "$stub");
151 if (ACPV->hasModifier()) O << "(" << ACPV->getModifier() << ")";
152 if (ACPV->getPCAdjustment() != 0) {
153 O << "-(" << TAI->getPrivateGlobalPrefix() << "PC"
154 << utostr(ACPV->getLabelId())
155 << "+" << (unsigned)ACPV->getPCAdjustment();
156 if (ACPV->mustAddCurrentAddress())
162 // If the constant pool value is a extern weak symbol, remember to emit
163 // the weak reference.
164 if (GV && GV->hasExternalWeakLinkage())
165 ExtWeakSymbols.insert(GV);
168 void getAnalysisUsage(AnalysisUsage &AU) const {
169 AsmPrinter::getAnalysisUsage(AU);
170 AU.setPreservesAll();
171 AU.addRequired<MachineModuleInfo>();
174 } // end of anonymous namespace
176 #include "ARMGenAsmWriter.inc"
178 /// runOnMachineFunction - This uses the printInstruction()
179 /// method to print assembly for each instruction.
181 bool ARMAsmPrinter::runOnMachineFunction(MachineFunction &MF) {
182 AFI = MF.getInfo<ARMFunctionInfo>();
183 MCP = MF.getConstantPool();
185 SetupMachineFunction(MF);
188 // NOTE: we don't print out constant pools here, they are handled as
192 // Print out labels for the function.
193 const Function *F = MF.getFunction();
194 switch (F->getLinkage()) {
195 default: assert(0 && "Unknown linkage type!");
196 case Function::InternalLinkage:
197 SwitchToTextSection("\t.text", F);
199 case Function::ExternalLinkage:
200 SwitchToTextSection("\t.text", F);
201 O << "\t.globl\t" << CurrentFnName << "\n";
203 case Function::WeakLinkage:
204 case Function::LinkOnceLinkage:
205 if (Subtarget->isTargetDarwin()) {
207 ".section __TEXT,__textcoal_nt,coalesced,pure_instructions", F);
208 O << "\t.globl\t" << CurrentFnName << "\n";
209 O << "\t.weak_definition\t" << CurrentFnName << "\n";
211 O << TAI->getWeakRefDirective() << CurrentFnName << "\n";
216 printVisibility(CurrentFnName, F->getVisibility());
218 if (AFI->isThumbFunction()) {
219 EmitAlignment(1, F, AFI->getAlign());
220 O << "\t.code\t16\n";
221 O << "\t.thumb_func";
222 if (Subtarget->isTargetDarwin())
223 O << "\t" << CurrentFnName;
229 O << CurrentFnName << ":\n";
230 // Emit pre-function debug information.
231 // FIXME: Dwarf support.
232 //DW.BeginFunction(&MF);
234 if (Subtarget->isTargetDarwin()) {
235 // If the function is empty, then we need to emit *something*. Otherwise,
236 // the function's label might be associated with something that it wasn't
237 // meant to be associated with. We emit a noop in this situation.
238 MachineFunction::iterator I = MF.begin();
240 if (++I == MF.end() && MF.front().empty())
244 // Print out code for the function.
245 for (MachineFunction::const_iterator I = MF.begin(), E = MF.end();
247 // Print a label for the basic block.
248 if (I != MF.begin()) {
249 printBasicBlockLabel(I, true, true);
252 for (MachineBasicBlock::const_iterator II = I->begin(), E = I->end();
254 // Print the assembly for the instruction.
255 printMachineInstruction(II);
259 if (TAI->hasDotTypeDotSizeDirective())
260 O << "\t.size " << CurrentFnName << ", .-" << CurrentFnName << "\n";
262 // Emit post-function debug information.
263 // FIXME: Dwarf support.
271 void ARMAsmPrinter::printOperand(const MachineInstr *MI, int opNum,
272 const char *Modifier) {
273 const MachineOperand &MO = MI->getOperand(opNum);
274 switch (MO.getType()) {
275 case MachineOperand::MO_Register:
276 if (TargetRegisterInfo::isPhysicalRegister(MO.getReg()))
277 O << TM.getRegisterInfo()->get(MO.getReg()).AsmName;
279 assert(0 && "not implemented");
281 case MachineOperand::MO_Immediate: {
282 if (!Modifier || strcmp(Modifier, "no_hash") != 0)
285 O << (int)MO.getImm();
288 case MachineOperand::MO_MachineBasicBlock:
289 printBasicBlockLabel(MO.getMBB());
291 case MachineOperand::MO_GlobalAddress: {
292 bool isCallOp = Modifier && !strcmp(Modifier, "call");
293 GlobalValue *GV = MO.getGlobal();
294 std::string Name = Mang->getValueName(GV);
295 bool isExt = (GV->isDeclaration() || GV->hasWeakLinkage() ||
296 GV->hasLinkOnceLinkage());
297 if (isExt && isCallOp && Subtarget->isTargetDarwin() &&
298 TM.getRelocationModel() != Reloc::Static) {
299 printSuffixedName(Name, "$stub");
300 FnStubs.insert(Name);
304 if (MO.getOffset() > 0)
305 O << '+' << MO.getOffset();
306 else if (MO.getOffset() < 0)
309 if (isCallOp && Subtarget->isTargetELF() &&
310 TM.getRelocationModel() == Reloc::PIC_)
312 if (GV->hasExternalWeakLinkage())
313 ExtWeakSymbols.insert(GV);
316 case MachineOperand::MO_ExternalSymbol: {
317 bool isCallOp = Modifier && !strcmp(Modifier, "call");
318 std::string Name(TAI->getGlobalPrefix());
319 Name += MO.getSymbolName();
320 if (isCallOp && Subtarget->isTargetDarwin() &&
321 TM.getRelocationModel() != Reloc::Static) {
322 printSuffixedName(Name, "$stub");
323 FnStubs.insert(Name);
326 if (isCallOp && Subtarget->isTargetELF() &&
327 TM.getRelocationModel() == Reloc::PIC_)
331 case MachineOperand::MO_ConstantPoolIndex:
332 O << TAI->getPrivateGlobalPrefix() << "CPI" << getFunctionNumber()
333 << '_' << MO.getIndex();
335 case MachineOperand::MO_JumpTableIndex:
336 O << TAI->getPrivateGlobalPrefix() << "JTI" << getFunctionNumber()
337 << '_' << MO.getIndex();
340 O << "<unknown operand type>"; abort (); break;
344 static void printSOImm(raw_ostream &O, int64_t V, const TargetAsmInfo *TAI) {
345 assert(V < (1 << 12) && "Not a valid so_imm value!");
346 unsigned Imm = ARM_AM::getSOImmValImm(V);
347 unsigned Rot = ARM_AM::getSOImmValRot(V);
349 // Print low-level immediate formation info, per
350 // A5.1.3: "Data-processing operands - Immediate".
352 O << "#" << Imm << ", " << Rot;
353 // Pretty printed version.
354 O << ' ' << TAI->getCommentString() << ' ' << (int)ARM_AM::rotr32(Imm, Rot);
360 /// printSOImmOperand - SOImm is 4-bit rotate amount in bits 8-11 with 8-bit
361 /// immediate in bits 0-7.
362 void ARMAsmPrinter::printSOImmOperand(const MachineInstr *MI, int OpNum) {
363 const MachineOperand &MO = MI->getOperand(OpNum);
364 assert(MO.isImm() && "Not a valid so_imm value!");
365 printSOImm(O, MO.getImm(), TAI);
368 /// printSOImm2PartOperand - SOImm is broken into two pieces using a 'mov'
369 /// followed by an 'orr' to materialize.
370 void ARMAsmPrinter::printSOImm2PartOperand(const MachineInstr *MI, int OpNum) {
371 const MachineOperand &MO = MI->getOperand(OpNum);
372 assert(MO.isImm() && "Not a valid so_imm value!");
373 unsigned V1 = ARM_AM::getSOImmTwoPartFirst(MO.getImm());
374 unsigned V2 = ARM_AM::getSOImmTwoPartSecond(MO.getImm());
375 printSOImm(O, ARM_AM::getSOImmVal(V1), TAI);
377 printPredicateOperand(MI, 2);
383 printSOImm(O, ARM_AM::getSOImmVal(V2), TAI);
386 // so_reg is a 4-operand unit corresponding to register forms of the A5.1
387 // "Addressing Mode 1 - Data-processing operands" forms. This includes:
389 // REG REG 0,SH_OPC - e.g. R5, ROR R3
390 // REG 0 IMM,SH_OPC - e.g. R5, LSL #3
391 void ARMAsmPrinter::printSORegOperand(const MachineInstr *MI, int Op) {
392 const MachineOperand &MO1 = MI->getOperand(Op);
393 const MachineOperand &MO2 = MI->getOperand(Op+1);
394 const MachineOperand &MO3 = MI->getOperand(Op+2);
396 assert(TargetRegisterInfo::isPhysicalRegister(MO1.getReg()));
397 O << TM.getRegisterInfo()->get(MO1.getReg()).AsmName;
399 // Print the shift opc.
401 << ARM_AM::getShiftOpcStr(ARM_AM::getSORegShOp(MO3.getImm()))
405 assert(TargetRegisterInfo::isPhysicalRegister(MO2.getReg()));
406 O << TM.getRegisterInfo()->get(MO2.getReg()).AsmName;
407 assert(ARM_AM::getSORegOffset(MO3.getImm()) == 0);
409 O << "#" << ARM_AM::getSORegOffset(MO3.getImm());
413 void ARMAsmPrinter::printAddrMode2Operand(const MachineInstr *MI, int Op) {
414 const MachineOperand &MO1 = MI->getOperand(Op);
415 const MachineOperand &MO2 = MI->getOperand(Op+1);
416 const MachineOperand &MO3 = MI->getOperand(Op+2);
418 if (!MO1.isReg()) { // FIXME: This is for CP entries, but isn't right.
419 printOperand(MI, Op);
423 O << "[" << TM.getRegisterInfo()->get(MO1.getReg()).AsmName;
426 if (ARM_AM::getAM2Offset(MO3.getImm())) // Don't print +0.
428 << (char)ARM_AM::getAM2Op(MO3.getImm())
429 << ARM_AM::getAM2Offset(MO3.getImm());
435 << (char)ARM_AM::getAM2Op(MO3.getImm())
436 << TM.getRegisterInfo()->get(MO2.getReg()).AsmName;
438 if (unsigned ShImm = ARM_AM::getAM2Offset(MO3.getImm()))
440 << ARM_AM::getShiftOpcStr(ARM_AM::getAM2ShiftOpc(MO3.getImm()))
445 void ARMAsmPrinter::printAddrMode2OffsetOperand(const MachineInstr *MI, int Op){
446 const MachineOperand &MO1 = MI->getOperand(Op);
447 const MachineOperand &MO2 = MI->getOperand(Op+1);
450 unsigned ImmOffs = ARM_AM::getAM2Offset(MO2.getImm());
451 assert(ImmOffs && "Malformed indexed load / store!");
453 << (char)ARM_AM::getAM2Op(MO2.getImm())
458 O << (char)ARM_AM::getAM2Op(MO2.getImm())
459 << TM.getRegisterInfo()->get(MO1.getReg()).AsmName;
461 if (unsigned ShImm = ARM_AM::getAM2Offset(MO2.getImm()))
463 << ARM_AM::getShiftOpcStr(ARM_AM::getAM2ShiftOpc(MO2.getImm()))
467 void ARMAsmPrinter::printAddrMode3Operand(const MachineInstr *MI, int Op) {
468 const MachineOperand &MO1 = MI->getOperand(Op);
469 const MachineOperand &MO2 = MI->getOperand(Op+1);
470 const MachineOperand &MO3 = MI->getOperand(Op+2);
472 assert(TargetRegisterInfo::isPhysicalRegister(MO1.getReg()));
473 O << "[" << TM.getRegisterInfo()->get(MO1.getReg()).AsmName;
477 << (char)ARM_AM::getAM3Op(MO3.getImm())
478 << TM.getRegisterInfo()->get(MO2.getReg()).AsmName
483 if (unsigned ImmOffs = ARM_AM::getAM3Offset(MO3.getImm()))
485 << (char)ARM_AM::getAM3Op(MO3.getImm())
490 void ARMAsmPrinter::printAddrMode3OffsetOperand(const MachineInstr *MI, int Op){
491 const MachineOperand &MO1 = MI->getOperand(Op);
492 const MachineOperand &MO2 = MI->getOperand(Op+1);
495 O << (char)ARM_AM::getAM3Op(MO2.getImm())
496 << TM.getRegisterInfo()->get(MO1.getReg()).AsmName;
500 unsigned ImmOffs = ARM_AM::getAM3Offset(MO2.getImm());
501 assert(ImmOffs && "Malformed indexed load / store!");
503 << (char)ARM_AM::getAM3Op(MO2.getImm())
507 void ARMAsmPrinter::printAddrMode4Operand(const MachineInstr *MI, int Op,
508 const char *Modifier) {
509 const MachineOperand &MO1 = MI->getOperand(Op);
510 const MachineOperand &MO2 = MI->getOperand(Op+1);
511 ARM_AM::AMSubMode Mode = ARM_AM::getAM4SubMode(MO2.getImm());
512 if (Modifier && strcmp(Modifier, "submode") == 0) {
513 if (MO1.getReg() == ARM::SP) {
514 bool isLDM = (MI->getOpcode() == ARM::LDM ||
515 MI->getOpcode() == ARM::LDM_RET);
516 O << ARM_AM::getAMSubModeAltStr(Mode, isLDM);
518 O << ARM_AM::getAMSubModeStr(Mode);
520 printOperand(MI, Op);
521 if (ARM_AM::getAM4WBFlag(MO2.getImm()))
526 void ARMAsmPrinter::printAddrMode5Operand(const MachineInstr *MI, int Op,
527 const char *Modifier) {
528 const MachineOperand &MO1 = MI->getOperand(Op);
529 const MachineOperand &MO2 = MI->getOperand(Op+1);
531 if (!MO1.isReg()) { // FIXME: This is for CP entries, but isn't right.
532 printOperand(MI, Op);
536 assert(TargetRegisterInfo::isPhysicalRegister(MO1.getReg()));
538 if (Modifier && strcmp(Modifier, "submode") == 0) {
539 ARM_AM::AMSubMode Mode = ARM_AM::getAM5SubMode(MO2.getImm());
540 if (MO1.getReg() == ARM::SP) {
541 bool isFLDM = (MI->getOpcode() == ARM::FLDMD ||
542 MI->getOpcode() == ARM::FLDMS);
543 O << ARM_AM::getAMSubModeAltStr(Mode, isFLDM);
545 O << ARM_AM::getAMSubModeStr(Mode);
547 } else if (Modifier && strcmp(Modifier, "base") == 0) {
548 // Used for FSTM{D|S} and LSTM{D|S} operations.
549 O << TM.getRegisterInfo()->get(MO1.getReg()).AsmName;
550 if (ARM_AM::getAM5WBFlag(MO2.getImm()))
555 O << "[" << TM.getRegisterInfo()->get(MO1.getReg()).AsmName;
557 if (unsigned ImmOffs = ARM_AM::getAM5Offset(MO2.getImm())) {
559 << (char)ARM_AM::getAM5Op(MO2.getImm())
565 void ARMAsmPrinter::printAddrModePCOperand(const MachineInstr *MI, int Op,
566 const char *Modifier) {
567 if (Modifier && strcmp(Modifier, "label") == 0) {
568 printPCLabel(MI, Op+1);
572 const MachineOperand &MO1 = MI->getOperand(Op);
573 assert(TargetRegisterInfo::isPhysicalRegister(MO1.getReg()));
574 O << "[pc, +" << TM.getRegisterInfo()->get(MO1.getReg()).AsmName << "]";
578 ARMAsmPrinter::printThumbAddrModeRROperand(const MachineInstr *MI, int Op) {
579 const MachineOperand &MO1 = MI->getOperand(Op);
580 const MachineOperand &MO2 = MI->getOperand(Op+1);
581 O << "[" << TM.getRegisterInfo()->get(MO1.getReg()).AsmName;
582 O << ", " << TM.getRegisterInfo()->get(MO2.getReg()).AsmName << "]";
586 ARMAsmPrinter::printThumbAddrModeRI5Operand(const MachineInstr *MI, int Op,
588 const MachineOperand &MO1 = MI->getOperand(Op);
589 const MachineOperand &MO2 = MI->getOperand(Op+1);
590 const MachineOperand &MO3 = MI->getOperand(Op+2);
592 if (!MO1.isReg()) { // FIXME: This is for CP entries, but isn't right.
593 printOperand(MI, Op);
597 O << "[" << TM.getRegisterInfo()->get(MO1.getReg()).AsmName;
599 O << ", " << TM.getRegisterInfo()->get(MO3.getReg()).AsmName;
600 else if (unsigned ImmOffs = MO2.getImm()) {
601 O << ", #" << ImmOffs;
609 ARMAsmPrinter::printThumbAddrModeS1Operand(const MachineInstr *MI, int Op) {
610 printThumbAddrModeRI5Operand(MI, Op, 1);
613 ARMAsmPrinter::printThumbAddrModeS2Operand(const MachineInstr *MI, int Op) {
614 printThumbAddrModeRI5Operand(MI, Op, 2);
617 ARMAsmPrinter::printThumbAddrModeS4Operand(const MachineInstr *MI, int Op) {
618 printThumbAddrModeRI5Operand(MI, Op, 4);
621 void ARMAsmPrinter::printThumbAddrModeSPOperand(const MachineInstr *MI,int Op) {
622 const MachineOperand &MO1 = MI->getOperand(Op);
623 const MachineOperand &MO2 = MI->getOperand(Op+1);
624 O << "[" << TM.getRegisterInfo()->get(MO1.getReg()).AsmName;
625 if (unsigned ImmOffs = MO2.getImm())
626 O << ", #" << ImmOffs << " * 4";
630 void ARMAsmPrinter::printPredicateOperand(const MachineInstr *MI, int opNum) {
631 ARMCC::CondCodes CC = (ARMCC::CondCodes)MI->getOperand(opNum).getImm();
633 O << ARMCondCodeToString(CC);
636 void ARMAsmPrinter::printSBitModifierOperand(const MachineInstr *MI, int opNum){
637 unsigned Reg = MI->getOperand(opNum).getReg();
639 assert(Reg == ARM::CPSR && "Expect ARM CPSR register!");
644 void ARMAsmPrinter::printPCLabel(const MachineInstr *MI, int opNum) {
645 int Id = (int)MI->getOperand(opNum).getImm();
646 O << TAI->getPrivateGlobalPrefix() << "PC" << Id;
649 void ARMAsmPrinter::printRegisterList(const MachineInstr *MI, int opNum) {
651 for (unsigned i = opNum, e = MI->getNumOperands(); i != e; ++i) {
653 if (i != e-1) O << ", ";
658 void ARMAsmPrinter::printCPInstOperand(const MachineInstr *MI, int OpNo,
659 const char *Modifier) {
660 assert(Modifier && "This operand only works with a modifier!");
661 // There are two aspects to a CONSTANTPOOL_ENTRY operand, the label and the
663 if (!strcmp(Modifier, "label")) {
664 unsigned ID = MI->getOperand(OpNo).getImm();
665 O << TAI->getPrivateGlobalPrefix() << "CPI" << getFunctionNumber()
666 << '_' << ID << ":\n";
668 assert(!strcmp(Modifier, "cpentry") && "Unknown modifier for CPE");
669 unsigned CPI = MI->getOperand(OpNo).getIndex();
671 const MachineConstantPoolEntry &MCPE = MCP->getConstants()[CPI];
673 if (MCPE.isMachineConstantPoolEntry()) {
674 EmitMachineConstantPoolValue(MCPE.Val.MachineCPVal);
675 ARMConstantPoolValue *ACPV =
676 static_cast<ARMConstantPoolValue*>(MCPE.Val.MachineCPVal);
677 if (ACPV->getPCAdjustment() != 0) {
678 const GlobalValue *GV = ACPV->getGV();
682 EmitGlobalConstant(MCPE.Val.ConstVal);
683 // remember to emit the weak reference
684 if (const GlobalValue *GV = dyn_cast<GlobalValue>(MCPE.Val.ConstVal))
685 if (GV->hasExternalWeakLinkage())
686 ExtWeakSymbols.insert(GV);
691 void ARMAsmPrinter::printJTBlockOperand(const MachineInstr *MI, int OpNo) {
692 const MachineOperand &MO1 = MI->getOperand(OpNo);
693 const MachineOperand &MO2 = MI->getOperand(OpNo+1); // Unique Id
694 unsigned JTI = MO1.getIndex();
695 O << TAI->getPrivateGlobalPrefix() << "JTI" << getFunctionNumber()
696 << '_' << JTI << '_' << MO2.getImm() << ":\n";
698 const char *JTEntryDirective = TAI->getJumpTableDirective();
699 if (!JTEntryDirective)
700 JTEntryDirective = TAI->getData32bitsDirective();
702 const MachineFunction *MF = MI->getParent()->getParent();
703 const MachineJumpTableInfo *MJTI = MF->getJumpTableInfo();
704 const std::vector<MachineJumpTableEntry> &JT = MJTI->getJumpTables();
705 const std::vector<MachineBasicBlock*> &JTBBs = JT[JTI].MBBs;
706 bool UseSet= TAI->getSetDirective() && TM.getRelocationModel() == Reloc::PIC_;
707 std::set<MachineBasicBlock*> JTSets;
708 for (unsigned i = 0, e = JTBBs.size(); i != e; ++i) {
709 MachineBasicBlock *MBB = JTBBs[i];
710 if (UseSet && JTSets.insert(MBB).second)
711 printPICJumpTableSetLabel(JTI, MO2.getImm(), MBB);
713 O << JTEntryDirective << ' ';
715 O << TAI->getPrivateGlobalPrefix() << getFunctionNumber()
716 << '_' << JTI << '_' << MO2.getImm()
717 << "_set_" << MBB->getNumber();
718 else if (TM.getRelocationModel() == Reloc::PIC_) {
719 printBasicBlockLabel(MBB, false, false, false);
720 // If the arch uses custom Jump Table directives, don't calc relative to JT
721 if (!TAI->getJumpTableDirective())
722 O << '-' << TAI->getPrivateGlobalPrefix() << "JTI"
723 << getFunctionNumber() << '_' << JTI << '_' << MO2.getImm();
725 printBasicBlockLabel(MBB, false, false, false);
732 bool ARMAsmPrinter::PrintAsmOperand(const MachineInstr *MI, unsigned OpNo,
733 unsigned AsmVariant, const char *ExtraCode){
734 // Does this asm operand have a single letter operand modifier?
735 if (ExtraCode && ExtraCode[0]) {
736 if (ExtraCode[1] != 0) return true; // Unknown modifier.
738 switch (ExtraCode[0]) {
739 default: return true; // Unknown modifier.
740 case 'c': // Don't print "$" before a global var name or constant.
741 case 'P': // Print a VFP double precision register.
742 printOperand(MI, OpNo);
745 if (TM.getTargetData()->isLittleEndian())
749 if (TM.getTargetData()->isBigEndian())
752 case 'H': // Write second word of DI / DF reference.
753 // Verify that this operand has two consecutive registers.
754 if (!MI->getOperand(OpNo).isReg() ||
755 OpNo+1 == MI->getNumOperands() ||
756 !MI->getOperand(OpNo+1).isReg())
758 ++OpNo; // Return the high-part.
762 printOperand(MI, OpNo);
766 void ARMAsmPrinter::printMachineInstruction(const MachineInstr *MI) {
769 int Opc = MI->getOpcode();
771 case ARM::CONSTPOOL_ENTRY:
772 if (!InCPMode && AFI->isThumbFunction()) {
778 if (InCPMode && AFI->isThumbFunction())
782 // Call the autogenerated instruction printer routines.
783 printInstruction(MI);
786 bool ARMAsmPrinter::doInitialization(Module &M) {
787 // Emit initial debug information.
788 // FIXME: Dwarf support.
789 //DW.BeginModule(&M);
791 bool Result = AsmPrinter::doInitialization(M);
793 // AsmPrinter::doInitialization should have done this analysis.
794 MMI = getAnalysisToUpdate<MachineModuleInfo>();
796 // FIXME: Dwarf support.
797 //DW.SetModuleInfo(MMI);
799 // Darwin wants symbols to be quoted if they have complex names.
800 if (Subtarget->isTargetDarwin())
801 Mang->setUseQuotes(true);
806 /// PrintUnmangledNameSafely - Print out the printable characters in the name.
807 /// Don't print things like \n or \0.
808 static void PrintUnmangledNameSafely(const Value *V, raw_ostream &OS) {
809 for (const char *Name = V->getNameStart(), *E = Name+V->getNameLen();
815 void ARMAsmPrinter::printModuleLevelGV(const GlobalVariable* GVar) {
816 const TargetData *TD = TM.getTargetData();
818 if (!GVar->hasInitializer()) // External global require no code
821 // Check to see if this is a special global used by LLVM, if so, emit it.
823 if (EmitSpecialLLVMGlobal(GVar)) {
824 if (Subtarget->isTargetDarwin() &&
825 TM.getRelocationModel() == Reloc::Static) {
826 if (GVar->getName() == "llvm.global_ctors")
827 O << ".reference .constructors_used\n";
828 else if (GVar->getName() == "llvm.global_dtors")
829 O << ".reference .destructors_used\n";
834 std::string name = Mang->getValueName(GVar);
835 Constant *C = GVar->getInitializer();
836 const Type *Type = C->getType();
837 unsigned Size = TD->getABITypeSize(Type);
838 unsigned Align = TD->getPreferredAlignmentLog(GVar);
840 printVisibility(name, GVar->getVisibility());
842 if (Subtarget->isTargetELF())
843 O << "\t.type " << name << ",%object\n";
845 SwitchToSection(TAI->SectionForGlobal(GVar));
847 if (C->isNullValue() && !GVar->hasSection() && !GVar->isThreadLocal()) {
848 // FIXME: This seems to be pretty darwin-specific
850 if (GVar->hasExternalLinkage()) {
851 if (const char *Directive = TAI->getZeroFillDirective()) {
852 O << "\t.globl\t" << name << "\n";
853 O << Directive << "__DATA, __common, " << name << ", "
854 << Size << ", " << Align << "\n";
859 if (GVar->hasInternalLinkage() || GVar->mayBeOverridden()) {
860 if (Size == 0) Size = 1; // .comm Foo, 0 is undefined, avoid it.
862 if (TAI->getLCOMMDirective() != NULL) {
863 if (PCRelGVs.count(GVar) || GVar->hasInternalLinkage()) {
864 O << TAI->getLCOMMDirective() << name << "," << Size;
865 if (Subtarget->isTargetDarwin())
868 O << TAI->getCOMMDirective() << name << "," << Size;
870 if (GVar->hasInternalLinkage())
871 O << "\t.local\t" << name << "\n";
872 O << TAI->getCOMMDirective() << name << "," << Size;
873 if (TAI->getCOMMDirectiveTakesAlignment())
874 O << "," << (TAI->getAlignmentIsInBytes() ? (1 << Align) : Align);
876 O << "\t\t" << TAI->getCommentString() << " ";
877 PrintUnmangledNameSafely(GVar, O);
883 switch (GVar->getLinkage()) {
884 case GlobalValue::LinkOnceLinkage:
885 case GlobalValue::WeakLinkage:
886 if (Subtarget->isTargetDarwin()) {
887 O << "\t.globl " << name << "\n"
888 << "\t.weak_definition " << name << "\n";
890 O << "\t.weak " << name << "\n";
893 case GlobalValue::AppendingLinkage:
894 // FIXME: appending linkage variables should go into a section of
895 // their name or something. For now, just emit them as external.
896 case GlobalValue::ExternalLinkage:
897 O << "\t.globl " << name << "\n";
899 case GlobalValue::InternalLinkage:
902 assert(0 && "Unknown linkage type!");
906 EmitAlignment(Align, GVar);
907 O << name << ":\t\t\t\t" << TAI->getCommentString() << " ";
908 PrintUnmangledNameSafely(GVar, O);
910 if (TAI->hasDotTypeDotSizeDirective())
911 O << "\t.size " << name << ", " << Size << "\n";
913 // If the initializer is a extern weak symbol, remember to emit the weak
915 if (const GlobalValue *GV = dyn_cast<GlobalValue>(C))
916 if (GV->hasExternalWeakLinkage())
917 ExtWeakSymbols.insert(GV);
919 EmitGlobalConstant(C);
924 bool ARMAsmPrinter::doFinalization(Module &M) {
925 for (Module::const_global_iterator I = M.global_begin(), E = M.global_end();
927 printModuleLevelGV(I);
929 if (Subtarget->isTargetDarwin()) {
930 SwitchToDataSection("");
932 // Output stubs for dynamically-linked functions
934 for (std::set<std::string>::iterator i = FnStubs.begin(), e = FnStubs.end();
936 if (TM.getRelocationModel() == Reloc::PIC_)
937 SwitchToTextSection(".section __TEXT,__picsymbolstub4,symbol_stubs,"
940 SwitchToTextSection(".section __TEXT,__symbol_stub4,symbol_stubs,"
944 O << "\t.code\t32\n";
947 printSuffixedName(p, "$stub");
949 O << "\t.indirect_symbol " << *i << "\n";
951 printSuffixedName(p, "$slp");
953 if (TM.getRelocationModel() == Reloc::PIC_) {
954 printSuffixedName(p, "$scv");
956 O << "\tadd ip, pc, ip\n";
958 O << "\tldr pc, [ip, #0]\n";
959 printSuffixedName(p, "$slp");
962 printSuffixedName(p, "$lazy_ptr");
963 if (TM.getRelocationModel() == Reloc::PIC_) {
965 printSuffixedName(p, "$scv");
969 SwitchToDataSection(".lazy_symbol_pointer", 0);
970 printSuffixedName(p, "$lazy_ptr");
972 O << "\t.indirect_symbol " << *i << "\n";
973 O << "\t.long\tdyld_stub_binding_helper\n";
977 // Output non-lazy-pointers for external and common global variables.
978 if (!GVNonLazyPtrs.empty())
979 SwitchToDataSection(".non_lazy_symbol_pointer", 0);
980 for (std::set<std::string>::iterator i = GVNonLazyPtrs.begin(),
981 e = GVNonLazyPtrs.end(); i != e; ++i) {
983 printSuffixedName(p, "$non_lazy_ptr");
985 O << "\t.indirect_symbol " << *i << "\n";
989 // Emit initial debug information.
990 // FIXME: Dwarf support.
993 // Funny Darwin hack: This flag tells the linker that no global symbols
994 // contain code that falls through to other global symbols (e.g. the obvious
995 // implementation of multiple entry points). If this doesn't occur, the
996 // linker can safely perform dead code stripping. Since LLVM never
997 // generates code that does this, it is always safe to set.
998 O << "\t.subsections_via_symbols\n";
1000 // Emit final debug information for ELF.
1001 // FIXME: Dwarf support.
1005 return AsmPrinter::doFinalization(M);
1008 /// createARMCodePrinterPass - Returns a pass that prints the ARM
1009 /// assembly code for a MachineFunction to the given output stream,
1010 /// using the given target machine description. This should work
1011 /// regardless of whether the function is in SSA form.
1013 FunctionPass *llvm::createARMCodePrinterPass(raw_ostream &o,
1014 ARMTargetMachine &tm) {
1015 return new ARMAsmPrinter(o, tm, tm.getTargetAsmInfo());
1019 static struct Register {
1021 ARMTargetMachine::registerAsmPrinter(createARMCodePrinterPass);