1 //===-- ARMAsmPrinter.cpp - Print machine code to an ARM .s file ----------===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file contains a printer that converts from our internal representation
11 // of machine-dependent LLVM code to GAS-format ARM assembly language.
13 //===----------------------------------------------------------------------===//
15 #define DEBUG_TYPE "asm-printer"
17 #include "ARMBuildAttrs.h"
18 #include "ARMAddressingModes.h"
19 #include "ARMConstantPoolValue.h"
20 #include "ARMInstPrinter.h"
21 #include "ARMMachineFunctionInfo.h"
22 #include "ARMMCInstLower.h"
23 #include "ARMTargetMachine.h"
24 #include "llvm/Constants.h"
25 #include "llvm/Module.h"
26 #include "llvm/Assembly/Writer.h"
27 #include "llvm/CodeGen/AsmPrinter.h"
28 #include "llvm/CodeGen/DwarfWriter.h"
29 #include "llvm/CodeGen/MachineModuleInfoImpls.h"
30 #include "llvm/CodeGen/MachineFunctionPass.h"
31 #include "llvm/CodeGen/MachineJumpTableInfo.h"
32 #include "llvm/MC/MCAsmInfo.h"
33 #include "llvm/MC/MCContext.h"
34 #include "llvm/MC/MCInst.h"
35 #include "llvm/MC/MCSectionMachO.h"
36 #include "llvm/MC/MCStreamer.h"
37 #include "llvm/MC/MCSymbol.h"
38 #include "llvm/Target/TargetData.h"
39 #include "llvm/Target/TargetLoweringObjectFile.h"
40 #include "llvm/Target/TargetMachine.h"
41 #include "llvm/Target/TargetOptions.h"
42 #include "llvm/Target/TargetRegistry.h"
43 #include "llvm/ADT/SmallPtrSet.h"
44 #include "llvm/ADT/SmallString.h"
45 #include "llvm/ADT/Statistic.h"
46 #include "llvm/ADT/StringSet.h"
47 #include "llvm/Support/CommandLine.h"
48 #include "llvm/Support/ErrorHandling.h"
49 #include "llvm/Support/FormattedStream.h"
50 #include "llvm/Support/Mangler.h"
51 #include "llvm/Support/MathExtras.h"
55 STATISTIC(EmittedInsts, "Number of machine instrs printed");
58 EnableMCInst("enable-arm-mcinst-printer", cl::Hidden,
59 cl::desc("enable experimental asmprinter gunk in the arm backend"));
62 class ARMAsmPrinter : public AsmPrinter {
64 /// Subtarget - Keep a pointer to the ARMSubtarget around so that we can
65 /// make the right decision when printing asm code for different targets.
66 const ARMSubtarget *Subtarget;
68 /// AFI - Keep a pointer to ARMFunctionInfo for the current
72 /// MCP - Keep a pointer to constantpool entries of the current
74 const MachineConstantPool *MCP;
77 explicit ARMAsmPrinter(formatted_raw_ostream &O, TargetMachine &TM,
78 const MCAsmInfo *T, bool V)
79 : AsmPrinter(O, TM, T, V), AFI(NULL), MCP(NULL) {
80 Subtarget = &TM.getSubtarget<ARMSubtarget>();
83 virtual const char *getPassName() const {
84 return "ARM Assembly Printer";
87 void printMCInst(const MCInst *MI) {
88 ARMInstPrinter(O, *MAI, VerboseAsm).printInstruction(MI);
91 void printInstructionThroughMCStreamer(const MachineInstr *MI);
94 void printOperand(const MachineInstr *MI, int OpNum,
95 const char *Modifier = 0);
96 void printSOImmOperand(const MachineInstr *MI, int OpNum);
97 void printSOImm2PartOperand(const MachineInstr *MI, int OpNum);
98 void printSORegOperand(const MachineInstr *MI, int OpNum);
99 void printAddrMode2Operand(const MachineInstr *MI, int OpNum);
100 void printAddrMode2OffsetOperand(const MachineInstr *MI, int OpNum);
101 void printAddrMode3Operand(const MachineInstr *MI, int OpNum);
102 void printAddrMode3OffsetOperand(const MachineInstr *MI, int OpNum);
103 void printAddrMode4Operand(const MachineInstr *MI, int OpNum,
104 const char *Modifier = 0);
105 void printAddrMode5Operand(const MachineInstr *MI, int OpNum,
106 const char *Modifier = 0);
107 void printAddrMode6Operand(const MachineInstr *MI, int OpNum);
108 void printAddrModePCOperand(const MachineInstr *MI, int OpNum,
109 const char *Modifier = 0);
110 void printBitfieldInvMaskImmOperand (const MachineInstr *MI, int OpNum);
112 void printThumbITMask(const MachineInstr *MI, int OpNum);
113 void printThumbAddrModeRROperand(const MachineInstr *MI, int OpNum);
114 void printThumbAddrModeRI5Operand(const MachineInstr *MI, int OpNum,
116 void printThumbAddrModeS1Operand(const MachineInstr *MI, int OpNum);
117 void printThumbAddrModeS2Operand(const MachineInstr *MI, int OpNum);
118 void printThumbAddrModeS4Operand(const MachineInstr *MI, int OpNum);
119 void printThumbAddrModeSPOperand(const MachineInstr *MI, int OpNum);
121 void printT2SOOperand(const MachineInstr *MI, int OpNum);
122 void printT2AddrModeImm12Operand(const MachineInstr *MI, int OpNum);
123 void printT2AddrModeImm8Operand(const MachineInstr *MI, int OpNum);
124 void printT2AddrModeImm8s4Operand(const MachineInstr *MI, int OpNum);
125 void printT2AddrModeImm8OffsetOperand(const MachineInstr *MI, int OpNum);
126 void printT2AddrModeSoRegOperand(const MachineInstr *MI, int OpNum);
128 void printPredicateOperand(const MachineInstr *MI, int OpNum);
129 void printSBitModifierOperand(const MachineInstr *MI, int OpNum);
130 void printPCLabel(const MachineInstr *MI, int OpNum);
131 void printRegisterList(const MachineInstr *MI, int OpNum);
132 void printCPInstOperand(const MachineInstr *MI, int OpNum,
133 const char *Modifier);
134 void printJTBlockOperand(const MachineInstr *MI, int OpNum);
135 void printJT2BlockOperand(const MachineInstr *MI, int OpNum);
136 void printTBAddrMode(const MachineInstr *MI, int OpNum);
137 void printNoHashImmediate(const MachineInstr *MI, int OpNum);
139 virtual bool PrintAsmOperand(const MachineInstr *MI, unsigned OpNum,
140 unsigned AsmVariant, const char *ExtraCode);
141 virtual bool PrintAsmMemoryOperand(const MachineInstr *MI, unsigned OpNum,
143 const char *ExtraCode);
145 void PrintGlobalVariable(const GlobalVariable* GVar);
146 void printInstruction(const MachineInstr *MI); // autogenerated.
147 static const char *getRegisterName(unsigned RegNo);
149 void printMachineInstruction(const MachineInstr *MI);
150 bool runOnMachineFunction(MachineFunction &F);
151 void EmitStartOfAsmFile(Module &M);
152 void EmitEndOfAsmFile(Module &M);
154 /// EmitMachineConstantPoolValue - Print a machine constantpool value to
156 virtual void EmitMachineConstantPoolValue(MachineConstantPoolValue *MCPV) {
157 printDataDirective(MCPV->getType());
159 ARMConstantPoolValue *ACPV = static_cast<ARMConstantPoolValue*>(MCPV);
160 GlobalValue *GV = ACPV->getGV();
163 if (ACPV->isLSDA()) {
164 SmallString<16> LSDAName;
165 raw_svector_ostream(LSDAName) << MAI->getPrivateGlobalPrefix() <<
166 "_LSDA_" << getFunctionNumber();
167 Name = LSDAName.str();
169 bool isIndirect = Subtarget->isTargetDarwin() &&
170 Subtarget->GVIsIndirectSymbol(GV, TM.getRelocationModel());
172 Name = Mang->getMangledName(GV);
174 // FIXME: Remove this when Darwin transition to @GOT like syntax.
175 Name = Mang->getMangledName(GV, "$non_lazy_ptr", true);
176 MCSymbol *Sym = OutContext.GetOrCreateSymbol(Name.c_str());
178 MachineModuleInfoMachO &MMIMachO =
179 MMI->getObjFileInfo<MachineModuleInfoMachO>();
180 const MCSymbol *&StubSym =
181 GV->hasHiddenVisibility() ? MMIMachO.getHiddenGVStubEntry(Sym) :
182 MMIMachO.getGVStubEntry(Sym);
184 SmallString<128> NameStr;
185 Mang->getNameWithPrefix(NameStr, GV, false);
186 StubSym = OutContext.GetOrCreateSymbol(NameStr.str());
190 Name = Mang->makeNameProper(ACPV->getSymbol());
193 if (ACPV->hasModifier()) O << "(" << ACPV->getModifier() << ")";
194 if (ACPV->getPCAdjustment() != 0) {
195 O << "-(" << MAI->getPrivateGlobalPrefix() << "PC"
196 << ACPV->getLabelId()
197 << "+" << (unsigned)ACPV->getPCAdjustment();
198 if (ACPV->mustAddCurrentAddress())
205 void getAnalysisUsage(AnalysisUsage &AU) const {
206 AsmPrinter::getAnalysisUsage(AU);
207 AU.setPreservesAll();
208 AU.addRequired<MachineModuleInfo>();
209 AU.addRequired<DwarfWriter>();
212 } // end of anonymous namespace
214 #include "ARMGenAsmWriter.inc"
216 /// runOnMachineFunction - This uses the printInstruction()
217 /// method to print assembly for each instruction.
219 bool ARMAsmPrinter::runOnMachineFunction(MachineFunction &MF) {
222 AFI = MF.getInfo<ARMFunctionInfo>();
223 MCP = MF.getConstantPool();
225 SetupMachineFunction(MF);
228 // NOTE: we don't print out constant pools here, they are handled as
233 // Print out labels for the function.
234 const Function *F = MF.getFunction();
235 OutStreamer.SwitchSection(getObjFileLowering().SectionForGlobal(F, Mang, TM));
237 switch (F->getLinkage()) {
238 default: llvm_unreachable("Unknown linkage type!");
239 case Function::PrivateLinkage:
240 case Function::InternalLinkage:
242 case Function::ExternalLinkage:
243 O << "\t.globl\t" << CurrentFnName << "\n";
245 case Function::LinkerPrivateLinkage:
246 case Function::WeakAnyLinkage:
247 case Function::WeakODRLinkage:
248 case Function::LinkOnceAnyLinkage:
249 case Function::LinkOnceODRLinkage:
250 if (Subtarget->isTargetDarwin()) {
251 O << "\t.globl\t" << CurrentFnName << "\n";
252 O << "\t.weak_definition\t" << CurrentFnName << "\n";
254 O << MAI->getWeakRefDirective() << CurrentFnName << "\n";
259 printVisibility(CurrentFnName, F->getVisibility());
261 unsigned FnAlign = 1 << MF.getAlignment(); // MF alignment is log2.
262 if (AFI->isThumbFunction()) {
263 EmitAlignment(FnAlign, F, AFI->getAlign());
264 O << "\t.code\t16\n";
265 O << "\t.thumb_func";
266 if (Subtarget->isTargetDarwin())
267 O << "\t" << CurrentFnName;
270 EmitAlignment(FnAlign, F);
273 O << CurrentFnName << ":\n";
274 // Emit pre-function debug information.
275 DW->BeginFunction(&MF);
277 if (Subtarget->isTargetDarwin()) {
278 // If the function is empty, then we need to emit *something*. Otherwise,
279 // the function's label might be associated with something that it wasn't
280 // meant to be associated with. We emit a noop in this situation.
281 MachineFunction::iterator I = MF.begin();
283 if (++I == MF.end() && MF.front().empty())
287 // Print out code for the function.
288 for (MachineFunction::const_iterator I = MF.begin(), E = MF.end();
290 // Print a label for the basic block.
292 EmitBasicBlockStart(I);
294 // Print the assembly for the instruction.
295 for (MachineBasicBlock::const_iterator II = I->begin(), E = I->end();
297 printMachineInstruction(II);
300 if (MAI->hasDotTypeDotSizeDirective())
301 O << "\t.size " << CurrentFnName << ", .-" << CurrentFnName << "\n";
303 // Emit post-function debug information.
304 DW->EndFunction(&MF);
309 void ARMAsmPrinter::printOperand(const MachineInstr *MI, int OpNum,
310 const char *Modifier) {
311 const MachineOperand &MO = MI->getOperand(OpNum);
312 switch (MO.getType()) {
314 assert(0 && "<unknown operand type>");
315 case MachineOperand::MO_Register: {
316 unsigned Reg = MO.getReg();
317 assert(TargetRegisterInfo::isPhysicalRegister(Reg));
318 if (Modifier && strcmp(Modifier, "dregpair") == 0) {
319 unsigned DRegLo = TRI->getSubReg(Reg, 5); // arm_dsubreg_0
320 unsigned DRegHi = TRI->getSubReg(Reg, 6); // arm_dsubreg_1
322 << getRegisterName(DRegLo) << ',' << getRegisterName(DRegHi)
324 } else if (Modifier && strcmp(Modifier, "lane") == 0) {
325 unsigned RegNum = ARMRegisterInfo::getRegisterNumbering(Reg);
326 unsigned DReg = TRI->getMatchingSuperReg(Reg, RegNum & 1 ? 2 : 1,
327 &ARM::DPR_VFP2RegClass);
328 O << getRegisterName(DReg) << '[' << (RegNum & 1) << ']';
330 O << getRegisterName(Reg);
334 case MachineOperand::MO_Immediate: {
335 int64_t Imm = MO.getImm();
338 if (strcmp(Modifier, "lo16") == 0)
340 else if (strcmp(Modifier, "hi16") == 0)
346 case MachineOperand::MO_MachineBasicBlock:
347 GetMBBSymbol(MO.getMBB()->getNumber())->print(O, MAI);
349 case MachineOperand::MO_GlobalAddress: {
350 bool isCallOp = Modifier && !strcmp(Modifier, "call");
351 GlobalValue *GV = MO.getGlobal();
352 O << Mang->getMangledName(GV);
354 printOffset(MO.getOffset());
356 if (isCallOp && Subtarget->isTargetELF() &&
357 TM.getRelocationModel() == Reloc::PIC_)
361 case MachineOperand::MO_ExternalSymbol: {
362 bool isCallOp = Modifier && !strcmp(Modifier, "call");
363 std::string Name = Mang->makeNameProper(MO.getSymbolName());
366 if (isCallOp && Subtarget->isTargetELF() &&
367 TM.getRelocationModel() == Reloc::PIC_)
371 case MachineOperand::MO_ConstantPoolIndex:
372 O << MAI->getPrivateGlobalPrefix() << "CPI" << getFunctionNumber()
373 << '_' << MO.getIndex();
375 case MachineOperand::MO_JumpTableIndex:
376 O << MAI->getPrivateGlobalPrefix() << "JTI" << getFunctionNumber()
377 << '_' << MO.getIndex();
382 static void printSOImm(formatted_raw_ostream &O, int64_t V, bool VerboseAsm,
383 const MCAsmInfo *MAI) {
384 // Break it up into two parts that make up a shifter immediate.
385 V = ARM_AM::getSOImmVal(V);
386 assert(V != -1 && "Not a valid so_imm value!");
388 unsigned Imm = ARM_AM::getSOImmValImm(V);
389 unsigned Rot = ARM_AM::getSOImmValRot(V);
391 // Print low-level immediate formation info, per
392 // A5.1.3: "Data-processing operands - Immediate".
394 O << "#" << Imm << ", " << Rot;
395 // Pretty printed version.
397 O << ' ' << MAI->getCommentString()
398 << ' ' << (int)ARM_AM::rotr32(Imm, Rot);
404 /// printSOImmOperand - SOImm is 4-bit rotate amount in bits 8-11 with 8-bit
405 /// immediate in bits 0-7.
406 void ARMAsmPrinter::printSOImmOperand(const MachineInstr *MI, int OpNum) {
407 const MachineOperand &MO = MI->getOperand(OpNum);
408 assert(MO.isImm() && "Not a valid so_imm value!");
409 printSOImm(O, MO.getImm(), VerboseAsm, MAI);
412 /// printSOImm2PartOperand - SOImm is broken into two pieces using a 'mov'
413 /// followed by an 'orr' to materialize.
414 void ARMAsmPrinter::printSOImm2PartOperand(const MachineInstr *MI, int OpNum) {
415 const MachineOperand &MO = MI->getOperand(OpNum);
416 assert(MO.isImm() && "Not a valid so_imm value!");
417 unsigned V1 = ARM_AM::getSOImmTwoPartFirst(MO.getImm());
418 unsigned V2 = ARM_AM::getSOImmTwoPartSecond(MO.getImm());
419 printSOImm(O, V1, VerboseAsm, MAI);
421 printPredicateOperand(MI, 2);
427 printSOImm(O, V2, VerboseAsm, MAI);
430 // so_reg is a 4-operand unit corresponding to register forms of the A5.1
431 // "Addressing Mode 1 - Data-processing operands" forms. This includes:
433 // REG REG 0,SH_OPC - e.g. R5, ROR R3
434 // REG 0 IMM,SH_OPC - e.g. R5, LSL #3
435 void ARMAsmPrinter::printSORegOperand(const MachineInstr *MI, int Op) {
436 const MachineOperand &MO1 = MI->getOperand(Op);
437 const MachineOperand &MO2 = MI->getOperand(Op+1);
438 const MachineOperand &MO3 = MI->getOperand(Op+2);
440 O << getRegisterName(MO1.getReg());
442 // Print the shift opc.
444 << ARM_AM::getShiftOpcStr(ARM_AM::getSORegShOp(MO3.getImm()))
448 O << getRegisterName(MO2.getReg());
449 assert(ARM_AM::getSORegOffset(MO3.getImm()) == 0);
451 O << "#" << ARM_AM::getSORegOffset(MO3.getImm());
455 void ARMAsmPrinter::printAddrMode2Operand(const MachineInstr *MI, int Op) {
456 const MachineOperand &MO1 = MI->getOperand(Op);
457 const MachineOperand &MO2 = MI->getOperand(Op+1);
458 const MachineOperand &MO3 = MI->getOperand(Op+2);
460 if (!MO1.isReg()) { // FIXME: This is for CP entries, but isn't right.
461 printOperand(MI, Op);
465 O << "[" << getRegisterName(MO1.getReg());
468 if (ARM_AM::getAM2Offset(MO3.getImm())) // Don't print +0.
470 << (char)ARM_AM::getAM2Op(MO3.getImm())
471 << ARM_AM::getAM2Offset(MO3.getImm());
477 << (char)ARM_AM::getAM2Op(MO3.getImm())
478 << getRegisterName(MO2.getReg());
480 if (unsigned ShImm = ARM_AM::getAM2Offset(MO3.getImm()))
482 << ARM_AM::getShiftOpcStr(ARM_AM::getAM2ShiftOpc(MO3.getImm()))
487 void ARMAsmPrinter::printAddrMode2OffsetOperand(const MachineInstr *MI, int Op){
488 const MachineOperand &MO1 = MI->getOperand(Op);
489 const MachineOperand &MO2 = MI->getOperand(Op+1);
492 unsigned ImmOffs = ARM_AM::getAM2Offset(MO2.getImm());
493 assert(ImmOffs && "Malformed indexed load / store!");
495 << (char)ARM_AM::getAM2Op(MO2.getImm())
500 O << (char)ARM_AM::getAM2Op(MO2.getImm())
501 << getRegisterName(MO1.getReg());
503 if (unsigned ShImm = ARM_AM::getAM2Offset(MO2.getImm()))
505 << ARM_AM::getShiftOpcStr(ARM_AM::getAM2ShiftOpc(MO2.getImm()))
509 void ARMAsmPrinter::printAddrMode3Operand(const MachineInstr *MI, int Op) {
510 const MachineOperand &MO1 = MI->getOperand(Op);
511 const MachineOperand &MO2 = MI->getOperand(Op+1);
512 const MachineOperand &MO3 = MI->getOperand(Op+2);
514 assert(TargetRegisterInfo::isPhysicalRegister(MO1.getReg()));
515 O << "[" << getRegisterName(MO1.getReg());
519 << (char)ARM_AM::getAM3Op(MO3.getImm())
520 << getRegisterName(MO2.getReg())
525 if (unsigned ImmOffs = ARM_AM::getAM3Offset(MO3.getImm()))
527 << (char)ARM_AM::getAM3Op(MO3.getImm())
532 void ARMAsmPrinter::printAddrMode3OffsetOperand(const MachineInstr *MI, int Op){
533 const MachineOperand &MO1 = MI->getOperand(Op);
534 const MachineOperand &MO2 = MI->getOperand(Op+1);
537 O << (char)ARM_AM::getAM3Op(MO2.getImm())
538 << getRegisterName(MO1.getReg());
542 unsigned ImmOffs = ARM_AM::getAM3Offset(MO2.getImm());
543 assert(ImmOffs && "Malformed indexed load / store!");
545 << (char)ARM_AM::getAM3Op(MO2.getImm())
549 void ARMAsmPrinter::printAddrMode4Operand(const MachineInstr *MI, int Op,
550 const char *Modifier) {
551 const MachineOperand &MO1 = MI->getOperand(Op);
552 const MachineOperand &MO2 = MI->getOperand(Op+1);
553 ARM_AM::AMSubMode Mode = ARM_AM::getAM4SubMode(MO2.getImm());
554 if (Modifier && strcmp(Modifier, "submode") == 0) {
555 if (MO1.getReg() == ARM::SP) {
557 bool isLDM = (MI->getOpcode() == ARM::LDM ||
558 MI->getOpcode() == ARM::LDM_RET ||
559 MI->getOpcode() == ARM::t2LDM ||
560 MI->getOpcode() == ARM::t2LDM_RET);
561 O << ARM_AM::getAMSubModeAltStr(Mode, isLDM);
563 O << ARM_AM::getAMSubModeStr(Mode);
564 } else if (Modifier && strcmp(Modifier, "wide") == 0) {
565 ARM_AM::AMSubMode Mode = ARM_AM::getAM4SubMode(MO2.getImm());
566 if (Mode == ARM_AM::ia)
569 printOperand(MI, Op);
570 if (ARM_AM::getAM4WBFlag(MO2.getImm()))
575 void ARMAsmPrinter::printAddrMode5Operand(const MachineInstr *MI, int Op,
576 const char *Modifier) {
577 const MachineOperand &MO1 = MI->getOperand(Op);
578 const MachineOperand &MO2 = MI->getOperand(Op+1);
580 if (!MO1.isReg()) { // FIXME: This is for CP entries, but isn't right.
581 printOperand(MI, Op);
585 assert(TargetRegisterInfo::isPhysicalRegister(MO1.getReg()));
587 if (Modifier && strcmp(Modifier, "submode") == 0) {
588 ARM_AM::AMSubMode Mode = ARM_AM::getAM5SubMode(MO2.getImm());
589 if (MO1.getReg() == ARM::SP) {
590 bool isFLDM = (MI->getOpcode() == ARM::FLDMD ||
591 MI->getOpcode() == ARM::FLDMS);
592 O << ARM_AM::getAMSubModeAltStr(Mode, isFLDM);
594 O << ARM_AM::getAMSubModeStr(Mode);
596 } else if (Modifier && strcmp(Modifier, "base") == 0) {
597 // Used for FSTM{D|S} and LSTM{D|S} operations.
598 O << getRegisterName(MO1.getReg());
599 if (ARM_AM::getAM5WBFlag(MO2.getImm()))
604 O << "[" << getRegisterName(MO1.getReg());
606 if (unsigned ImmOffs = ARM_AM::getAM5Offset(MO2.getImm())) {
608 << (char)ARM_AM::getAM5Op(MO2.getImm())
614 void ARMAsmPrinter::printAddrMode6Operand(const MachineInstr *MI, int Op) {
615 const MachineOperand &MO1 = MI->getOperand(Op);
616 const MachineOperand &MO2 = MI->getOperand(Op+1);
617 const MachineOperand &MO3 = MI->getOperand(Op+2);
619 // FIXME: No support yet for specifying alignment.
620 O << "[" << getRegisterName(MO1.getReg()) << "]";
622 if (ARM_AM::getAM6WBFlag(MO3.getImm())) {
623 if (MO2.getReg() == 0)
626 O << ", " << getRegisterName(MO2.getReg());
630 void ARMAsmPrinter::printAddrModePCOperand(const MachineInstr *MI, int Op,
631 const char *Modifier) {
632 if (Modifier && strcmp(Modifier, "label") == 0) {
633 printPCLabel(MI, Op+1);
637 const MachineOperand &MO1 = MI->getOperand(Op);
638 assert(TargetRegisterInfo::isPhysicalRegister(MO1.getReg()));
639 O << "[pc, +" << getRegisterName(MO1.getReg()) << "]";
643 ARMAsmPrinter::printBitfieldInvMaskImmOperand(const MachineInstr *MI, int Op) {
644 const MachineOperand &MO = MI->getOperand(Op);
645 uint32_t v = ~MO.getImm();
646 int32_t lsb = CountTrailingZeros_32(v);
647 int32_t width = (32 - CountLeadingZeros_32 (v)) - lsb;
648 assert(MO.isImm() && "Not a valid bf_inv_mask_imm value!");
649 O << "#" << lsb << ", #" << width;
652 //===--------------------------------------------------------------------===//
655 ARMAsmPrinter::printThumbITMask(const MachineInstr *MI, int Op) {
656 // (3 - the number of trailing zeros) is the number of then / else.
657 unsigned Mask = MI->getOperand(Op).getImm();
658 unsigned NumTZ = CountTrailingZeros_32(Mask);
659 assert(NumTZ <= 3 && "Invalid IT mask!");
660 for (unsigned Pos = 3, e = NumTZ; Pos > e; --Pos) {
661 bool T = (Mask & (1 << Pos)) == 0;
670 ARMAsmPrinter::printThumbAddrModeRROperand(const MachineInstr *MI, int Op) {
671 const MachineOperand &MO1 = MI->getOperand(Op);
672 const MachineOperand &MO2 = MI->getOperand(Op+1);
673 O << "[" << getRegisterName(MO1.getReg());
674 O << ", " << getRegisterName(MO2.getReg()) << "]";
678 ARMAsmPrinter::printThumbAddrModeRI5Operand(const MachineInstr *MI, int Op,
680 const MachineOperand &MO1 = MI->getOperand(Op);
681 const MachineOperand &MO2 = MI->getOperand(Op+1);
682 const MachineOperand &MO3 = MI->getOperand(Op+2);
684 if (!MO1.isReg()) { // FIXME: This is for CP entries, but isn't right.
685 printOperand(MI, Op);
689 O << "[" << getRegisterName(MO1.getReg());
691 O << ", " << getRegisterName(MO3.getReg());
692 else if (unsigned ImmOffs = MO2.getImm()) {
693 O << ", #" << ImmOffs;
701 ARMAsmPrinter::printThumbAddrModeS1Operand(const MachineInstr *MI, int Op) {
702 printThumbAddrModeRI5Operand(MI, Op, 1);
705 ARMAsmPrinter::printThumbAddrModeS2Operand(const MachineInstr *MI, int Op) {
706 printThumbAddrModeRI5Operand(MI, Op, 2);
709 ARMAsmPrinter::printThumbAddrModeS4Operand(const MachineInstr *MI, int Op) {
710 printThumbAddrModeRI5Operand(MI, Op, 4);
713 void ARMAsmPrinter::printThumbAddrModeSPOperand(const MachineInstr *MI,int Op) {
714 const MachineOperand &MO1 = MI->getOperand(Op);
715 const MachineOperand &MO2 = MI->getOperand(Op+1);
716 O << "[" << getRegisterName(MO1.getReg());
717 if (unsigned ImmOffs = MO2.getImm())
718 O << ", #" << ImmOffs << " * 4";
722 //===--------------------------------------------------------------------===//
724 // Constant shifts t2_so_reg is a 2-operand unit corresponding to the Thumb2
725 // register with shift forms.
727 // REG IMM, SH_OPC - e.g. R5, LSL #3
728 void ARMAsmPrinter::printT2SOOperand(const MachineInstr *MI, int OpNum) {
729 const MachineOperand &MO1 = MI->getOperand(OpNum);
730 const MachineOperand &MO2 = MI->getOperand(OpNum+1);
732 unsigned Reg = MO1.getReg();
733 assert(TargetRegisterInfo::isPhysicalRegister(Reg));
734 O << getRegisterName(Reg);
736 // Print the shift opc.
738 << ARM_AM::getShiftOpcStr(ARM_AM::getSORegShOp(MO2.getImm()))
741 assert(MO2.isImm() && "Not a valid t2_so_reg value!");
742 O << "#" << ARM_AM::getSORegOffset(MO2.getImm());
745 void ARMAsmPrinter::printT2AddrModeImm12Operand(const MachineInstr *MI,
747 const MachineOperand &MO1 = MI->getOperand(OpNum);
748 const MachineOperand &MO2 = MI->getOperand(OpNum+1);
750 O << "[" << getRegisterName(MO1.getReg());
752 unsigned OffImm = MO2.getImm();
753 if (OffImm) // Don't print +0.
754 O << ", #+" << OffImm;
758 void ARMAsmPrinter::printT2AddrModeImm8Operand(const MachineInstr *MI,
760 const MachineOperand &MO1 = MI->getOperand(OpNum);
761 const MachineOperand &MO2 = MI->getOperand(OpNum+1);
763 O << "[" << getRegisterName(MO1.getReg());
765 int32_t OffImm = (int32_t)MO2.getImm();
768 O << ", #-" << -OffImm;
770 O << ", #+" << OffImm;
774 void ARMAsmPrinter::printT2AddrModeImm8s4Operand(const MachineInstr *MI,
776 const MachineOperand &MO1 = MI->getOperand(OpNum);
777 const MachineOperand &MO2 = MI->getOperand(OpNum+1);
779 O << "[" << getRegisterName(MO1.getReg());
781 int32_t OffImm = (int32_t)MO2.getImm() / 4;
784 O << ", #-" << -OffImm << " * 4";
786 O << ", #+" << OffImm << " * 4";
790 void ARMAsmPrinter::printT2AddrModeImm8OffsetOperand(const MachineInstr *MI,
792 const MachineOperand &MO1 = MI->getOperand(OpNum);
793 int32_t OffImm = (int32_t)MO1.getImm();
796 O << "#-" << -OffImm;
801 void ARMAsmPrinter::printT2AddrModeSoRegOperand(const MachineInstr *MI,
803 const MachineOperand &MO1 = MI->getOperand(OpNum);
804 const MachineOperand &MO2 = MI->getOperand(OpNum+1);
805 const MachineOperand &MO3 = MI->getOperand(OpNum+2);
807 O << "[" << getRegisterName(MO1.getReg());
809 assert(MO2.getReg() && "Invalid so_reg load / store address!");
810 O << ", " << getRegisterName(MO2.getReg());
812 unsigned ShAmt = MO3.getImm();
814 assert(ShAmt <= 3 && "Not a valid Thumb2 addressing mode!");
815 O << ", lsl #" << ShAmt;
821 //===--------------------------------------------------------------------===//
823 void ARMAsmPrinter::printPredicateOperand(const MachineInstr *MI, int OpNum) {
824 ARMCC::CondCodes CC = (ARMCC::CondCodes)MI->getOperand(OpNum).getImm();
826 O << ARMCondCodeToString(CC);
829 void ARMAsmPrinter::printSBitModifierOperand(const MachineInstr *MI, int OpNum){
830 unsigned Reg = MI->getOperand(OpNum).getReg();
832 assert(Reg == ARM::CPSR && "Expect ARM CPSR register!");
837 void ARMAsmPrinter::printPCLabel(const MachineInstr *MI, int OpNum) {
838 int Id = (int)MI->getOperand(OpNum).getImm();
839 O << MAI->getPrivateGlobalPrefix() << "PC" << Id;
842 void ARMAsmPrinter::printRegisterList(const MachineInstr *MI, int OpNum) {
844 // Always skip the first operand, it's the optional (and implicit writeback).
845 for (unsigned i = OpNum+1, e = MI->getNumOperands(); i != e; ++i) {
846 if (MI->getOperand(i).isImplicit())
848 if ((int)i != OpNum+1) O << ", ";
854 void ARMAsmPrinter::printCPInstOperand(const MachineInstr *MI, int OpNum,
855 const char *Modifier) {
856 assert(Modifier && "This operand only works with a modifier!");
857 // There are two aspects to a CONSTANTPOOL_ENTRY operand, the label and the
859 if (!strcmp(Modifier, "label")) {
860 unsigned ID = MI->getOperand(OpNum).getImm();
861 O << MAI->getPrivateGlobalPrefix() << "CPI" << getFunctionNumber()
862 << '_' << ID << ":\n";
864 assert(!strcmp(Modifier, "cpentry") && "Unknown modifier for CPE");
865 unsigned CPI = MI->getOperand(OpNum).getIndex();
867 const MachineConstantPoolEntry &MCPE = MCP->getConstants()[CPI];
869 if (MCPE.isMachineConstantPoolEntry()) {
870 EmitMachineConstantPoolValue(MCPE.Val.MachineCPVal);
872 EmitGlobalConstant(MCPE.Val.ConstVal);
877 void ARMAsmPrinter::printJTBlockOperand(const MachineInstr *MI, int OpNum) {
878 assert(!Subtarget->isThumb2() && "Thumb2 should use double-jump jumptables!");
880 const MachineOperand &MO1 = MI->getOperand(OpNum);
881 const MachineOperand &MO2 = MI->getOperand(OpNum+1); // Unique Id
882 unsigned JTI = MO1.getIndex();
883 O << MAI->getPrivateGlobalPrefix() << "JTI" << getFunctionNumber()
884 << '_' << JTI << '_' << MO2.getImm() << ":\n";
886 const char *JTEntryDirective = MAI->getData32bitsDirective();
888 const MachineFunction *MF = MI->getParent()->getParent();
889 const MachineJumpTableInfo *MJTI = MF->getJumpTableInfo();
890 const std::vector<MachineJumpTableEntry> &JT = MJTI->getJumpTables();
891 const std::vector<MachineBasicBlock*> &JTBBs = JT[JTI].MBBs;
892 bool UseSet= MAI->getSetDirective() && TM.getRelocationModel() == Reloc::PIC_;
893 SmallPtrSet<MachineBasicBlock*, 8> JTSets;
894 for (unsigned i = 0, e = JTBBs.size(); i != e; ++i) {
895 MachineBasicBlock *MBB = JTBBs[i];
896 bool isNew = JTSets.insert(MBB);
899 printPICJumpTableSetLabel(JTI, MO2.getImm(), MBB);
901 O << JTEntryDirective << ' ';
903 O << MAI->getPrivateGlobalPrefix() << getFunctionNumber()
904 << '_' << JTI << '_' << MO2.getImm()
905 << "_set_" << MBB->getNumber();
906 else if (TM.getRelocationModel() == Reloc::PIC_) {
907 GetMBBSymbol(MBB->getNumber())->print(O, MAI);
908 O << '-' << MAI->getPrivateGlobalPrefix() << "JTI"
909 << getFunctionNumber() << '_' << JTI << '_' << MO2.getImm();
911 GetMBBSymbol(MBB->getNumber())->print(O, MAI);
918 void ARMAsmPrinter::printJT2BlockOperand(const MachineInstr *MI, int OpNum) {
919 const MachineOperand &MO1 = MI->getOperand(OpNum);
920 const MachineOperand &MO2 = MI->getOperand(OpNum+1); // Unique Id
921 unsigned JTI = MO1.getIndex();
922 O << MAI->getPrivateGlobalPrefix() << "JTI" << getFunctionNumber()
923 << '_' << JTI << '_' << MO2.getImm() << ":\n";
925 const MachineFunction *MF = MI->getParent()->getParent();
926 const MachineJumpTableInfo *MJTI = MF->getJumpTableInfo();
927 const std::vector<MachineJumpTableEntry> &JT = MJTI->getJumpTables();
928 const std::vector<MachineBasicBlock*> &JTBBs = JT[JTI].MBBs;
929 bool ByteOffset = false, HalfWordOffset = false;
930 if (MI->getOpcode() == ARM::t2TBB)
932 else if (MI->getOpcode() == ARM::t2TBH)
933 HalfWordOffset = true;
935 for (unsigned i = 0, e = JTBBs.size(); i != e; ++i) {
936 MachineBasicBlock *MBB = JTBBs[i];
938 O << MAI->getData8bitsDirective();
939 else if (HalfWordOffset)
940 O << MAI->getData16bitsDirective();
941 if (ByteOffset || HalfWordOffset) {
943 GetMBBSymbol(MBB->getNumber())->print(O, MAI);
944 O << "-" << MAI->getPrivateGlobalPrefix() << "JTI" << getFunctionNumber()
945 << '_' << JTI << '_' << MO2.getImm() << ")/2";
948 GetMBBSymbol(MBB->getNumber())->print(O, MAI);
954 // Make sure the instruction that follows TBB is 2-byte aligned.
955 // FIXME: Constant island pass should insert an "ALIGN" instruction instead.
956 if (ByteOffset && (JTBBs.size() & 1)) {
962 void ARMAsmPrinter::printTBAddrMode(const MachineInstr *MI, int OpNum) {
963 O << "[pc, " << getRegisterName(MI->getOperand(OpNum).getReg());
964 if (MI->getOpcode() == ARM::t2TBH)
969 void ARMAsmPrinter::printNoHashImmediate(const MachineInstr *MI, int OpNum) {
970 O << MI->getOperand(OpNum).getImm();
973 bool ARMAsmPrinter::PrintAsmOperand(const MachineInstr *MI, unsigned OpNum,
974 unsigned AsmVariant, const char *ExtraCode){
975 // Does this asm operand have a single letter operand modifier?
976 if (ExtraCode && ExtraCode[0]) {
977 if (ExtraCode[1] != 0) return true; // Unknown modifier.
979 switch (ExtraCode[0]) {
980 default: return true; // Unknown modifier.
981 case 'a': // Print as a memory address.
982 if (MI->getOperand(OpNum).isReg()) {
983 O << "[" << getRegisterName(MI->getOperand(OpNum).getReg()) << "]";
987 case 'c': // Don't print "#" before an immediate operand.
988 if (!MI->getOperand(OpNum).isImm())
990 printNoHashImmediate(MI, OpNum);
992 case 'P': // Print a VFP double precision register.
993 printOperand(MI, OpNum);
996 if (TM.getTargetData()->isLittleEndian())
1000 if (TM.getTargetData()->isBigEndian())
1003 case 'H': // Write second word of DI / DF reference.
1004 // Verify that this operand has two consecutive registers.
1005 if (!MI->getOperand(OpNum).isReg() ||
1006 OpNum+1 == MI->getNumOperands() ||
1007 !MI->getOperand(OpNum+1).isReg())
1009 ++OpNum; // Return the high-part.
1013 printOperand(MI, OpNum);
1017 bool ARMAsmPrinter::PrintAsmMemoryOperand(const MachineInstr *MI,
1018 unsigned OpNum, unsigned AsmVariant,
1019 const char *ExtraCode) {
1020 if (ExtraCode && ExtraCode[0])
1021 return true; // Unknown modifier.
1023 const MachineOperand &MO = MI->getOperand(OpNum);
1024 assert(MO.isReg() && "unexpected inline asm memory operand");
1025 O << "[" << getRegisterName(MO.getReg()) << "]";
1029 void ARMAsmPrinter::printMachineInstruction(const MachineInstr *MI) {
1032 // Call the autogenerated instruction printer routines.
1033 processDebugLoc(MI, true);
1036 printInstructionThroughMCStreamer(MI);
1038 int Opc = MI->getOpcode();
1039 if (Opc == ARM::CONSTPOOL_ENTRY)
1042 printInstruction(MI);
1045 if (VerboseAsm && !MI->getDebugLoc().isUnknown())
1048 processDebugLoc(MI, false);
1051 void ARMAsmPrinter::EmitStartOfAsmFile(Module &M) {
1052 if (Subtarget->isTargetDarwin()) {
1053 Reloc::Model RelocM = TM.getRelocationModel();
1054 if (RelocM == Reloc::PIC_ || RelocM == Reloc::DynamicNoPIC) {
1055 // Declare all the text sections up front (before the DWARF sections
1056 // emitted by AsmPrinter::doInitialization) so the assembler will keep
1057 // them together at the beginning of the object file. This helps
1058 // avoid out-of-range branches that are due a fundamental limitation of
1059 // the way symbol offsets are encoded with the current Darwin ARM
1061 TargetLoweringObjectFileMachO &TLOFMacho =
1062 static_cast<TargetLoweringObjectFileMachO &>(getObjFileLowering());
1063 OutStreamer.SwitchSection(TLOFMacho.getTextSection());
1064 OutStreamer.SwitchSection(TLOFMacho.getTextCoalSection());
1065 OutStreamer.SwitchSection(TLOFMacho.getConstTextCoalSection());
1066 if (RelocM == Reloc::DynamicNoPIC) {
1067 const MCSection *sect =
1068 TLOFMacho.getMachOSection("__TEXT", "__symbol_stub4",
1069 MCSectionMachO::S_SYMBOL_STUBS,
1070 12, SectionKind::getText());
1071 OutStreamer.SwitchSection(sect);
1073 const MCSection *sect =
1074 TLOFMacho.getMachOSection("__TEXT", "__picsymbolstub4",
1075 MCSectionMachO::S_SYMBOL_STUBS,
1076 16, SectionKind::getText());
1077 OutStreamer.SwitchSection(sect);
1082 // Use unified assembler syntax mode for Thumb.
1083 if (Subtarget->isThumb())
1084 O << "\t.syntax unified\n";
1086 // Emit ARM Build Attributes
1087 if (Subtarget->isTargetELF()) {
1089 std::string CPUString = Subtarget->getCPUString();
1090 if (CPUString != "generic")
1091 O << "\t.cpu " << CPUString << '\n';
1093 // FIXME: Emit FPU type
1094 if (Subtarget->hasVFP2())
1095 O << "\t.eabi_attribute " << ARMBuildAttrs::VFP_arch << ", 2\n";
1097 // Signal various FP modes.
1099 O << "\t.eabi_attribute " << ARMBuildAttrs::ABI_FP_denormal << ", 1\n"
1100 << "\t.eabi_attribute " << ARMBuildAttrs::ABI_FP_exceptions << ", 1\n";
1102 if (FiniteOnlyFPMath())
1103 O << "\t.eabi_attribute " << ARMBuildAttrs::ABI_FP_number_model << ", 1\n";
1105 O << "\t.eabi_attribute " << ARMBuildAttrs::ABI_FP_number_model << ", 3\n";
1107 // 8-bytes alignment stuff.
1108 O << "\t.eabi_attribute " << ARMBuildAttrs::ABI_align8_needed << ", 1\n"
1109 << "\t.eabi_attribute " << ARMBuildAttrs::ABI_align8_preserved << ", 1\n";
1111 // Hard float. Use both S and D registers and conform to AAPCS-VFP.
1112 if (Subtarget->isAAPCS_ABI() && FloatABIType == FloatABI::Hard)
1113 O << "\t.eabi_attribute " << ARMBuildAttrs::ABI_HardFP_use << ", 3\n"
1114 << "\t.eabi_attribute " << ARMBuildAttrs::ABI_VFP_args << ", 1\n";
1116 // FIXME: Should we signal R9 usage?
1120 void ARMAsmPrinter::PrintGlobalVariable(const GlobalVariable* GVar) {
1121 const TargetData *TD = TM.getTargetData();
1123 if (!GVar->hasInitializer()) // External global require no code
1126 // Check to see if this is a special global used by LLVM, if so, emit it.
1128 if (EmitSpecialLLVMGlobal(GVar)) {
1129 if (Subtarget->isTargetDarwin() &&
1130 TM.getRelocationModel() == Reloc::Static) {
1131 if (GVar->getName() == "llvm.global_ctors")
1132 O << ".reference .constructors_used\n";
1133 else if (GVar->getName() == "llvm.global_dtors")
1134 O << ".reference .destructors_used\n";
1139 std::string name = Mang->getMangledName(GVar);
1140 Constant *C = GVar->getInitializer();
1141 const Type *Type = C->getType();
1142 unsigned Size = TD->getTypeAllocSize(Type);
1143 unsigned Align = TD->getPreferredAlignmentLog(GVar);
1144 bool isDarwin = Subtarget->isTargetDarwin();
1146 printVisibility(name, GVar->getVisibility());
1148 if (Subtarget->isTargetELF())
1149 O << "\t.type " << name << ",%object\n";
1151 const MCSection *TheSection =
1152 getObjFileLowering().SectionForGlobal(GVar, Mang, TM);
1153 OutStreamer.SwitchSection(TheSection);
1155 // FIXME: get this stuff from section kind flags.
1156 if (C->isNullValue() && !GVar->hasSection() && !GVar->isThreadLocal() &&
1157 // Don't put things that should go in the cstring section into "comm".
1158 !TheSection->getKind().isMergeableCString()) {
1159 if (GVar->hasExternalLinkage()) {
1160 if (const char *Directive = MAI->getZeroFillDirective()) {
1161 O << "\t.globl\t" << name << "\n";
1162 O << Directive << "__DATA, __common, " << name << ", "
1163 << Size << ", " << Align << "\n";
1168 if (GVar->hasLocalLinkage() || GVar->isWeakForLinker()) {
1169 if (Size == 0) Size = 1; // .comm Foo, 0 is undefined, avoid it.
1172 if (GVar->hasLocalLinkage()) {
1173 O << MAI->getLCOMMDirective() << name << "," << Size
1175 } else if (GVar->hasCommonLinkage()) {
1176 O << MAI->getCOMMDirective() << name << "," << Size
1179 OutStreamer.SwitchSection(TheSection);
1180 O << "\t.globl " << name << '\n'
1181 << MAI->getWeakDefDirective() << name << '\n';
1182 EmitAlignment(Align, GVar);
1185 O << "\t\t\t\t" << MAI->getCommentString() << ' ';
1186 WriteAsOperand(O, GVar, /*PrintType=*/false, GVar->getParent());
1189 EmitGlobalConstant(C);
1192 } else if (MAI->getLCOMMDirective() != NULL) {
1193 if (GVar->hasLocalLinkage()) {
1194 O << MAI->getLCOMMDirective() << name << "," << Size;
1196 O << MAI->getCOMMDirective() << name << "," << Size;
1197 if (MAI->getCOMMDirectiveTakesAlignment())
1198 O << ',' << (MAI->getAlignmentIsInBytes() ? (1 << Align) : Align);
1201 if (GVar->hasLocalLinkage())
1202 O << "\t.local\t" << name << "\n";
1203 O << MAI->getCOMMDirective() << name << "," << Size;
1204 if (MAI->getCOMMDirectiveTakesAlignment())
1205 O << "," << (MAI->getAlignmentIsInBytes() ? (1 << Align) : Align);
1208 O << "\t\t" << MAI->getCommentString() << " ";
1209 WriteAsOperand(O, GVar, /*PrintType=*/false, GVar->getParent());
1216 switch (GVar->getLinkage()) {
1217 case GlobalValue::CommonLinkage:
1218 case GlobalValue::LinkOnceAnyLinkage:
1219 case GlobalValue::LinkOnceODRLinkage:
1220 case GlobalValue::WeakAnyLinkage:
1221 case GlobalValue::WeakODRLinkage:
1222 case GlobalValue::LinkerPrivateLinkage:
1224 O << "\t.globl " << name << "\n"
1225 << "\t.weak_definition " << name << "\n";
1227 O << "\t.weak " << name << "\n";
1230 case GlobalValue::AppendingLinkage:
1231 // FIXME: appending linkage variables should go into a section of
1232 // their name or something. For now, just emit them as external.
1233 case GlobalValue::ExternalLinkage:
1234 O << "\t.globl " << name << "\n";
1236 case GlobalValue::PrivateLinkage:
1237 case GlobalValue::InternalLinkage:
1240 llvm_unreachable("Unknown linkage type!");
1243 EmitAlignment(Align, GVar);
1246 O << "\t\t\t\t" << MAI->getCommentString() << " ";
1247 WriteAsOperand(O, GVar, /*PrintType=*/false, GVar->getParent());
1250 if (MAI->hasDotTypeDotSizeDirective())
1251 O << "\t.size " << name << ", " << Size << "\n";
1253 EmitGlobalConstant(C);
1258 void ARMAsmPrinter::EmitEndOfAsmFile(Module &M) {
1259 if (Subtarget->isTargetDarwin()) {
1260 // All darwin targets use mach-o.
1261 TargetLoweringObjectFileMachO &TLOFMacho =
1262 static_cast<TargetLoweringObjectFileMachO &>(getObjFileLowering());
1263 MachineModuleInfoMachO &MMIMacho =
1264 MMI->getObjFileInfo<MachineModuleInfoMachO>();
1268 // Output non-lazy-pointers for external and common global variables.
1269 MachineModuleInfoMachO::SymbolListTy Stubs = MMIMacho.GetGVStubList();
1271 if (!Stubs.empty()) {
1272 // Switch with ".non_lazy_symbol_pointer" directive.
1273 OutStreamer.SwitchSection(TLOFMacho.getNonLazySymbolPointerSection());
1275 for (unsigned i = 0, e = Stubs.size(); i != e; ++i) {
1276 Stubs[i].first->print(O, MAI);
1277 O << ":\n\t.indirect_symbol ";
1278 Stubs[i].second->print(O, MAI);
1279 O << "\n\t.long\t0\n";
1283 Stubs = MMIMacho.GetHiddenGVStubList();
1284 if (!Stubs.empty()) {
1285 OutStreamer.SwitchSection(getObjFileLowering().getDataSection());
1287 for (unsigned i = 0, e = Stubs.size(); i != e; ++i) {
1288 Stubs[i].first->print(O, MAI);
1290 Stubs[i].second->print(O, MAI);
1295 // Funny Darwin hack: This flag tells the linker that no global symbols
1296 // contain code that falls through to other global symbols (e.g. the obvious
1297 // implementation of multiple entry points). If this doesn't occur, the
1298 // linker can safely perform dead code stripping. Since LLVM never
1299 // generates code that does this, it is always safe to set.
1300 OutStreamer.EmitAssemblerFlag(MCStreamer::SubsectionsViaSymbols);
1304 // Force static initialization.
1305 extern "C" void LLVMInitializeARMAsmPrinter() {
1306 RegisterAsmPrinter<ARMAsmPrinter> X(TheARMTarget);
1307 RegisterAsmPrinter<ARMAsmPrinter> Y(TheThumbTarget);
1311 //===----------------------------------------------------------------------===//
1313 void ARMAsmPrinter::printInstructionThroughMCStreamer(const MachineInstr *MI) {
1314 ARMMCInstLower MCInstLowering(OutContext, *Mang, getFunctionNumber(), *MAI);
1315 switch (MI->getOpcode()) {
1317 case TargetInstrInfo::DBG_LABEL:
1318 case TargetInstrInfo::EH_LABEL:
1319 case TargetInstrInfo::GC_LABEL:
1322 case TargetInstrInfo::KILL:
1324 case TargetInstrInfo::INLINEASM:
1328 case TargetInstrInfo::IMPLICIT_DEF:
1329 printImplicitDef(MI);
1331 case ARM::PICADD: { // FIXME: Remove asm string from td file.
1332 // This is a pseudo op for a label + instruction sequence, which looks like:
1335 // This adds the address of LPC0 to r0.
1338 // FIXME: MOVE TO SHARED PLACE.
1339 SmallString<60> Name;
1340 unsigned Id = (unsigned)MI->getOperand(2).getImm();
1341 raw_svector_ostream(Name) << MAI->getPrivateGlobalPrefix() << "PC" << Id;
1342 OutStreamer.EmitLabel(OutContext.GetOrCreateSymbol(Name.str()));
1345 // Form and emit tha dd.
1347 AddInst.setOpcode(ARM::ADDrr);
1348 AddInst.addOperand(MCOperand::CreateReg(MI->getOperand(0).getReg()));
1349 AddInst.addOperand(MCOperand::CreateReg(ARM::PC));
1350 AddInst.addOperand(MCOperand::CreateReg(MI->getOperand(1).getReg()));
1351 printMCInst(&AddInst);
1354 case ARM::CONSTPOOL_ENTRY: { // FIXME: Remove asm string from td file.
1355 /// CONSTPOOL_ENTRY - This instruction represents a floating constant pool
1356 /// in the function. The first operand is the ID# for this instruction, the
1357 /// second is the index into the MachineConstantPool that this is, the third
1358 /// is the size in bytes of this constant pool entry.
1359 unsigned LabelId = (unsigned)MI->getOperand(0).getImm();
1360 unsigned CPIdx = (unsigned)MI->getOperand(1).getIndex();
1364 O << MAI->getPrivateGlobalPrefix() << "CPI" << getFunctionNumber()
1365 << '_' << LabelId << ":\n";
1367 const MachineConstantPoolEntry &MCPE = MCP->getConstants()[CPIdx];
1368 if (MCPE.isMachineConstantPoolEntry())
1369 EmitMachineConstantPoolValue(MCPE.Val.MachineCPVal);
1371 EmitGlobalConstant(MCPE.Val.ConstVal);
1378 MCInstLowering.Lower(MI, TmpInst);
1380 printMCInst(&TmpInst);