1 //===-- ARMAsmPrinter.cpp - ARM LLVM assembly writer ----------------------===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file contains a printer that converts from our internal representation
11 // of machine-dependent LLVM code to GAS-format ARM assembly language.
13 //===----------------------------------------------------------------------===//
15 #define DEBUG_TYPE "asm-printer"
17 #include "ARMBuildAttrs.h"
18 #include "ARMTargetMachine.h"
19 #include "ARMAddressingModes.h"
20 #include "ARMConstantPoolValue.h"
21 #include "ARMMachineFunctionInfo.h"
22 #include "llvm/Constants.h"
23 #include "llvm/Module.h"
24 #include "llvm/MDNode.h"
25 #include "llvm/CodeGen/AsmPrinter.h"
26 #include "llvm/CodeGen/DwarfWriter.h"
27 #include "llvm/CodeGen/MachineModuleInfo.h"
28 #include "llvm/CodeGen/MachineFunctionPass.h"
29 #include "llvm/CodeGen/MachineJumpTableInfo.h"
30 #include "llvm/Target/TargetAsmInfo.h"
31 #include "llvm/Target/TargetData.h"
32 #include "llvm/Target/TargetMachine.h"
33 #include "llvm/Target/TargetOptions.h"
34 #include "llvm/Target/TargetRegistry.h"
35 #include "llvm/ADT/Statistic.h"
36 #include "llvm/ADT/StringExtras.h"
37 #include "llvm/ADT/StringSet.h"
38 #include "llvm/Support/Compiler.h"
39 #include "llvm/Support/ErrorHandling.h"
40 #include "llvm/Support/Mangler.h"
41 #include "llvm/Support/MathExtras.h"
42 #include "llvm/Support/FormattedStream.h"
46 STATISTIC(EmittedInsts, "Number of machine instrs printed");
49 class VISIBILITY_HIDDEN ARMAsmPrinter : public AsmPrinter {
52 /// Subtarget - Keep a pointer to the ARMSubtarget around so that we can
53 /// make the right decision when printing asm code for different targets.
54 const ARMSubtarget *Subtarget;
56 /// AFI - Keep a pointer to ARMFunctionInfo for the current
60 /// MCP - Keep a pointer to constantpool entries of the current
62 const MachineConstantPool *MCP;
64 /// We name each basic block in a Function with a unique number, so
65 /// that we can consistently refer to them later. This is cleared
66 /// at the beginning of each call to runOnMachineFunction().
68 typedef std::map<const Value *, unsigned> ValueMapTy;
69 ValueMapTy NumberForBB;
71 /// GVNonLazyPtrs - Keeps the set of GlobalValues that require
72 /// non-lazy-pointers for indirect access.
73 StringMap<std::string> GVNonLazyPtrs;
75 /// HiddenGVNonLazyPtrs - Keeps the set of GlobalValues with hidden
76 /// visibility that require non-lazy-pointers for indirect access.
77 StringMap<std::string> HiddenGVNonLazyPtrs;
80 std::string Stub, LazyPtr, SLP, SCV;
84 void Init(const GlobalValue *GV, Mangler *Mang) {
85 // Already initialized.
86 if (!Stub.empty()) return;
87 Stub = Mang->getMangledName(GV, "$stub", true);
88 LazyPtr = Mang->getMangledName(GV, "$lazy_ptr", true);
89 SLP = Mang->getMangledName(GV, "$slp", true);
90 SCV = Mang->getMangledName(GV, "$scv", true);
93 void Init(const std::string &GV, Mangler *Mang) {
94 // Already initialized.
95 if (!Stub.empty()) return;
96 Stub = Mang->makeNameProper(GV + "$stub", Mangler::Private);
97 LazyPtr = Mang->makeNameProper(GV + "$lazy_ptr", Mangler::Private);
98 SLP = Mang->makeNameProper(GV + "$slp", Mangler::Private);
99 SCV = Mang->makeNameProper(GV + "$scv", Mangler::Private);
103 /// FnStubs - Keeps the set of external function GlobalAddresses that the
104 /// asm printer should generate stubs for.
105 StringMap<FnStubInfo> FnStubs;
107 /// True if asm printer is printing a series of CONSTPOOL_ENTRY.
110 explicit ARMAsmPrinter(formatted_raw_ostream &O, TargetMachine &TM,
111 const TargetAsmInfo *T, bool V)
112 : AsmPrinter(O, TM, T, V), DW(0), AFI(NULL), MCP(NULL),
114 Subtarget = &TM.getSubtarget<ARMSubtarget>();
117 virtual const char *getPassName() const {
118 return "ARM Assembly Printer";
121 void printOperand(const MachineInstr *MI, int OpNum,
122 const char *Modifier = 0);
123 void printSOImmOperand(const MachineInstr *MI, int OpNum);
124 void printSOImm2PartOperand(const MachineInstr *MI, int OpNum);
125 void printSORegOperand(const MachineInstr *MI, int OpNum);
126 void printAddrMode2Operand(const MachineInstr *MI, int OpNum);
127 void printAddrMode2OffsetOperand(const MachineInstr *MI, int OpNum);
128 void printAddrMode3Operand(const MachineInstr *MI, int OpNum);
129 void printAddrMode3OffsetOperand(const MachineInstr *MI, int OpNum);
130 void printAddrMode4Operand(const MachineInstr *MI, int OpNum,
131 const char *Modifier = 0);
132 void printAddrMode5Operand(const MachineInstr *MI, int OpNum,
133 const char *Modifier = 0);
134 void printAddrMode6Operand(const MachineInstr *MI, int OpNum);
135 void printAddrModePCOperand(const MachineInstr *MI, int OpNum,
136 const char *Modifier = 0);
137 void printBitfieldInvMaskImmOperand (const MachineInstr *MI, int OpNum);
139 void printThumbITMask(const MachineInstr *MI, int OpNum);
140 void printThumbAddrModeRROperand(const MachineInstr *MI, int OpNum);
141 void printThumbAddrModeRI5Operand(const MachineInstr *MI, int OpNum,
143 void printThumbAddrModeS1Operand(const MachineInstr *MI, int OpNum);
144 void printThumbAddrModeS2Operand(const MachineInstr *MI, int OpNum);
145 void printThumbAddrModeS4Operand(const MachineInstr *MI, int OpNum);
146 void printThumbAddrModeSPOperand(const MachineInstr *MI, int OpNum);
148 void printT2SOOperand(const MachineInstr *MI, int OpNum);
149 void printT2AddrModeImm12Operand(const MachineInstr *MI, int OpNum);
150 void printT2AddrModeImm8Operand(const MachineInstr *MI, int OpNum);
151 void printT2AddrModeImm8s4Operand(const MachineInstr *MI, int OpNum);
152 void printT2AddrModeImm8OffsetOperand(const MachineInstr *MI, int OpNum);
153 void printT2AddrModeSoRegOperand(const MachineInstr *MI, int OpNum);
155 void printPredicateOperand(const MachineInstr *MI, int OpNum);
156 void printSBitModifierOperand(const MachineInstr *MI, int OpNum);
157 void printPCLabel(const MachineInstr *MI, int OpNum);
158 void printRegisterList(const MachineInstr *MI, int OpNum);
159 void printCPInstOperand(const MachineInstr *MI, int OpNum,
160 const char *Modifier);
161 void printJTBlockOperand(const MachineInstr *MI, int OpNum);
163 virtual bool PrintAsmOperand(const MachineInstr *MI, unsigned OpNum,
164 unsigned AsmVariant, const char *ExtraCode);
165 virtual bool PrintAsmMemoryOperand(const MachineInstr *MI, unsigned OpNum,
167 const char *ExtraCode);
169 void PrintGlobalVariable(const GlobalVariable* GVar);
170 bool printInstruction(const MachineInstr *MI); // autogenerated.
171 void printMachineInstruction(const MachineInstr *MI);
172 bool runOnMachineFunction(MachineFunction &F);
173 bool doInitialization(Module &M);
174 bool doFinalization(Module &M);
176 /// EmitMachineConstantPoolValue - Print a machine constantpool value to
178 virtual void EmitMachineConstantPoolValue(MachineConstantPoolValue *MCPV) {
179 printDataDirective(MCPV->getType());
181 ARMConstantPoolValue *ACPV = static_cast<ARMConstantPoolValue*>(MCPV);
182 GlobalValue *GV = ACPV->getGV();
186 if (ACPV->isNonLazyPointer()) {
187 std::string SymName = Mang->getMangledName(GV);
188 Name = Mang->getMangledName(GV, "$non_lazy_ptr", true);
190 if (GV->hasHiddenVisibility())
191 HiddenGVNonLazyPtrs[SymName] = Name;
193 GVNonLazyPtrs[SymName] = Name;
194 } else if (ACPV->isStub()) {
196 FnStubInfo &FnInfo = FnStubs[Mang->getMangledName(GV)];
197 FnInfo.Init(GV, Mang);
200 FnStubInfo &FnInfo = FnStubs[Mang->makeNameProper(ACPV->getSymbol())];
201 FnInfo.Init(ACPV->getSymbol(), Mang);
206 Name = Mang->getMangledName(GV);
208 Name = Mang->makeNameProper(ACPV->getSymbol());
214 if (ACPV->hasModifier()) O << "(" << ACPV->getModifier() << ")";
215 if (ACPV->getPCAdjustment() != 0) {
216 O << "-(" << TAI->getPrivateGlobalPrefix() << "PC"
217 << utostr(ACPV->getLabelId())
218 << "+" << (unsigned)ACPV->getPCAdjustment();
219 if (ACPV->mustAddCurrentAddress())
226 void getAnalysisUsage(AnalysisUsage &AU) const {
227 AsmPrinter::getAnalysisUsage(AU);
228 AU.setPreservesAll();
229 AU.addRequired<MachineModuleInfo>();
230 AU.addRequired<DwarfWriter>();
233 } // end of anonymous namespace
235 #include "ARMGenAsmWriter.inc"
237 /// runOnMachineFunction - This uses the printInstruction()
238 /// method to print assembly for each instruction.
240 bool ARMAsmPrinter::runOnMachineFunction(MachineFunction &MF) {
243 AFI = MF.getInfo<ARMFunctionInfo>();
244 MCP = MF.getConstantPool();
246 SetupMachineFunction(MF);
249 // NOTE: we don't print out constant pools here, they are handled as
253 // Print out labels for the function.
254 const Function *F = MF.getFunction();
255 switch (F->getLinkage()) {
256 default: llvm_unreachable("Unknown linkage type!");
257 case Function::PrivateLinkage:
258 case Function::LinkerPrivateLinkage:
259 case Function::InternalLinkage:
260 SwitchToTextSection("\t.text", F);
262 case Function::ExternalLinkage:
263 SwitchToTextSection("\t.text", F);
264 O << "\t.globl\t" << CurrentFnName << "\n";
266 case Function::WeakAnyLinkage:
267 case Function::WeakODRLinkage:
268 case Function::LinkOnceAnyLinkage:
269 case Function::LinkOnceODRLinkage:
270 if (Subtarget->isTargetDarwin()) {
272 ".section __TEXT,__textcoal_nt,coalesced,pure_instructions", F);
273 O << "\t.globl\t" << CurrentFnName << "\n";
274 O << "\t.weak_definition\t" << CurrentFnName << "\n";
276 O << TAI->getWeakRefDirective() << CurrentFnName << "\n";
281 printVisibility(CurrentFnName, F->getVisibility());
283 if (AFI->isThumbFunction()) {
284 EmitAlignment(MF.getAlignment(), F, AFI->getAlign());
285 O << "\t.code\t16\n";
286 O << "\t.thumb_func";
287 if (Subtarget->isTargetDarwin())
288 O << "\t" << CurrentFnName;
292 EmitAlignment(MF.getAlignment(), F);
295 O << CurrentFnName << ":\n";
296 // Emit pre-function debug information.
297 DW->BeginFunction(&MF);
299 if (Subtarget->isTargetDarwin()) {
300 // If the function is empty, then we need to emit *something*. Otherwise,
301 // the function's label might be associated with something that it wasn't
302 // meant to be associated with. We emit a noop in this situation.
303 MachineFunction::iterator I = MF.begin();
305 if (++I == MF.end() && MF.front().empty())
309 // Print out code for the function.
310 for (MachineFunction::const_iterator I = MF.begin(), E = MF.end();
312 // Print a label for the basic block.
313 if (I != MF.begin()) {
314 printBasicBlockLabel(I, true, true, VerboseAsm);
317 for (MachineBasicBlock::const_iterator II = I->begin(), E = I->end();
319 // Print the assembly for the instruction.
320 printMachineInstruction(II);
324 if (TAI->hasDotTypeDotSizeDirective())
325 O << "\t.size " << CurrentFnName << ", .-" << CurrentFnName << "\n";
327 // Emit post-function debug information.
328 DW->EndFunction(&MF);
335 void ARMAsmPrinter::printOperand(const MachineInstr *MI, int OpNum,
336 const char *Modifier) {
337 const MachineOperand &MO = MI->getOperand(OpNum);
338 switch (MO.getType()) {
339 case MachineOperand::MO_Register: {
340 unsigned Reg = MO.getReg();
341 if (TargetRegisterInfo::isPhysicalRegister(Reg)) {
342 if (Modifier && strcmp(Modifier, "dregpair") == 0) {
343 unsigned DRegLo = TRI->getSubReg(Reg, 5); // arm_dsubreg_0
344 unsigned DRegHi = TRI->getSubReg(Reg, 6); // arm_dsubreg_1
346 << TRI->getAsmName(DRegLo) << ',' << TRI->getAsmName(DRegHi)
348 } else if (Modifier && strcmp(Modifier, "dregsingle") == 0) {
349 O << '{' << TRI->getAsmName(Reg) << '}';
351 O << TRI->getAsmName(Reg);
354 llvm_unreachable("not implemented");
357 case MachineOperand::MO_Immediate: {
358 if (!Modifier || strcmp(Modifier, "no_hash") != 0)
364 case MachineOperand::MO_MachineBasicBlock:
365 printBasicBlockLabel(MO.getMBB());
367 case MachineOperand::MO_GlobalAddress: {
368 bool isCallOp = Modifier && !strcmp(Modifier, "call");
369 GlobalValue *GV = MO.getGlobal();
371 bool isExt = GV->isDeclaration() || GV->isWeakForLinker();
372 if (isExt && isCallOp && Subtarget->isTargetDarwin() &&
373 TM.getRelocationModel() != Reloc::Static) {
374 FnStubInfo &FnInfo = FnStubs[Mang->getMangledName(GV)];
375 FnInfo.Init(GV, Mang);
378 Name = Mang->getMangledName(GV);
383 printOffset(MO.getOffset());
385 if (isCallOp && Subtarget->isTargetELF() &&
386 TM.getRelocationModel() == Reloc::PIC_)
390 case MachineOperand::MO_ExternalSymbol: {
391 bool isCallOp = Modifier && !strcmp(Modifier, "call");
393 if (isCallOp && Subtarget->isTargetDarwin() &&
394 TM.getRelocationModel() != Reloc::Static) {
395 FnStubInfo &FnInfo = FnStubs[Mang->makeNameProper(MO.getSymbolName())];
396 FnInfo.Init(MO.getSymbolName(), Mang);
399 Name = Mang->makeNameProper(MO.getSymbolName());
402 if (isCallOp && Subtarget->isTargetELF() &&
403 TM.getRelocationModel() == Reloc::PIC_)
407 case MachineOperand::MO_ConstantPoolIndex:
408 O << TAI->getPrivateGlobalPrefix() << "CPI" << getFunctionNumber()
409 << '_' << MO.getIndex();
411 case MachineOperand::MO_JumpTableIndex:
412 O << TAI->getPrivateGlobalPrefix() << "JTI" << getFunctionNumber()
413 << '_' << MO.getIndex();
416 O << "<unknown operand type>"; abort (); break;
420 static void printSOImm(formatted_raw_ostream &O, int64_t V, bool VerboseAsm,
421 const TargetAsmInfo *TAI) {
422 // Break it up into two parts that make up a shifter immediate.
423 V = ARM_AM::getSOImmVal(V);
424 assert(V != -1 && "Not a valid so_imm value!");
426 unsigned Imm = ARM_AM::getSOImmValImm(V);
427 unsigned Rot = ARM_AM::getSOImmValRot(V);
429 // Print low-level immediate formation info, per
430 // A5.1.3: "Data-processing operands - Immediate".
432 O << "#" << Imm << ", " << Rot;
433 // Pretty printed version.
435 O << ' ' << TAI->getCommentString()
436 << ' ' << (int)ARM_AM::rotr32(Imm, Rot);
442 /// printSOImmOperand - SOImm is 4-bit rotate amount in bits 8-11 with 8-bit
443 /// immediate in bits 0-7.
444 void ARMAsmPrinter::printSOImmOperand(const MachineInstr *MI, int OpNum) {
445 const MachineOperand &MO = MI->getOperand(OpNum);
446 assert(MO.isImm() && "Not a valid so_imm value!");
447 printSOImm(O, MO.getImm(), VerboseAsm, TAI);
450 /// printSOImm2PartOperand - SOImm is broken into two pieces using a 'mov'
451 /// followed by an 'orr' to materialize.
452 void ARMAsmPrinter::printSOImm2PartOperand(const MachineInstr *MI, int OpNum) {
453 const MachineOperand &MO = MI->getOperand(OpNum);
454 assert(MO.isImm() && "Not a valid so_imm value!");
455 unsigned V1 = ARM_AM::getSOImmTwoPartFirst(MO.getImm());
456 unsigned V2 = ARM_AM::getSOImmTwoPartSecond(MO.getImm());
457 printSOImm(O, V1, VerboseAsm, TAI);
459 printPredicateOperand(MI, 2);
465 printSOImm(O, V2, VerboseAsm, TAI);
468 // so_reg is a 4-operand unit corresponding to register forms of the A5.1
469 // "Addressing Mode 1 - Data-processing operands" forms. This includes:
471 // REG REG 0,SH_OPC - e.g. R5, ROR R3
472 // REG 0 IMM,SH_OPC - e.g. R5, LSL #3
473 void ARMAsmPrinter::printSORegOperand(const MachineInstr *MI, int Op) {
474 const MachineOperand &MO1 = MI->getOperand(Op);
475 const MachineOperand &MO2 = MI->getOperand(Op+1);
476 const MachineOperand &MO3 = MI->getOperand(Op+2);
478 assert(TargetRegisterInfo::isPhysicalRegister(MO1.getReg()));
479 O << TRI->getAsmName(MO1.getReg());
481 // Print the shift opc.
483 << ARM_AM::getShiftOpcStr(ARM_AM::getSORegShOp(MO3.getImm()))
487 assert(TargetRegisterInfo::isPhysicalRegister(MO2.getReg()));
488 O << TRI->getAsmName(MO2.getReg());
489 assert(ARM_AM::getSORegOffset(MO3.getImm()) == 0);
491 O << "#" << ARM_AM::getSORegOffset(MO3.getImm());
495 void ARMAsmPrinter::printAddrMode2Operand(const MachineInstr *MI, int Op) {
496 const MachineOperand &MO1 = MI->getOperand(Op);
497 const MachineOperand &MO2 = MI->getOperand(Op+1);
498 const MachineOperand &MO3 = MI->getOperand(Op+2);
500 if (!MO1.isReg()) { // FIXME: This is for CP entries, but isn't right.
501 printOperand(MI, Op);
505 O << "[" << TRI->getAsmName(MO1.getReg());
508 if (ARM_AM::getAM2Offset(MO3.getImm())) // Don't print +0.
510 << (char)ARM_AM::getAM2Op(MO3.getImm())
511 << ARM_AM::getAM2Offset(MO3.getImm());
517 << (char)ARM_AM::getAM2Op(MO3.getImm())
518 << TRI->getAsmName(MO2.getReg());
520 if (unsigned ShImm = ARM_AM::getAM2Offset(MO3.getImm()))
522 << ARM_AM::getShiftOpcStr(ARM_AM::getAM2ShiftOpc(MO3.getImm()))
527 void ARMAsmPrinter::printAddrMode2OffsetOperand(const MachineInstr *MI, int Op){
528 const MachineOperand &MO1 = MI->getOperand(Op);
529 const MachineOperand &MO2 = MI->getOperand(Op+1);
532 unsigned ImmOffs = ARM_AM::getAM2Offset(MO2.getImm());
533 assert(ImmOffs && "Malformed indexed load / store!");
535 << (char)ARM_AM::getAM2Op(MO2.getImm())
540 O << (char)ARM_AM::getAM2Op(MO2.getImm())
541 << TRI->getAsmName(MO1.getReg());
543 if (unsigned ShImm = ARM_AM::getAM2Offset(MO2.getImm()))
545 << ARM_AM::getShiftOpcStr(ARM_AM::getAM2ShiftOpc(MO2.getImm()))
549 void ARMAsmPrinter::printAddrMode3Operand(const MachineInstr *MI, int Op) {
550 const MachineOperand &MO1 = MI->getOperand(Op);
551 const MachineOperand &MO2 = MI->getOperand(Op+1);
552 const MachineOperand &MO3 = MI->getOperand(Op+2);
554 assert(TargetRegisterInfo::isPhysicalRegister(MO1.getReg()));
555 O << "[" << TRI->getAsmName(MO1.getReg());
559 << (char)ARM_AM::getAM3Op(MO3.getImm())
560 << TRI->getAsmName(MO2.getReg())
565 if (unsigned ImmOffs = ARM_AM::getAM3Offset(MO3.getImm()))
567 << (char)ARM_AM::getAM3Op(MO3.getImm())
572 void ARMAsmPrinter::printAddrMode3OffsetOperand(const MachineInstr *MI, int Op){
573 const MachineOperand &MO1 = MI->getOperand(Op);
574 const MachineOperand &MO2 = MI->getOperand(Op+1);
577 O << (char)ARM_AM::getAM3Op(MO2.getImm())
578 << TRI->getAsmName(MO1.getReg());
582 unsigned ImmOffs = ARM_AM::getAM3Offset(MO2.getImm());
583 assert(ImmOffs && "Malformed indexed load / store!");
585 << (char)ARM_AM::getAM3Op(MO2.getImm())
589 void ARMAsmPrinter::printAddrMode4Operand(const MachineInstr *MI, int Op,
590 const char *Modifier) {
591 const MachineOperand &MO1 = MI->getOperand(Op);
592 const MachineOperand &MO2 = MI->getOperand(Op+1);
593 ARM_AM::AMSubMode Mode = ARM_AM::getAM4SubMode(MO2.getImm());
594 if (Modifier && strcmp(Modifier, "submode") == 0) {
595 if (MO1.getReg() == ARM::SP) {
596 bool isLDM = (MI->getOpcode() == ARM::LDM ||
597 MI->getOpcode() == ARM::LDM_RET);
598 O << ARM_AM::getAMSubModeAltStr(Mode, isLDM);
600 O << ARM_AM::getAMSubModeStr(Mode);
602 printOperand(MI, Op);
603 if (ARM_AM::getAM4WBFlag(MO2.getImm()))
608 void ARMAsmPrinter::printAddrMode5Operand(const MachineInstr *MI, int Op,
609 const char *Modifier) {
610 const MachineOperand &MO1 = MI->getOperand(Op);
611 const MachineOperand &MO2 = MI->getOperand(Op+1);
613 if (!MO1.isReg()) { // FIXME: This is for CP entries, but isn't right.
614 printOperand(MI, Op);
618 assert(TargetRegisterInfo::isPhysicalRegister(MO1.getReg()));
620 if (Modifier && strcmp(Modifier, "submode") == 0) {
621 ARM_AM::AMSubMode Mode = ARM_AM::getAM5SubMode(MO2.getImm());
622 if (MO1.getReg() == ARM::SP) {
623 bool isFLDM = (MI->getOpcode() == ARM::FLDMD ||
624 MI->getOpcode() == ARM::FLDMS);
625 O << ARM_AM::getAMSubModeAltStr(Mode, isFLDM);
627 O << ARM_AM::getAMSubModeStr(Mode);
629 } else if (Modifier && strcmp(Modifier, "base") == 0) {
630 // Used for FSTM{D|S} and LSTM{D|S} operations.
631 O << TRI->getAsmName(MO1.getReg());
632 if (ARM_AM::getAM5WBFlag(MO2.getImm()))
637 O << "[" << TRI->getAsmName(MO1.getReg());
639 if (unsigned ImmOffs = ARM_AM::getAM5Offset(MO2.getImm())) {
641 << (char)ARM_AM::getAM5Op(MO2.getImm())
647 void ARMAsmPrinter::printAddrMode6Operand(const MachineInstr *MI, int Op) {
648 const MachineOperand &MO1 = MI->getOperand(Op);
649 const MachineOperand &MO2 = MI->getOperand(Op+1);
650 const MachineOperand &MO3 = MI->getOperand(Op+2);
652 // FIXME: No support yet for specifying alignment.
653 O << "[" << TRI->getAsmName(MO1.getReg()) << "]";
655 if (ARM_AM::getAM6WBFlag(MO3.getImm())) {
656 if (MO2.getReg() == 0)
659 O << ", " << TRI->getAsmName(MO2.getReg());
663 void ARMAsmPrinter::printAddrModePCOperand(const MachineInstr *MI, int Op,
664 const char *Modifier) {
665 if (Modifier && strcmp(Modifier, "label") == 0) {
666 printPCLabel(MI, Op+1);
670 const MachineOperand &MO1 = MI->getOperand(Op);
671 assert(TargetRegisterInfo::isPhysicalRegister(MO1.getReg()));
672 O << "[pc, +" << TRI->getAsmName(MO1.getReg()) << "]";
676 ARMAsmPrinter::printBitfieldInvMaskImmOperand(const MachineInstr *MI, int Op) {
677 const MachineOperand &MO = MI->getOperand(Op);
678 uint32_t v = ~MO.getImm();
679 int32_t lsb = CountTrailingZeros_32(v);
680 int32_t width = (32 - CountLeadingZeros_32 (v)) - lsb;
681 assert(MO.isImm() && "Not a valid bf_inv_mask_imm value!");
682 O << "#" << lsb << ", #" << width;
685 //===--------------------------------------------------------------------===//
688 ARMAsmPrinter::printThumbITMask(const MachineInstr *MI, int Op) {
689 // (3 - the number of trailing zeros) is the number of then / else.
690 unsigned Mask = MI->getOperand(Op).getImm();
691 unsigned NumTZ = CountTrailingZeros_32(Mask);
692 assert(NumTZ <= 3 && "Invalid IT mask!");
693 for (unsigned Pos = 3, e = NumTZ; Pos > e; --Pos) {
694 bool T = (Mask & (1 << Pos)) != 0;
703 ARMAsmPrinter::printThumbAddrModeRROperand(const MachineInstr *MI, int Op) {
704 const MachineOperand &MO1 = MI->getOperand(Op);
705 const MachineOperand &MO2 = MI->getOperand(Op+1);
706 O << "[" << TRI->getAsmName(MO1.getReg());
707 O << ", " << TRI->getAsmName(MO2.getReg()) << "]";
711 ARMAsmPrinter::printThumbAddrModeRI5Operand(const MachineInstr *MI, int Op,
713 const MachineOperand &MO1 = MI->getOperand(Op);
714 const MachineOperand &MO2 = MI->getOperand(Op+1);
715 const MachineOperand &MO3 = MI->getOperand(Op+2);
717 if (!MO1.isReg()) { // FIXME: This is for CP entries, but isn't right.
718 printOperand(MI, Op);
722 O << "[" << TRI->getAsmName(MO1.getReg());
724 O << ", " << TRI->getAsmName(MO3.getReg());
725 else if (unsigned ImmOffs = MO2.getImm()) {
726 O << ", #" << ImmOffs;
734 ARMAsmPrinter::printThumbAddrModeS1Operand(const MachineInstr *MI, int Op) {
735 printThumbAddrModeRI5Operand(MI, Op, 1);
738 ARMAsmPrinter::printThumbAddrModeS2Operand(const MachineInstr *MI, int Op) {
739 printThumbAddrModeRI5Operand(MI, Op, 2);
742 ARMAsmPrinter::printThumbAddrModeS4Operand(const MachineInstr *MI, int Op) {
743 printThumbAddrModeRI5Operand(MI, Op, 4);
746 void ARMAsmPrinter::printThumbAddrModeSPOperand(const MachineInstr *MI,int Op) {
747 const MachineOperand &MO1 = MI->getOperand(Op);
748 const MachineOperand &MO2 = MI->getOperand(Op+1);
749 O << "[" << TRI->getAsmName(MO1.getReg());
750 if (unsigned ImmOffs = MO2.getImm())
751 O << ", #" << ImmOffs << " * 4";
755 //===--------------------------------------------------------------------===//
757 // Constant shifts t2_so_reg is a 2-operand unit corresponding to the Thumb2
758 // register with shift forms.
760 // REG IMM, SH_OPC - e.g. R5, LSL #3
761 void ARMAsmPrinter::printT2SOOperand(const MachineInstr *MI, int OpNum) {
762 const MachineOperand &MO1 = MI->getOperand(OpNum);
763 const MachineOperand &MO2 = MI->getOperand(OpNum+1);
765 unsigned Reg = MO1.getReg();
766 assert(TargetRegisterInfo::isPhysicalRegister(Reg));
767 O << TRI->getAsmName(Reg);
769 // Print the shift opc.
771 << ARM_AM::getShiftOpcStr(ARM_AM::getSORegShOp(MO2.getImm()))
774 assert(MO2.isImm() && "Not a valid t2_so_reg value!");
775 O << "#" << ARM_AM::getSORegOffset(MO2.getImm());
778 void ARMAsmPrinter::printT2AddrModeImm12Operand(const MachineInstr *MI,
780 const MachineOperand &MO1 = MI->getOperand(OpNum);
781 const MachineOperand &MO2 = MI->getOperand(OpNum+1);
783 O << "[" << TRI->getAsmName(MO1.getReg());
785 unsigned OffImm = MO2.getImm();
786 if (OffImm) // Don't print +0.
787 O << ", #+" << OffImm;
791 void ARMAsmPrinter::printT2AddrModeImm8Operand(const MachineInstr *MI,
793 const MachineOperand &MO1 = MI->getOperand(OpNum);
794 const MachineOperand &MO2 = MI->getOperand(OpNum+1);
796 O << "[" << TRI->getAsmName(MO1.getReg());
798 int32_t OffImm = (int32_t)MO2.getImm();
801 O << ", #-" << -OffImm;
803 O << ", #+" << OffImm;
807 void ARMAsmPrinter::printT2AddrModeImm8s4Operand(const MachineInstr *MI,
809 const MachineOperand &MO1 = MI->getOperand(OpNum);
810 const MachineOperand &MO2 = MI->getOperand(OpNum+1);
812 O << "[" << TRI->getAsmName(MO1.getReg());
814 int32_t OffImm = (int32_t)MO2.getImm() / 4;
817 O << ", #-" << -OffImm << " * 4";
819 O << ", #+" << OffImm << " * 4";
823 void ARMAsmPrinter::printT2AddrModeImm8OffsetOperand(const MachineInstr *MI,
825 const MachineOperand &MO1 = MI->getOperand(OpNum);
826 int32_t OffImm = (int32_t)MO1.getImm();
829 O << "#-" << -OffImm;
834 void ARMAsmPrinter::printT2AddrModeSoRegOperand(const MachineInstr *MI,
836 const MachineOperand &MO1 = MI->getOperand(OpNum);
837 const MachineOperand &MO2 = MI->getOperand(OpNum+1);
838 const MachineOperand &MO3 = MI->getOperand(OpNum+2);
840 O << "[" << TRI->getAsmName(MO1.getReg());
843 O << ", +" << TRI->getAsmName(MO2.getReg());
845 unsigned ShAmt = MO3.getImm();
847 assert(ShAmt <= 3 && "Not a valid Thumb2 addressing mode!");
848 O << ", lsl #" << ShAmt;
855 //===--------------------------------------------------------------------===//
857 void ARMAsmPrinter::printPredicateOperand(const MachineInstr *MI, int OpNum) {
858 ARMCC::CondCodes CC = (ARMCC::CondCodes)MI->getOperand(OpNum).getImm();
860 O << ARMCondCodeToString(CC);
863 void ARMAsmPrinter::printSBitModifierOperand(const MachineInstr *MI, int OpNum){
864 unsigned Reg = MI->getOperand(OpNum).getReg();
866 assert(Reg == ARM::CPSR && "Expect ARM CPSR register!");
871 void ARMAsmPrinter::printPCLabel(const MachineInstr *MI, int OpNum) {
872 int Id = (int)MI->getOperand(OpNum).getImm();
873 O << TAI->getPrivateGlobalPrefix() << "PC" << Id;
876 void ARMAsmPrinter::printRegisterList(const MachineInstr *MI, int OpNum) {
878 for (unsigned i = OpNum, e = MI->getNumOperands(); i != e; ++i) {
880 if (i != e-1) O << ", ";
885 void ARMAsmPrinter::printCPInstOperand(const MachineInstr *MI, int OpNum,
886 const char *Modifier) {
887 assert(Modifier && "This operand only works with a modifier!");
888 // There are two aspects to a CONSTANTPOOL_ENTRY operand, the label and the
890 if (!strcmp(Modifier, "label")) {
891 unsigned ID = MI->getOperand(OpNum).getImm();
892 O << TAI->getPrivateGlobalPrefix() << "CPI" << getFunctionNumber()
893 << '_' << ID << ":\n";
895 assert(!strcmp(Modifier, "cpentry") && "Unknown modifier for CPE");
896 unsigned CPI = MI->getOperand(OpNum).getIndex();
898 const MachineConstantPoolEntry &MCPE = MCP->getConstants()[CPI];
900 if (MCPE.isMachineConstantPoolEntry()) {
901 EmitMachineConstantPoolValue(MCPE.Val.MachineCPVal);
903 EmitGlobalConstant(MCPE.Val.ConstVal);
908 void ARMAsmPrinter::printJTBlockOperand(const MachineInstr *MI, int OpNum) {
909 const MachineOperand &MO1 = MI->getOperand(OpNum);
910 const MachineOperand &MO2 = MI->getOperand(OpNum+1); // Unique Id
911 unsigned JTI = MO1.getIndex();
912 O << TAI->getPrivateGlobalPrefix() << "JTI" << getFunctionNumber()
913 << '_' << JTI << '_' << MO2.getImm() << ":\n";
915 const char *JTEntryDirective = TAI->getJumpTableDirective();
916 if (!JTEntryDirective)
917 JTEntryDirective = TAI->getData32bitsDirective();
919 const MachineFunction *MF = MI->getParent()->getParent();
920 const MachineJumpTableInfo *MJTI = MF->getJumpTableInfo();
921 const std::vector<MachineJumpTableEntry> &JT = MJTI->getJumpTables();
922 const std::vector<MachineBasicBlock*> &JTBBs = JT[JTI].MBBs;
923 bool UseSet= TAI->getSetDirective() && TM.getRelocationModel() == Reloc::PIC_;
924 std::set<MachineBasicBlock*> JTSets;
925 for (unsigned i = 0, e = JTBBs.size(); i != e; ++i) {
926 MachineBasicBlock *MBB = JTBBs[i];
927 if (UseSet && JTSets.insert(MBB).second)
928 printPICJumpTableSetLabel(JTI, MO2.getImm(), MBB);
930 O << JTEntryDirective << ' ';
932 O << TAI->getPrivateGlobalPrefix() << getFunctionNumber()
933 << '_' << JTI << '_' << MO2.getImm()
934 << "_set_" << MBB->getNumber();
935 else if (TM.getRelocationModel() == Reloc::PIC_) {
936 printBasicBlockLabel(MBB, false, false, false);
937 // If the arch uses custom Jump Table directives, don't calc relative to JT
938 if (!TAI->getJumpTableDirective())
939 O << '-' << TAI->getPrivateGlobalPrefix() << "JTI"
940 << getFunctionNumber() << '_' << JTI << '_' << MO2.getImm();
942 printBasicBlockLabel(MBB, false, false, false);
949 bool ARMAsmPrinter::PrintAsmOperand(const MachineInstr *MI, unsigned OpNum,
950 unsigned AsmVariant, const char *ExtraCode){
951 // Does this asm operand have a single letter operand modifier?
952 if (ExtraCode && ExtraCode[0]) {
953 if (ExtraCode[1] != 0) return true; // Unknown modifier.
955 switch (ExtraCode[0]) {
956 default: return true; // Unknown modifier.
957 case 'a': // Print as a memory address.
958 if (MI->getOperand(OpNum).isReg()) {
959 O << "[" << TRI->getAsmName(MI->getOperand(OpNum).getReg()) << "]";
963 case 'c': // Don't print "#" before an immediate operand.
964 printOperand(MI, OpNum, "no_hash");
966 case 'P': // Print a VFP double precision register.
967 printOperand(MI, OpNum);
970 if (TM.getTargetData()->isLittleEndian())
974 if (TM.getTargetData()->isBigEndian())
977 case 'H': // Write second word of DI / DF reference.
978 // Verify that this operand has two consecutive registers.
979 if (!MI->getOperand(OpNum).isReg() ||
980 OpNum+1 == MI->getNumOperands() ||
981 !MI->getOperand(OpNum+1).isReg())
983 ++OpNum; // Return the high-part.
987 printOperand(MI, OpNum);
991 bool ARMAsmPrinter::PrintAsmMemoryOperand(const MachineInstr *MI,
992 unsigned OpNum, unsigned AsmVariant,
993 const char *ExtraCode) {
994 if (ExtraCode && ExtraCode[0])
995 return true; // Unknown modifier.
996 printAddrMode2Operand(MI, OpNum);
1000 void ARMAsmPrinter::printMachineInstruction(const MachineInstr *MI) {
1003 int Opc = MI->getOpcode();
1005 case ARM::CONSTPOOL_ENTRY:
1006 if (!InCPMode && AFI->isThumbFunction()) {
1012 if (InCPMode && AFI->isThumbFunction())
1016 // Call the autogenerated instruction printer routines.
1017 printInstruction(MI);
1020 bool ARMAsmPrinter::doInitialization(Module &M) {
1022 bool Result = AsmPrinter::doInitialization(M);
1023 DW = getAnalysisIfAvailable<DwarfWriter>();
1025 // Use unified assembler syntax mode for Thumb.
1026 if (Subtarget->isThumb())
1027 O << "\t.syntax unified\n";
1029 // Emit ARM Build Attributes
1030 if (Subtarget->isTargetELF()) {
1032 std::string CPUString = Subtarget->getCPUString();
1033 if (CPUString != "generic")
1034 O << "\t.cpu " << CPUString << '\n';
1036 // FIXME: Emit FPU type
1037 if (Subtarget->hasVFP2())
1038 O << "\t.eabi_attribute " << ARMBuildAttrs::VFP_arch << ", 2\n";
1040 // Signal various FP modes.
1042 O << "\t.eabi_attribute " << ARMBuildAttrs::ABI_FP_denormal << ", 1\n"
1043 << "\t.eabi_attribute " << ARMBuildAttrs::ABI_FP_exceptions << ", 1\n";
1045 if (FiniteOnlyFPMath())
1046 O << "\t.eabi_attribute " << ARMBuildAttrs::ABI_FP_number_model << ", 1\n";
1048 O << "\t.eabi_attribute " << ARMBuildAttrs::ABI_FP_number_model << ", 3\n";
1050 // 8-bytes alignment stuff.
1051 O << "\t.eabi_attribute " << ARMBuildAttrs::ABI_align8_needed << ", 1\n"
1052 << "\t.eabi_attribute " << ARMBuildAttrs::ABI_align8_preserved << ", 1\n";
1054 // FIXME: Should we signal R9 usage?
1060 /// PrintUnmangledNameSafely - Print out the printable characters in the name.
1061 /// Don't print things like \\n or \\0.
1062 static void PrintUnmangledNameSafely(const Value *V, formatted_raw_ostream &OS) {
1063 for (const char *Name = V->getNameStart(), *E = Name+V->getNameLen();
1069 void ARMAsmPrinter::PrintGlobalVariable(const GlobalVariable* GVar) {
1070 const TargetData *TD = TM.getTargetData();
1072 if (!GVar->hasInitializer()) // External global require no code
1075 // Check to see if this is a special global used by LLVM, if so, emit it.
1077 if (EmitSpecialLLVMGlobal(GVar)) {
1078 if (Subtarget->isTargetDarwin() &&
1079 TM.getRelocationModel() == Reloc::Static) {
1080 if (GVar->isName("llvm.global_ctors"))
1081 O << ".reference .constructors_used\n";
1082 else if (GVar->isName("llvm.global_dtors"))
1083 O << ".reference .destructors_used\n";
1088 std::string name = Mang->getMangledName(GVar);
1089 Constant *C = GVar->getInitializer();
1090 if (isa<MDNode>(C) || isa<MDString>(C))
1092 const Type *Type = C->getType();
1093 unsigned Size = TD->getTypeAllocSize(Type);
1094 unsigned Align = TD->getPreferredAlignmentLog(GVar);
1095 bool isDarwin = Subtarget->isTargetDarwin();
1097 printVisibility(name, GVar->getVisibility());
1099 if (Subtarget->isTargetELF())
1100 O << "\t.type " << name << ",%object\n";
1102 const Section *TheSection = TAI->SectionForGlobal(GVar);
1103 SwitchToSection(TheSection);
1105 if (C->isNullValue() && !GVar->hasSection() && !GVar->isThreadLocal() &&
1106 !(isDarwin && TheSection->getFlags() == SectionKind::RODataMergeStr)) {
1107 // FIXME: This seems to be pretty darwin-specific
1109 if (GVar->hasExternalLinkage()) {
1110 if (const char *Directive = TAI->getZeroFillDirective()) {
1111 O << "\t.globl\t" << name << "\n";
1112 O << Directive << "__DATA, __common, " << name << ", "
1113 << Size << ", " << Align << "\n";
1118 if (GVar->hasLocalLinkage() || GVar->isWeakForLinker()) {
1119 if (Size == 0) Size = 1; // .comm Foo, 0 is undefined, avoid it.
1122 if (GVar->hasLocalLinkage()) {
1123 O << TAI->getLCOMMDirective() << name << "," << Size
1125 } else if (GVar->hasCommonLinkage()) {
1126 O << TAI->getCOMMDirective() << name << "," << Size
1129 SwitchToSection(TAI->SectionForGlobal(GVar));
1130 O << "\t.globl " << name << '\n'
1131 << TAI->getWeakDefDirective() << name << '\n';
1132 EmitAlignment(Align, GVar);
1135 O << "\t\t\t\t" << TAI->getCommentString() << ' ';
1136 PrintUnmangledNameSafely(GVar, O);
1139 EmitGlobalConstant(C);
1142 } else if (TAI->getLCOMMDirective() != NULL) {
1143 if (GVar->hasLocalLinkage()) {
1144 O << TAI->getLCOMMDirective() << name << "," << Size;
1146 O << TAI->getCOMMDirective() << name << "," << Size;
1147 if (TAI->getCOMMDirectiveTakesAlignment())
1148 O << ',' << (TAI->getAlignmentIsInBytes() ? (1 << Align) : Align);
1151 if (GVar->hasLocalLinkage())
1152 O << "\t.local\t" << name << "\n";
1153 O << TAI->getCOMMDirective() << name << "," << Size;
1154 if (TAI->getCOMMDirectiveTakesAlignment())
1155 O << "," << (TAI->getAlignmentIsInBytes() ? (1 << Align) : Align);
1158 O << "\t\t" << TAI->getCommentString() << " ";
1159 PrintUnmangledNameSafely(GVar, O);
1166 switch (GVar->getLinkage()) {
1167 case GlobalValue::CommonLinkage:
1168 case GlobalValue::LinkOnceAnyLinkage:
1169 case GlobalValue::LinkOnceODRLinkage:
1170 case GlobalValue::WeakAnyLinkage:
1171 case GlobalValue::WeakODRLinkage:
1173 O << "\t.globl " << name << "\n"
1174 << "\t.weak_definition " << name << "\n";
1176 O << "\t.weak " << name << "\n";
1179 case GlobalValue::AppendingLinkage:
1180 // FIXME: appending linkage variables should go into a section of
1181 // their name or something. For now, just emit them as external.
1182 case GlobalValue::ExternalLinkage:
1183 O << "\t.globl " << name << "\n";
1185 case GlobalValue::PrivateLinkage:
1186 case GlobalValue::LinkerPrivateLinkage:
1187 case GlobalValue::InternalLinkage:
1190 llvm_unreachable("Unknown linkage type!");
1193 EmitAlignment(Align, GVar);
1196 O << "\t\t\t\t" << TAI->getCommentString() << " ";
1197 PrintUnmangledNameSafely(GVar, O);
1200 if (TAI->hasDotTypeDotSizeDirective())
1201 O << "\t.size " << name << ", " << Size << "\n";
1203 EmitGlobalConstant(C);
1208 bool ARMAsmPrinter::doFinalization(Module &M) {
1209 if (Subtarget->isTargetDarwin()) {
1210 SwitchToDataSection("");
1213 // Output stubs for dynamically-linked functions
1214 for (StringMap<FnStubInfo>::iterator I = FnStubs.begin(), E = FnStubs.end();
1216 const FnStubInfo &Info = I->second;
1217 if (TM.getRelocationModel() == Reloc::PIC_)
1218 SwitchToTextSection(".section __TEXT,__picsymbolstub4,symbol_stubs,"
1221 SwitchToTextSection(".section __TEXT,__symbol_stub4,symbol_stubs,"
1225 O << "\t.code\t32\n";
1227 O << Info.Stub << ":\n";
1228 O << "\t.indirect_symbol " << I->getKeyData() << '\n';
1229 O << "\tldr ip, " << Info.SLP << '\n';
1230 if (TM.getRelocationModel() == Reloc::PIC_) {
1231 O << Info.SCV << ":\n";
1232 O << "\tadd ip, pc, ip\n";
1234 O << "\tldr pc, [ip, #0]\n";
1235 O << Info.SLP << ":\n";
1236 O << "\t.long\t" << Info.LazyPtr;
1237 if (TM.getRelocationModel() == Reloc::PIC_)
1238 O << "-(" << Info.SCV << "+8)";
1241 SwitchToDataSection(".lazy_symbol_pointer", 0);
1242 O << Info.LazyPtr << ":\n";
1243 O << "\t.indirect_symbol " << I->getKeyData() << "\n";
1244 O << "\t.long\tdyld_stub_binding_helper\n";
1248 // Output non-lazy-pointers for external and common global variables.
1249 if (!GVNonLazyPtrs.empty()) {
1250 SwitchToDataSection("\t.non_lazy_symbol_pointer", 0);
1251 for (StringMap<std::string>::iterator I = GVNonLazyPtrs.begin(),
1252 E = GVNonLazyPtrs.end(); I != E; ++I) {
1253 O << I->second << ":\n";
1254 O << "\t.indirect_symbol " << I->getKeyData() << "\n";
1255 O << "\t.long\t0\n";
1259 if (!HiddenGVNonLazyPtrs.empty()) {
1260 SwitchToSection(TAI->getDataSection());
1261 for (StringMap<std::string>::iterator I = HiddenGVNonLazyPtrs.begin(),
1262 E = HiddenGVNonLazyPtrs.end(); I != E; ++I) {
1264 O << I->second << ":\n";
1265 O << "\t.long " << I->getKeyData() << "\n";
1270 // Funny Darwin hack: This flag tells the linker that no global symbols
1271 // contain code that falls through to other global symbols (e.g. the obvious
1272 // implementation of multiple entry points). If this doesn't occur, the
1273 // linker can safely perform dead code stripping. Since LLVM never
1274 // generates code that does this, it is always safe to set.
1275 O << "\t.subsections_via_symbols\n";
1278 return AsmPrinter::doFinalization(M);
1281 /// createARMCodePrinterPass - Returns a pass that prints the ARM
1282 /// assembly code for a MachineFunction to the given output stream,
1283 /// using the given target machine description. This should work
1284 /// regardless of whether the function is in SSA form.
1286 FunctionPass *llvm::createARMCodePrinterPass(formatted_raw_ostream &o,
1289 return new ARMAsmPrinter(o, tm, tm.getTargetAsmInfo(), verbose);
1292 // Force static initialization.
1293 extern "C" void LLVMInitializeARMAsmPrinter() {
1294 TargetRegistry::RegisterAsmPrinter(TheARMTarget, createARMCodePrinterPass);
1295 TargetRegistry::RegisterAsmPrinter(TheThumbTarget, createARMCodePrinterPass);