1 set(LLVM_TARGET_DEFINITIONS ARM.td)
3 tablegen(ARMGenRegisterInfo.h.inc -gen-register-desc-header)
4 tablegen(ARMGenRegisterNames.inc -gen-register-enums)
5 tablegen(ARMGenRegisterInfo.inc -gen-register-desc)
6 tablegen(ARMGenInstrNames.inc -gen-instr-enums)
7 tablegen(ARMGenInstrInfo.inc -gen-instr-desc)
8 tablegen(ARMGenCodeEmitter.inc -gen-emitter)
9 tablegen(ARMGenAsmWriter.inc -gen-asm-writer)
10 tablegen(ARMGenDAGISel.inc -gen-dag-isel)
11 tablegen(ARMGenCallingConv.inc -gen-callingconv)
12 tablegen(ARMGenSubtarget.inc -gen-subtarget)
13 tablegen(ARMGenEDInfo.inc -gen-enhanced-disassembly-info)
15 add_llvm_target(ARMCodeGen
17 ARMBaseRegisterInfo.cpp
19 ARMConstantIslandPass.cpp
20 ARMConstantPoolValue.cpp
21 ARMExpandPseudoInsts.cpp
26 ARMLoadStoreOptimizer.cpp
31 ARMTargetObjectFile.cpp
35 Thumb1RegisterInfo.cpp
38 Thumb2RegisterInfo.cpp
39 Thumb2SizeReduction.cpp
42 target_link_libraries (LLVMARMCodeGen LLVMSelectionDAG)