Add ARM big endian Target (armeb, thumbeb)
[oota-llvm.git] / lib / Target / ARM / MCTargetDesc / ARMELFObjectWriter.cpp
1 //===-- ARMELFObjectWriter.cpp - ARM ELF Writer ---------------------------===//
2 //
3 //                     The LLVM Compiler Infrastructure
4 //
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
7 //
8 //===----------------------------------------------------------------------===//
9
10 #include "MCTargetDesc/ARMMCTargetDesc.h"
11 #include "MCTargetDesc/ARMFixupKinds.h"
12 #include "llvm/ADT/Statistic.h"
13 #include "llvm/ADT/StringSwitch.h"
14 #include "llvm/MC/MCELFObjectWriter.h"
15 #include "llvm/MC/MCExpr.h"
16 #include "llvm/MC/MCSectionELF.h"
17 #include "llvm/MC/MCValue.h"
18 #include "llvm/Support/Debug.h"
19 #include "llvm/Support/ErrorHandling.h"
20 #include "llvm/Support/raw_ostream.h"
21
22 using namespace llvm;
23
24 namespace {
25   class ARMELFObjectWriter : public MCELFObjectTargetWriter {
26     enum { DefaultEABIVersion = 0x05000000U };
27     unsigned GetRelocTypeInner(const MCValue &Target,
28                                const MCFixup &Fixup,
29                                bool IsPCRel) const;
30
31
32   public:
33     ARMELFObjectWriter(uint8_t OSABI);
34
35     virtual ~ARMELFObjectWriter();
36
37     unsigned GetRelocType(const MCValue &Target, const MCFixup &Fixup,
38                           bool IsPCRel) const override;
39     const MCSymbol *ExplicitRelSym(const MCAssembler &Asm,
40                                    const MCValue &Target, const MCFragment &F,
41                                    const MCFixup &Fixup,
42                                    bool IsPCRel) const override;
43   };
44 }
45
46 ARMELFObjectWriter::ARMELFObjectWriter(uint8_t OSABI)
47   : MCELFObjectTargetWriter(/*Is64Bit*/ false, OSABI,
48                             ELF::EM_ARM,
49                             /*HasRelocationAddend*/ false) {}
50
51 ARMELFObjectWriter::~ARMELFObjectWriter() {}
52
53 // In ARM, _MergedGlobals and other most symbols get emitted directly.
54 // I.e. not as an offset to a section symbol.
55 // This code is an approximation of what ARM/gcc does.
56
57 STATISTIC(PCRelCount, "Total number of PIC Relocations");
58 STATISTIC(NonPCRelCount, "Total number of non-PIC relocations");
59
60 const MCSymbol *ARMELFObjectWriter::ExplicitRelSym(const MCAssembler &Asm,
61                                                    const MCValue &Target,
62                                                    const MCFragment &F,
63                                                    const MCFixup &Fixup,
64                                                    bool IsPCRel) const {
65   const MCSymbol &Symbol = Target.getSymA()->getSymbol().AliasedSymbol();
66   bool EmitThisSym = false;
67
68   const MCSectionELF &Section =
69     static_cast<const MCSectionELF&>(Symbol.getSection());
70   bool InNormalSection = true;
71   unsigned RelocType = 0;
72   RelocType = GetRelocTypeInner(Target, Fixup, IsPCRel);
73   assert(!Target.getSymB() ||
74          Target.getSymB()->getKind() == MCSymbolRefExpr::VK_None);
75
76   DEBUG(
77       MCSymbolRefExpr::VariantKind Kind = Fixup.getAccessVariant();
78       dbgs() << "considering symbol "
79         << Section.getSectionName() << "/"
80         << Symbol.getName() << "/"
81         << " Rel:" << (unsigned)RelocType
82         << " Kind: " << (int)Kind
83         << " Tmp:"
84         << Symbol.isAbsolute() << "/" << Symbol.isDefined() << "/"
85         << Symbol.isVariable() << "/" << Symbol.isTemporary()
86         << " Counts:" << PCRelCount << "/" << NonPCRelCount << "\n");
87
88   if (IsPCRel) { ++PCRelCount;
89     switch (RelocType) {
90     default:
91       // Most relocation types are emitted as explicit symbols
92       InNormalSection =
93         StringSwitch<bool>(Section.getSectionName())
94         .Case(".data.rel.ro.local", false)
95         .Case(".data.rel", false)
96         .Case(".bss", false)
97         .Default(true);
98       EmitThisSym = true;
99       break;
100     case ELF::R_ARM_ABS32:
101       // But things get strange with R_ARM_ABS32
102       // In this case, most things that go in .rodata show up
103       // as section relative relocations
104       InNormalSection =
105         StringSwitch<bool>(Section.getSectionName())
106         .Case(".data.rel.ro.local", false)
107         .Case(".data.rel", false)
108         .Case(".rodata", false)
109         .Case(".bss", false)
110         .Default(true);
111       EmitThisSym = false;
112       break;
113     }
114   } else {
115     NonPCRelCount++;
116     InNormalSection =
117       StringSwitch<bool>(Section.getSectionName())
118       .Case(".data.rel.ro.local", false)
119       .Case(".rodata", false)
120       .Case(".data.rel", false)
121       .Case(".bss", false)
122       .Default(true);
123
124     switch (RelocType) {
125     default: EmitThisSym = true; break;
126     case ELF::R_ARM_ABS32: EmitThisSym = false; break;
127     case ELF::R_ARM_PREL31: EmitThisSym = false; break;
128     }
129   }
130
131   if (EmitThisSym)
132     return &Symbol;
133   if (! Symbol.isTemporary() && InNormalSection) {
134     return &Symbol;
135   }
136   return NULL;
137 }
138
139 // Need to examine the Fixup when determining whether to 
140 // emit the relocation as an explicit symbol or as a section relative
141 // offset
142 unsigned ARMELFObjectWriter::GetRelocType(const MCValue &Target,
143                                           const MCFixup &Fixup,
144                                           bool IsPCRel) const {
145   return GetRelocTypeInner(Target, Fixup, IsPCRel);
146 }
147
148 unsigned ARMELFObjectWriter::GetRelocTypeInner(const MCValue &Target,
149                                                const MCFixup &Fixup,
150                                                bool IsPCRel) const  {
151   MCSymbolRefExpr::VariantKind Modifier = Fixup.getAccessVariant();
152
153   unsigned Type = 0;
154   if (IsPCRel) {
155     switch ((unsigned)Fixup.getKind()) {
156     default: llvm_unreachable("Unimplemented");
157     case FK_Data_4:
158       switch (Modifier) {
159       default: llvm_unreachable("Unsupported Modifier");
160       case MCSymbolRefExpr::VK_None:
161         Type = ELF::R_ARM_REL32;
162         break;
163       case MCSymbolRefExpr::VK_TLSGD:
164         llvm_unreachable("unimplemented");
165       case MCSymbolRefExpr::VK_GOTTPOFF:
166         Type = ELF::R_ARM_TLS_IE32;
167         break;
168       }
169       break;
170     case ARM::fixup_arm_blx:
171     case ARM::fixup_arm_uncondbl:
172       switch (Modifier) {
173       case MCSymbolRefExpr::VK_PLT:
174         Type = ELF::R_ARM_PLT32;
175         break;
176       case MCSymbolRefExpr::VK_ARM_TLSCALL:
177         Type = ELF::R_ARM_TLS_CALL;
178         break;
179       default:
180         Type = ELF::R_ARM_CALL;
181         break;
182       }
183       break;
184     case ARM::fixup_arm_condbl:
185     case ARM::fixup_arm_condbranch:
186     case ARM::fixup_arm_uncondbranch:
187       Type = ELF::R_ARM_JUMP24;
188       break;
189     case ARM::fixup_t2_condbranch:
190     case ARM::fixup_t2_uncondbranch:
191       Type = ELF::R_ARM_THM_JUMP24;
192       break;
193     case ARM::fixup_arm_movt_hi16:
194     case ARM::fixup_arm_movt_hi16_pcrel:
195       Type = ELF::R_ARM_MOVT_PREL;
196       break;
197     case ARM::fixup_arm_movw_lo16:
198     case ARM::fixup_arm_movw_lo16_pcrel:
199       Type = ELF::R_ARM_MOVW_PREL_NC;
200       break;
201     case ARM::fixup_t2_movt_hi16:
202     case ARM::fixup_t2_movt_hi16_pcrel:
203       Type = ELF::R_ARM_THM_MOVT_PREL;
204       break;
205     case ARM::fixup_t2_movw_lo16:
206     case ARM::fixup_t2_movw_lo16_pcrel:
207       Type = ELF::R_ARM_THM_MOVW_PREL_NC;
208       break;
209     case ARM::fixup_arm_thumb_bl:
210     case ARM::fixup_arm_thumb_blx:
211       switch (Modifier) {
212       case MCSymbolRefExpr::VK_ARM_TLSCALL:
213         Type = ELF::R_ARM_THM_TLS_CALL;
214         break;
215       default:
216         Type = ELF::R_ARM_THM_CALL;
217         break;
218       }
219       break;
220     }
221   } else {
222     switch ((unsigned)Fixup.getKind()) {
223     default: llvm_unreachable("invalid fixup kind!");
224     case FK_Data_4:
225       switch (Modifier) {
226       default: llvm_unreachable("Unsupported Modifier");
227       case MCSymbolRefExpr::VK_ARM_NONE:
228         Type = ELF::R_ARM_NONE;
229         break;
230       case MCSymbolRefExpr::VK_GOT:
231         Type = ELF::R_ARM_GOT_BREL;
232         break;
233       case MCSymbolRefExpr::VK_TLSGD:
234         Type = ELF::R_ARM_TLS_GD32;
235         break;
236       case MCSymbolRefExpr::VK_TPOFF:
237         Type = ELF::R_ARM_TLS_LE32;
238         break;
239       case MCSymbolRefExpr::VK_GOTTPOFF:
240         Type = ELF::R_ARM_TLS_IE32;
241         break;
242       case MCSymbolRefExpr::VK_None:
243         Type = ELF::R_ARM_ABS32;
244         break;
245       case MCSymbolRefExpr::VK_GOTOFF:
246         Type = ELF::R_ARM_GOTOFF32;
247         break;
248       case MCSymbolRefExpr::VK_ARM_TARGET1:
249         Type = ELF::R_ARM_TARGET1;
250         break;
251       case MCSymbolRefExpr::VK_ARM_TARGET2:
252         Type = ELF::R_ARM_TARGET2;
253         break;
254       case MCSymbolRefExpr::VK_ARM_PREL31:
255         Type = ELF::R_ARM_PREL31;
256         break;
257       case MCSymbolRefExpr::VK_ARM_TLSLDO:
258         Type = ELF::R_ARM_TLS_LDO32;
259         break;
260       case MCSymbolRefExpr::VK_ARM_TLSCALL:
261         Type = ELF::R_ARM_TLS_CALL;
262         break;
263       case MCSymbolRefExpr::VK_ARM_TLSDESC:
264         Type = ELF::R_ARM_TLS_GOTDESC;
265         break;
266       case MCSymbolRefExpr::VK_ARM_TLSDESCSEQ:
267         Type = ELF::R_ARM_TLS_DESCSEQ;
268         break;
269       }
270       break;
271     case ARM::fixup_arm_ldst_pcrel_12:
272     case ARM::fixup_arm_pcrel_10:
273     case ARM::fixup_arm_adr_pcrel_12:
274     case ARM::fixup_arm_thumb_bl:
275     case ARM::fixup_arm_thumb_cb:
276     case ARM::fixup_arm_thumb_cp:
277     case ARM::fixup_arm_thumb_br:
278       llvm_unreachable("Unimplemented");
279     case ARM::fixup_arm_condbranch:
280     case ARM::fixup_arm_uncondbranch:
281       Type = ELF::R_ARM_JUMP24;
282       break;
283     case ARM::fixup_arm_movt_hi16:
284       Type = ELF::R_ARM_MOVT_ABS;
285       break;
286     case ARM::fixup_arm_movw_lo16:
287       Type = ELF::R_ARM_MOVW_ABS_NC;
288       break;
289     case ARM::fixup_t2_movt_hi16:
290       Type = ELF::R_ARM_THM_MOVT_ABS;
291       break;
292     case ARM::fixup_t2_movw_lo16:
293       Type = ELF::R_ARM_THM_MOVW_ABS_NC;
294       break;
295     }
296   }
297
298   return Type;
299 }
300
301 MCObjectWriter *llvm::createARMELFObjectWriter(raw_ostream &OS,
302                                                uint8_t OSABI,
303                                                bool IsLittleEndian) {
304   MCELFObjectTargetWriter *MOTW = new ARMELFObjectWriter(OSABI);
305   return createELFObjectWriter(MOTW, OS, IsLittleEndian);
306 }