1 //===---------------------------------------------------------------------===//
2 // Random ideas for the ARM backend (Thumb specific).
3 //===---------------------------------------------------------------------===//
5 * Add support for compiling functions in both ARM and Thumb mode, then taking
7 * Add support for compiling individual basic blocks in thumb mode, when in a
8 larger ARM function. This can be used for presumed cold code, like paths
9 to abort (failure path of asserts), EH handling code, etc.
11 * Thumb doesn't have normal pre/post increment addressing modes, but you can
12 load/store 32-bit integers with pre/postinc by using load/store multiple
13 instrs with a single register.
15 * Make better use of high registers r8, r10, r11, r12 (ip). Some variants of add
16 and cmp instructions can use high registers. Also, we can use them as
17 temporaries to spill values into.
19 * In thumb mode, short, byte, and bool preferred alignments are currently set
20 to 4 to accommodate ISA restriction (i.e. add sp, #imm, imm must be multiple
23 //===---------------------------------------------------------------------===//
25 Potential jumptable improvements:
27 * If we know function size is less than (1 << 16) * 2 bytes, we can use 16-bit
28 jumptable entries (e.g. (L1 - L2) >> 1). Or even smaller entries if the
29 function is even smaller. This also applies to ARM.
31 * Thumb jumptable codegen can improve given some help from the assembler. This
32 is what we generate right now:
34 .set PCRELV0, (LJTI1_0_0-(LPCRELL0+4))
45 Note there is another pc relative add that we can take advantage of.
46 add r1, pc, #imm_8 * 4
48 We should be able to generate:
58 if the assembler can translate the add to:
59 add r1, pc, #((LJTI1_0_0-(LPCRELL0+4))&0xfffffffc)
61 Note the assembler also does something similar to constpool load:
65 ldr r0, pc, #((LCPI1_0-(LPCRELL0+4))&0xfffffffc)
68 //===---------------------------------------------------------------------===//
70 We compiles the following using a jump table.
72 define i16 @func_entry_2E_ce(i32 %i) {
76 bb12.exitStub: ; preds = %entry.ce
79 bb4.exitStub: ; preds = %entry.ce, %entry.ce, %entry.ce
82 bb9.exitStub: ; preds = %entry.ce, %entry.ce, %entry.ce
85 bb.exitStub: ; preds = %entry.ce
88 entry.ce: ; preds = %newFuncRoot
89 switch i32 %i, label %bb12.exitStub [
90 i32 0, label %bb4.exitStub
91 i32 1, label %bb9.exitStub
92 i32 2, label %bb4.exitStub
93 i32 3, label %bb4.exitStub
94 i32 7, label %bb9.exitStub
95 i32 8, label %bb.exitStub
96 i32 9, label %bb9.exitStub
103 @ lr needed for prologue
108 ands r0, r3, r2, asl r0