1 //=======- Thumb1FrameInfo.cpp - Thumb1 Frame Information ------*- C++ -*-====//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file contains the Thumb1 implementation of TargetFrameInfo class.
12 //===----------------------------------------------------------------------===//
14 #include "Thumb1FrameInfo.h"
15 #include "ARMBaseInstrInfo.h"
16 #include "ARMMachineFunctionInfo.h"
17 #include "llvm/CodeGen/MachineFrameInfo.h"
18 #include "llvm/CodeGen/MachineFunction.h"
19 #include "llvm/CodeGen/MachineInstrBuilder.h"
20 #include "llvm/CodeGen/MachineRegisterInfo.h"
24 bool Thumb1FrameInfo::hasReservedCallFrame(const MachineFunction &MF) const {
25 const MachineFrameInfo *FFI = MF.getFrameInfo();
26 unsigned CFSize = FFI->getMaxCallFrameSize();
27 // It's not always a good idea to include the call frame as part of the
28 // stack frame. ARM (especially Thumb) has small immediate offset to
29 // address the stack frame. So a large call frame can cause poor codegen
30 // and may even makes it impossible to scavenge a register.
31 if (CFSize >= ((1 << 8) - 1) * 4 / 2) // Half of imm8 * 4
34 return !MF.getFrameInfo()->hasVarSizedObjects();
37 static void emitSPUpdate(MachineBasicBlock &MBB,
38 MachineBasicBlock::iterator &MBBI,
39 const TargetInstrInfo &TII, DebugLoc dl,
40 const Thumb1RegisterInfo &MRI,
42 emitThumbRegPlusImmediate(MBB, MBBI, ARM::SP, ARM::SP, NumBytes, TII,
46 void Thumb1FrameInfo::emitPrologue(MachineFunction &MF) const {
47 MachineBasicBlock &MBB = MF.front();
48 MachineBasicBlock::iterator MBBI = MBB.begin();
49 MachineFrameInfo *MFI = MF.getFrameInfo();
50 ARMFunctionInfo *AFI = MF.getInfo<ARMFunctionInfo>();
51 const Thumb1RegisterInfo *RegInfo =
52 static_cast<const Thumb1RegisterInfo*>(MF.getTarget().getRegisterInfo());
53 const Thumb1InstrInfo &TII =
54 *static_cast<const Thumb1InstrInfo*>(MF.getTarget().getInstrInfo());
56 unsigned VARegSaveSize = AFI->getVarArgsRegSaveSize();
57 unsigned NumBytes = MFI->getStackSize();
58 const std::vector<CalleeSavedInfo> &CSI = MFI->getCalleeSavedInfo();
59 DebugLoc dl = MBBI != MBB.end() ? MBBI->getDebugLoc() : DebugLoc();
60 unsigned FramePtr = RegInfo->getFrameRegister(MF);
61 unsigned BasePtr = RegInfo->getBaseRegister();
63 // Thumb add/sub sp, imm8 instructions implicitly multiply the offset by 4.
64 NumBytes = (NumBytes + 3) & ~3;
65 MFI->setStackSize(NumBytes);
67 // Determine the sizes of each callee-save spill areas and record which frame
68 // belongs to which callee-save spill areas.
69 unsigned GPRCS1Size = 0, GPRCS2Size = 0, DPRCSSize = 0;
70 int FramePtrSpillFI = 0;
73 emitSPUpdate(MBB, MBBI, TII, dl, *RegInfo, -VARegSaveSize);
75 if (!AFI->hasStackFrame()) {
77 emitSPUpdate(MBB, MBBI, TII, dl, *RegInfo, -NumBytes);
81 for (unsigned i = 0, e = CSI.size(); i != e; ++i) {
82 unsigned Reg = CSI[i].getReg();
83 int FI = CSI[i].getFrameIdx();
92 AFI->addGPRCalleeSavedArea1Frame(FI);
100 FramePtrSpillFI = FI;
101 if (STI.isTargetDarwin()) {
102 AFI->addGPRCalleeSavedArea2Frame(FI);
105 AFI->addGPRCalleeSavedArea1Frame(FI);
110 AFI->addDPRCalleeSavedAreaFrame(FI);
115 if (MBBI != MBB.end() && MBBI->getOpcode() == ARM::tPUSH) {
117 if (MBBI != MBB.end())
118 dl = MBBI->getDebugLoc();
121 // Determine starting offsets of spill areas.
122 unsigned DPRCSOffset = NumBytes - (GPRCS1Size + GPRCS2Size + DPRCSSize);
123 unsigned GPRCS2Offset = DPRCSOffset + DPRCSSize;
124 unsigned GPRCS1Offset = GPRCS2Offset + GPRCS2Size;
125 AFI->setFramePtrSpillOffset(MFI->getObjectOffset(FramePtrSpillFI) + NumBytes);
126 AFI->setGPRCalleeSavedArea1Offset(GPRCS1Offset);
127 AFI->setGPRCalleeSavedArea2Offset(GPRCS2Offset);
128 AFI->setDPRCalleeSavedAreaOffset(DPRCSOffset);
129 NumBytes = DPRCSOffset;
131 // Adjust FP so it point to the stack slot that contains the previous FP.
133 BuildMI(MBB, MBBI, dl, TII.get(ARM::tADDrSPi), FramePtr)
134 .addFrameIndex(FramePtrSpillFI).addImm(0);
136 // If offset is > 7 then sp cannot be adjusted in a single instruction,
137 // try restoring from fp instead.
138 AFI->setShouldRestoreSPFromFP(true);
142 // Insert it after all the callee-save spills.
143 emitSPUpdate(MBB, MBBI, TII, dl, *RegInfo, -NumBytes);
145 if (STI.isTargetELF() && hasFP(MF))
146 MFI->setOffsetAdjustment(MFI->getOffsetAdjustment() -
147 AFI->getFramePtrSpillOffset());
149 AFI->setGPRCalleeSavedArea1Size(GPRCS1Size);
150 AFI->setGPRCalleeSavedArea2Size(GPRCS2Size);
151 AFI->setDPRCalleeSavedAreaSize(DPRCSSize);
153 // If we need a base pointer, set it up here. It's whatever the value
154 // of the stack pointer is at this point. Any variable size objects
155 // will be allocated after this, so we can still use the base pointer
156 // to reference locals.
157 if (RegInfo->hasBasePointer(MF))
158 BuildMI(MBB, MBBI, dl, TII.get(ARM::tMOVgpr2gpr), BasePtr).addReg(ARM::SP);
161 static bool isCalleeSavedRegister(unsigned Reg, const unsigned *CSRegs) {
162 for (unsigned i = 0; CSRegs[i]; ++i)
163 if (Reg == CSRegs[i])
168 static bool isCSRestore(MachineInstr *MI, const unsigned *CSRegs) {
169 if (MI->getOpcode() == ARM::tRestore &&
170 MI->getOperand(1).isFI() &&
171 isCalleeSavedRegister(MI->getOperand(0).getReg(), CSRegs))
173 else if (MI->getOpcode() == ARM::tPOP) {
174 // The first two operands are predicates. The last two are
175 // imp-def and imp-use of SP. Check everything in between.
176 for (int i = 2, e = MI->getNumOperands() - 2; i != e; ++i)
177 if (!isCalleeSavedRegister(MI->getOperand(i).getReg(), CSRegs))
184 void Thumb1FrameInfo::emitEpilogue(MachineFunction &MF,
185 MachineBasicBlock &MBB) const {
186 MachineBasicBlock::iterator MBBI = prior(MBB.end());
187 assert((MBBI->getOpcode() == ARM::tBX_RET ||
188 MBBI->getOpcode() == ARM::tPOP_RET) &&
189 "Can only insert epilog into returning blocks");
190 DebugLoc dl = MBBI->getDebugLoc();
191 MachineFrameInfo *MFI = MF.getFrameInfo();
192 ARMFunctionInfo *AFI = MF.getInfo<ARMFunctionInfo>();
193 const Thumb1RegisterInfo *RegInfo =
194 static_cast<const Thumb1RegisterInfo*>(MF.getTarget().getRegisterInfo());
195 const Thumb1InstrInfo &TII =
196 *static_cast<const Thumb1InstrInfo*>(MF.getTarget().getInstrInfo());
198 unsigned VARegSaveSize = AFI->getVarArgsRegSaveSize();
199 int NumBytes = (int)MFI->getStackSize();
200 const unsigned *CSRegs = RegInfo->getCalleeSavedRegs();
201 unsigned FramePtr = RegInfo->getFrameRegister(MF);
203 if (!AFI->hasStackFrame()) {
205 emitSPUpdate(MBB, MBBI, TII, dl, *RegInfo, NumBytes);
207 // Unwind MBBI to point to first LDR / VLDRD.
208 if (MBBI != MBB.begin()) {
211 while (MBBI != MBB.begin() && isCSRestore(MBBI, CSRegs));
212 if (!isCSRestore(MBBI, CSRegs))
216 // Move SP to start of FP callee save spill area.
217 NumBytes -= (AFI->getGPRCalleeSavedArea1Size() +
218 AFI->getGPRCalleeSavedArea2Size() +
219 AFI->getDPRCalleeSavedAreaSize());
221 if (AFI->shouldRestoreSPFromFP()) {
222 NumBytes = AFI->getFramePtrSpillOffset() - NumBytes;
223 // Reset SP based on frame pointer only if the stack frame extends beyond
224 // frame pointer stack slot or target is ELF and the function has FP.
226 assert(MF.getRegInfo().isPhysRegUsed(ARM::R4) &&
227 "No scratch register to restore SP from FP!");
228 emitThumbRegPlusImmediate(MBB, MBBI, ARM::R4, FramePtr, -NumBytes,
230 BuildMI(MBB, MBBI, dl, TII.get(ARM::tMOVtgpr2gpr), ARM::SP)
233 BuildMI(MBB, MBBI, dl, TII.get(ARM::tMOVtgpr2gpr), ARM::SP)
236 if (MBBI->getOpcode() == ARM::tBX_RET &&
237 &MBB.front() != MBBI &&
238 prior(MBBI)->getOpcode() == ARM::tPOP) {
239 MachineBasicBlock::iterator PMBBI = prior(MBBI);
240 emitSPUpdate(MBB, PMBBI, TII, dl, *RegInfo, NumBytes);
242 emitSPUpdate(MBB, MBBI, TII, dl, *RegInfo, NumBytes);
247 // Unlike T2 and ARM mode, the T1 pop instruction cannot restore
248 // to LR, and we can't pop the value directly to the PC since
249 // we need to update the SP after popping the value. Therefore, we
250 // pop the old LR into R3 as a temporary.
252 // Move back past the callee-saved register restoration
253 while (MBBI != MBB.end() && isCSRestore(MBBI, CSRegs))
255 // Epilogue for vararg functions: pop LR to R3 and branch off it.
256 AddDefaultPred(BuildMI(MBB, MBBI, dl, TII.get(ARM::tPOP)))
257 .addReg(ARM::R3, RegState::Define);
259 emitSPUpdate(MBB, MBBI, TII, dl, *RegInfo, VARegSaveSize);
261 BuildMI(MBB, MBBI, dl, TII.get(ARM::tBX_RET_vararg))
262 .addReg(ARM::R3, RegState::Kill);
263 // erase the old tBX_RET instruction