1 //===-- Thumb1FrameLowering.cpp - Thumb1 Frame Information ----------------===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file contains the Thumb1 implementation of TargetFrameLowering class.
12 //===----------------------------------------------------------------------===//
14 #include "Thumb1FrameLowering.h"
15 #include "ARMMachineFunctionInfo.h"
16 #include "llvm/CodeGen/MachineFrameInfo.h"
17 #include "llvm/CodeGen/MachineFunction.h"
18 #include "llvm/CodeGen/MachineInstrBuilder.h"
19 #include "llvm/CodeGen/MachineRegisterInfo.h"
23 bool Thumb1FrameLowering::hasReservedCallFrame(const MachineFunction &MF) const{
24 const MachineFrameInfo *FFI = MF.getFrameInfo();
25 unsigned CFSize = FFI->getMaxCallFrameSize();
26 // It's not always a good idea to include the call frame as part of the
27 // stack frame. ARM (especially Thumb) has small immediate offset to
28 // address the stack frame. So a large call frame can cause poor codegen
29 // and may even makes it impossible to scavenge a register.
30 if (CFSize >= ((1 << 8) - 1) * 4 / 2) // Half of imm8 * 4
33 return !MF.getFrameInfo()->hasVarSizedObjects();
37 emitSPUpdate(MachineBasicBlock &MBB,
38 MachineBasicBlock::iterator &MBBI,
39 const TargetInstrInfo &TII, DebugLoc dl,
40 const Thumb1RegisterInfo &MRI,
41 int NumBytes, unsigned MIFlags = MachineInstr::NoFlags) {
42 emitThumbRegPlusImmediate(MBB, MBBI, dl, ARM::SP, ARM::SP, NumBytes, TII,
46 void Thumb1FrameLowering::emitPrologue(MachineFunction &MF) const {
47 MachineBasicBlock &MBB = MF.front();
48 MachineBasicBlock::iterator MBBI = MBB.begin();
49 MachineFrameInfo *MFI = MF.getFrameInfo();
50 ARMFunctionInfo *AFI = MF.getInfo<ARMFunctionInfo>();
51 const Thumb1RegisterInfo *RegInfo =
52 static_cast<const Thumb1RegisterInfo*>(MF.getTarget().getRegisterInfo());
53 const Thumb1InstrInfo &TII =
54 *static_cast<const Thumb1InstrInfo*>(MF.getTarget().getInstrInfo());
56 unsigned VARegSaveSize = AFI->getVarArgsRegSaveSize();
57 unsigned NumBytes = MFI->getStackSize();
58 const std::vector<CalleeSavedInfo> &CSI = MFI->getCalleeSavedInfo();
59 DebugLoc dl = MBBI != MBB.end() ? MBBI->getDebugLoc() : DebugLoc();
60 unsigned FramePtr = RegInfo->getFrameRegister(MF);
61 unsigned BasePtr = RegInfo->getBaseRegister();
63 // Thumb add/sub sp, imm8 instructions implicitly multiply the offset by 4.
64 NumBytes = (NumBytes + 3) & ~3;
65 MFI->setStackSize(NumBytes);
67 // Determine the sizes of each callee-save spill areas and record which frame
68 // belongs to which callee-save spill areas.
69 unsigned GPRCS1Size = 0, GPRCS2Size = 0, DPRCSSize = 0;
70 int FramePtrSpillFI = 0;
73 emitSPUpdate(MBB, MBBI, TII, dl, *RegInfo, -VARegSaveSize,
74 MachineInstr::FrameSetup);
76 if (!AFI->hasStackFrame()) {
78 emitSPUpdate(MBB, MBBI, TII, dl, *RegInfo, -NumBytes,
79 MachineInstr::FrameSetup);
83 for (unsigned i = 0, e = CSI.size(); i != e; ++i) {
84 unsigned Reg = CSI[i].getReg();
85 int FI = CSI[i].getFrameIdx();
94 AFI->addGPRCalleeSavedArea1Frame(FI);
102 FramePtrSpillFI = FI;
103 if (STI.isTargetIOS()) {
104 AFI->addGPRCalleeSavedArea2Frame(FI);
107 AFI->addGPRCalleeSavedArea1Frame(FI);
112 AFI->addDPRCalleeSavedAreaFrame(FI);
117 if (MBBI != MBB.end() && MBBI->getOpcode() == ARM::tPUSH) {
119 if (MBBI != MBB.end())
120 dl = MBBI->getDebugLoc();
123 // Determine starting offsets of spill areas.
124 unsigned DPRCSOffset = NumBytes - (GPRCS1Size + GPRCS2Size + DPRCSSize);
125 unsigned GPRCS2Offset = DPRCSOffset + DPRCSSize;
126 unsigned GPRCS1Offset = GPRCS2Offset + GPRCS2Size;
127 AFI->setFramePtrSpillOffset(MFI->getObjectOffset(FramePtrSpillFI) + NumBytes);
128 AFI->setGPRCalleeSavedArea1Offset(GPRCS1Offset);
129 AFI->setGPRCalleeSavedArea2Offset(GPRCS2Offset);
130 AFI->setDPRCalleeSavedAreaOffset(DPRCSOffset);
131 NumBytes = DPRCSOffset;
133 // Adjust FP so it point to the stack slot that contains the previous FP.
135 AddDefaultPred(BuildMI(MBB, MBBI, dl, TII.get(ARM::tADDrSPi), FramePtr)
136 .addFrameIndex(FramePtrSpillFI).addImm(0)
137 .setMIFlags(MachineInstr::FrameSetup));
139 // If offset is > 508 then sp cannot be adjusted in a single instruction,
140 // try restoring from fp instead.
141 AFI->setShouldRestoreSPFromFP(true);
145 // Insert it after all the callee-save spills.
146 emitSPUpdate(MBB, MBBI, TII, dl, *RegInfo, -NumBytes,
147 MachineInstr::FrameSetup);
149 if (STI.isTargetELF() && hasFP(MF))
150 MFI->setOffsetAdjustment(MFI->getOffsetAdjustment() -
151 AFI->getFramePtrSpillOffset());
153 AFI->setGPRCalleeSavedArea1Size(GPRCS1Size);
154 AFI->setGPRCalleeSavedArea2Size(GPRCS2Size);
155 AFI->setDPRCalleeSavedAreaSize(DPRCSSize);
157 // Thumb1 does not currently support dynamic stack realignment. Report a
158 // fatal error rather then silently generate bad code.
159 if (RegInfo->needsStackRealignment(MF))
160 report_fatal_error("Dynamic stack realignment not supported for thumb1.");
162 // If we need a base pointer, set it up here. It's whatever the value
163 // of the stack pointer is at this point. Any variable size objects
164 // will be allocated after this, so we can still use the base pointer
165 // to reference locals.
166 if (RegInfo->hasBasePointer(MF))
167 AddDefaultPred(BuildMI(MBB, MBBI, dl, TII.get(ARM::tMOVr), BasePtr)
170 // If the frame has variable sized objects then the epilogue must restore
171 // the sp from fp. We can assume there's an FP here since hasFP already
172 // checks for hasVarSizedObjects.
173 if (MFI->hasVarSizedObjects())
174 AFI->setShouldRestoreSPFromFP(true);
177 static bool isCalleeSavedRegister(unsigned Reg, const uint16_t *CSRegs) {
178 for (unsigned i = 0; CSRegs[i]; ++i)
179 if (Reg == CSRegs[i])
184 static bool isCSRestore(MachineInstr *MI, const uint16_t *CSRegs) {
185 if (MI->getOpcode() == ARM::tLDRspi &&
186 MI->getOperand(1).isFI() &&
187 isCalleeSavedRegister(MI->getOperand(0).getReg(), CSRegs))
189 else if (MI->getOpcode() == ARM::tPOP) {
190 // The first two operands are predicates. The last two are
191 // imp-def and imp-use of SP. Check everything in between.
192 for (int i = 2, e = MI->getNumOperands() - 2; i != e; ++i)
193 if (!isCalleeSavedRegister(MI->getOperand(i).getReg(), CSRegs))
200 void Thumb1FrameLowering::emitEpilogue(MachineFunction &MF,
201 MachineBasicBlock &MBB) const {
202 MachineBasicBlock::iterator MBBI = MBB.getLastNonDebugInstr();
203 assert((MBBI->getOpcode() == ARM::tBX_RET ||
204 MBBI->getOpcode() == ARM::tPOP_RET) &&
205 "Can only insert epilog into returning blocks");
206 DebugLoc dl = MBBI->getDebugLoc();
207 MachineFrameInfo *MFI = MF.getFrameInfo();
208 ARMFunctionInfo *AFI = MF.getInfo<ARMFunctionInfo>();
209 const Thumb1RegisterInfo *RegInfo =
210 static_cast<const Thumb1RegisterInfo*>(MF.getTarget().getRegisterInfo());
211 const Thumb1InstrInfo &TII =
212 *static_cast<const Thumb1InstrInfo*>(MF.getTarget().getInstrInfo());
214 unsigned VARegSaveSize = AFI->getVarArgsRegSaveSize();
215 int NumBytes = (int)MFI->getStackSize();
216 const uint16_t *CSRegs = RegInfo->getCalleeSavedRegs();
217 unsigned FramePtr = RegInfo->getFrameRegister(MF);
219 if (!AFI->hasStackFrame()) {
221 emitSPUpdate(MBB, MBBI, TII, dl, *RegInfo, NumBytes);
223 // Unwind MBBI to point to first LDR / VLDRD.
224 if (MBBI != MBB.begin()) {
227 while (MBBI != MBB.begin() && isCSRestore(MBBI, CSRegs));
228 if (!isCSRestore(MBBI, CSRegs))
232 // Move SP to start of FP callee save spill area.
233 NumBytes -= (AFI->getGPRCalleeSavedArea1Size() +
234 AFI->getGPRCalleeSavedArea2Size() +
235 AFI->getDPRCalleeSavedAreaSize());
237 if (AFI->shouldRestoreSPFromFP()) {
238 NumBytes = AFI->getFramePtrSpillOffset() - NumBytes;
239 // Reset SP based on frame pointer only if the stack frame extends beyond
240 // frame pointer stack slot, the target is ELF and the function has FP, or
241 // the target uses var sized objects.
243 assert(MF.getRegInfo().isPhysRegUsed(ARM::R4) &&
244 "No scratch register to restore SP from FP!");
245 emitThumbRegPlusImmediate(MBB, MBBI, dl, ARM::R4, FramePtr, -NumBytes,
247 AddDefaultPred(BuildMI(MBB, MBBI, dl, TII.get(ARM::tMOVr),
251 AddDefaultPred(BuildMI(MBB, MBBI, dl, TII.get(ARM::tMOVr),
255 if (MBBI->getOpcode() == ARM::tBX_RET &&
256 &MBB.front() != MBBI &&
257 prior(MBBI)->getOpcode() == ARM::tPOP) {
258 MachineBasicBlock::iterator PMBBI = prior(MBBI);
259 emitSPUpdate(MBB, PMBBI, TII, dl, *RegInfo, NumBytes);
261 emitSPUpdate(MBB, MBBI, TII, dl, *RegInfo, NumBytes);
266 // Unlike T2 and ARM mode, the T1 pop instruction cannot restore
267 // to LR, and we can't pop the value directly to the PC since
268 // we need to update the SP after popping the value. Therefore, we
269 // pop the old LR into R3 as a temporary.
271 // Move back past the callee-saved register restoration
272 while (MBBI != MBB.end() && isCSRestore(MBBI, CSRegs))
274 // Epilogue for vararg functions: pop LR to R3 and branch off it.
275 AddDefaultPred(BuildMI(MBB, MBBI, dl, TII.get(ARM::tPOP)))
276 .addReg(ARM::R3, RegState::Define);
278 emitSPUpdate(MBB, MBBI, TII, dl, *RegInfo, VARegSaveSize);
280 MachineInstrBuilder MIB =
281 BuildMI(MBB, MBBI, dl, TII.get(ARM::tBX_RET_vararg))
282 .addReg(ARM::R3, RegState::Kill);
284 MIB->copyImplicitOps(&*MBBI);
285 // erase the old tBX_RET instruction
290 bool Thumb1FrameLowering::
291 spillCalleeSavedRegisters(MachineBasicBlock &MBB,
292 MachineBasicBlock::iterator MI,
293 const std::vector<CalleeSavedInfo> &CSI,
294 const TargetRegisterInfo *TRI) const {
299 MachineFunction &MF = *MBB.getParent();
300 const TargetInstrInfo &TII = *MF.getTarget().getInstrInfo();
302 if (MI != MBB.end()) DL = MI->getDebugLoc();
304 MachineInstrBuilder MIB = BuildMI(MBB, MI, DL, TII.get(ARM::tPUSH));
306 for (unsigned i = CSI.size(); i != 0; --i) {
307 unsigned Reg = CSI[i-1].getReg();
310 // Add the callee-saved register as live-in unless it's LR and
311 // @llvm.returnaddress is called. If LR is returned for @llvm.returnaddress
312 // then it's already added to the function and entry block live-in sets.
313 if (Reg == ARM::LR) {
314 MachineFunction &MF = *MBB.getParent();
315 if (MF.getFrameInfo()->isReturnAddressTaken() &&
316 MF.getRegInfo().isLiveIn(Reg))
323 MIB.addReg(Reg, getKillRegState(isKill));
325 MIB.setMIFlags(MachineInstr::FrameSetup);
329 bool Thumb1FrameLowering::
330 restoreCalleeSavedRegisters(MachineBasicBlock &MBB,
331 MachineBasicBlock::iterator MI,
332 const std::vector<CalleeSavedInfo> &CSI,
333 const TargetRegisterInfo *TRI) const {
337 MachineFunction &MF = *MBB.getParent();
338 ARMFunctionInfo *AFI = MF.getInfo<ARMFunctionInfo>();
339 const TargetInstrInfo &TII = *MF.getTarget().getInstrInfo();
341 bool isVarArg = AFI->getVarArgsRegSaveSize() > 0;
342 DebugLoc DL = MI->getDebugLoc();
343 MachineInstrBuilder MIB = BuildMI(MF, DL, TII.get(ARM::tPOP));
346 bool NumRegs = false;
347 for (unsigned i = CSI.size(); i != 0; --i) {
348 unsigned Reg = CSI[i-1].getReg();
349 if (Reg == ARM::LR) {
350 // Special epilogue for vararg functions. See emitEpilogue
354 (*MIB).setDesc(TII.get(ARM::tPOP_RET));
355 MIB->copyImplicitOps(&*MI);
358 MIB.addReg(Reg, getDefRegState(true));
362 // It's illegal to emit pop instruction without operands.
364 MBB.insert(MI, &*MIB);
366 MF.DeleteMachineInstr(MIB);