1 //===-- Thumb1InstrInfo.cpp - Thumb-1 Instruction Information -------------===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file contains the Thumb-1 implementation of the TargetInstrInfo class.
12 //===----------------------------------------------------------------------===//
14 #include "Thumb1InstrInfo.h"
16 #include "llvm/CodeGen/MachineFrameInfo.h"
17 #include "llvm/CodeGen/MachineInstrBuilder.h"
18 #include "llvm/CodeGen/MachineRegisterInfo.h"
19 #include "llvm/CodeGen/MachineMemOperand.h"
20 #include "llvm/ADT/SmallVector.h"
21 #include "llvm/MC/MCInst.h"
25 Thumb1InstrInfo::Thumb1InstrInfo(const ARMSubtarget &STI)
26 : ARMBaseInstrInfo(STI), RI(*this, STI) {
29 /// getNoopForMachoTarget - Return the noop instruction to use for a noop.
30 void Thumb1InstrInfo::getNoopForMachoTarget(MCInst &NopInst) const {
31 NopInst.setOpcode(ARM::tMOVr);
32 NopInst.addOperand(MCOperand::CreateReg(ARM::R8));
33 NopInst.addOperand(MCOperand::CreateReg(ARM::R8));
34 NopInst.addOperand(MCOperand::CreateImm(ARMCC::AL));
35 NopInst.addOperand(MCOperand::CreateReg(0));
38 unsigned Thumb1InstrInfo::getUnindexedOpcode(unsigned Opc) const {
42 void Thumb1InstrInfo::copyPhysReg(MachineBasicBlock &MBB,
43 MachineBasicBlock::iterator I, DebugLoc DL,
44 unsigned DestReg, unsigned SrcReg,
46 AddDefaultPred(BuildMI(MBB, I, DL, get(ARM::tMOVr), DestReg)
47 .addReg(SrcReg, getKillRegState(KillSrc)));
48 assert(ARM::GPRRegClass.contains(DestReg, SrcReg) &&
49 "Thumb1 can only copy GPR registers");
52 void Thumb1InstrInfo::
53 storeRegToStackSlot(MachineBasicBlock &MBB, MachineBasicBlock::iterator I,
54 unsigned SrcReg, bool isKill, int FI,
55 const TargetRegisterClass *RC,
56 const TargetRegisterInfo *TRI) const {
57 assert((RC == ARM::tGPRRegisterClass ||
58 (TargetRegisterInfo::isPhysicalRegister(SrcReg) &&
59 isARMLowRegister(SrcReg))) && "Unknown regclass!");
61 if (RC == ARM::tGPRRegisterClass ||
62 (TargetRegisterInfo::isPhysicalRegister(SrcReg) &&
63 isARMLowRegister(SrcReg))) {
65 if (I != MBB.end()) DL = I->getDebugLoc();
67 MachineFunction &MF = *MBB.getParent();
68 MachineFrameInfo &MFI = *MF.getFrameInfo();
69 MachineMemOperand *MMO =
70 MF.getMachineMemOperand(MachinePointerInfo::getFixedStack(FI),
71 MachineMemOperand::MOStore,
72 MFI.getObjectSize(FI),
73 MFI.getObjectAlignment(FI));
74 AddDefaultPred(BuildMI(MBB, I, DL, get(ARM::tSTRspi))
75 .addReg(SrcReg, getKillRegState(isKill))
76 .addFrameIndex(FI).addImm(0).addMemOperand(MMO));
80 void Thumb1InstrInfo::
81 loadRegFromStackSlot(MachineBasicBlock &MBB, MachineBasicBlock::iterator I,
82 unsigned DestReg, int FI,
83 const TargetRegisterClass *RC,
84 const TargetRegisterInfo *TRI) const {
85 assert((RC == ARM::tGPRRegisterClass ||
86 (TargetRegisterInfo::isPhysicalRegister(DestReg) &&
87 isARMLowRegister(DestReg))) && "Unknown regclass!");
89 if (RC == ARM::tGPRRegisterClass ||
90 (TargetRegisterInfo::isPhysicalRegister(DestReg) &&
91 isARMLowRegister(DestReg))) {
93 if (I != MBB.end()) DL = I->getDebugLoc();
95 MachineFunction &MF = *MBB.getParent();
96 MachineFrameInfo &MFI = *MF.getFrameInfo();
97 MachineMemOperand *MMO =
98 MF.getMachineMemOperand(MachinePointerInfo::getFixedStack(FI),
99 MachineMemOperand::MOLoad,
100 MFI.getObjectSize(FI),
101 MFI.getObjectAlignment(FI));
102 AddDefaultPred(BuildMI(MBB, I, DL, get(ARM::tLDRspi), DestReg)
103 .addFrameIndex(FI).addImm(0).addMemOperand(MMO));