1 //===-- Thumb2ITBlockPass.cpp - Insert Thumb IT blocks ----------*- C++ -*-===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 #define DEBUG_TYPE "thumb2-it"
12 #include "ARMMachineFunctionInfo.h"
13 #include "Thumb2InstrInfo.h"
14 #include "llvm/CodeGen/MachineInstr.h"
15 #include "llvm/CodeGen/MachineInstrBuilder.h"
16 #include "llvm/CodeGen/MachineFunctionPass.h"
17 #include "llvm/ADT/SmallSet.h"
18 #include "llvm/ADT/Statistic.h"
21 STATISTIC(NumITs, "Number of IT blocks inserted");
22 STATISTIC(NumMovedInsts, "Number of predicated instructions moved");
25 class Thumb2ITBlockPass : public MachineFunctionPass {
30 Thumb2ITBlockPass() : MachineFunctionPass(ID) {}
32 const Thumb2InstrInfo *TII;
33 const TargetRegisterInfo *TRI;
36 virtual bool runOnMachineFunction(MachineFunction &Fn);
38 virtual const char *getPassName() const {
39 return "Thumb IT blocks insertion pass";
43 bool MoveCopyOutOfITBlock(MachineInstr *MI,
44 ARMCC::CondCodes CC, ARMCC::CondCodes OCC,
45 SmallSet<unsigned, 4> &Defs,
46 SmallSet<unsigned, 4> &Uses);
47 bool InsertITInstructions(MachineBasicBlock &MBB);
49 char Thumb2ITBlockPass::ID = 0;
52 /// TrackDefUses - Tracking what registers are being defined and used by
53 /// instructions in the IT block. This also tracks "dependencies", i.e. uses
54 /// in the IT block that are defined before the IT instruction.
55 static void TrackDefUses(MachineInstr *MI,
56 SmallSet<unsigned, 4> &Defs,
57 SmallSet<unsigned, 4> &Uses,
58 const TargetRegisterInfo *TRI) {
59 SmallVector<unsigned, 4> LocalDefs;
60 SmallVector<unsigned, 4> LocalUses;
62 for (unsigned i = 0, e = MI->getNumOperands(); i != e; ++i) {
63 MachineOperand &MO = MI->getOperand(i);
66 unsigned Reg = MO.getReg();
67 if (!Reg || Reg == ARM::ITSTATE || Reg == ARM::SP)
70 LocalUses.push_back(Reg);
72 LocalDefs.push_back(Reg);
75 for (unsigned i = 0, e = LocalUses.size(); i != e; ++i) {
76 unsigned Reg = LocalUses[i];
78 for (const unsigned *Subreg = TRI->getSubRegisters(Reg);
83 for (unsigned i = 0, e = LocalDefs.size(); i != e; ++i) {
84 unsigned Reg = LocalDefs[i];
86 for (const unsigned *Subreg = TRI->getSubRegisters(Reg);
94 static bool isCopy(MachineInstr *MI) {
95 switch (MI->getOpcode()) {
107 Thumb2ITBlockPass::MoveCopyOutOfITBlock(MachineInstr *MI,
108 ARMCC::CondCodes CC, ARMCC::CondCodes OCC,
109 SmallSet<unsigned, 4> &Defs,
110 SmallSet<unsigned, 4> &Uses) {
113 // llvm models select's as two-address instructions. That means a copy
114 // is inserted before a t2MOVccr, etc. If the copy is scheduled in
115 // between selects we would end up creating multiple IT blocks.
116 assert(MI->getOperand(0).getSubReg() == 0 &&
117 MI->getOperand(1).getSubReg() == 0 &&
118 "Sub-register indices still around?");
120 unsigned DstReg = MI->getOperand(0).getReg();
121 unsigned SrcReg = MI->getOperand(1).getReg();
123 // First check if it's safe to move it.
124 if (Uses.count(DstReg) || Defs.count(SrcReg))
127 // If the CPSR is defined by this copy, then we don't want to move it. E.g.,
135 // we don't want this to be converted to:
143 const MCInstrDesc &MCID = MI->getDesc();
144 if (MI->hasOptionalDef() &&
145 MI->getOperand(MCID.getNumOperands() - 1).getReg() == ARM::CPSR)
148 // Then peek at the next instruction to see if it's predicated on CC or OCC.
149 // If not, then there is nothing to be gained by moving the copy.
150 MachineBasicBlock::iterator I = MI; ++I;
151 MachineBasicBlock::iterator E = MI->getParent()->end();
152 while (I != E && I->isDebugValue())
155 unsigned NPredReg = 0;
156 ARMCC::CondCodes NCC = llvm::getITInstrPredicate(I, NPredReg);
157 if (NCC == CC || NCC == OCC)
163 bool Thumb2ITBlockPass::InsertITInstructions(MachineBasicBlock &MBB) {
164 bool Modified = false;
166 SmallSet<unsigned, 4> Defs;
167 SmallSet<unsigned, 4> Uses;
168 MachineBasicBlock::iterator MBBI = MBB.begin(), E = MBB.end();
170 MachineInstr *MI = &*MBBI;
171 DebugLoc dl = MI->getDebugLoc();
172 unsigned PredReg = 0;
173 ARMCC::CondCodes CC = llvm::getITInstrPredicate(MI, PredReg);
174 if (CC == ARMCC::AL) {
181 TrackDefUses(MI, Defs, Uses, TRI);
183 // Insert an IT instruction.
184 MachineInstrBuilder MIB = BuildMI(MBB, MBBI, dl, TII->get(ARM::t2IT))
187 // Add implicit use of ITSTATE to IT block instructions.
188 MI->addOperand(MachineOperand::CreateReg(ARM::ITSTATE, false/*ifDef*/,
189 true/*isImp*/, false/*isKill*/));
191 MachineInstr *LastITMI = MI;
192 MachineBasicBlock::iterator InsertPos = MIB;
196 ARMCC::CondCodes OCC = ARMCC::getOppositeCondition(CC);
197 unsigned Mask = 0, Pos = 3;
198 // Branches, including tricky ones like LDM_RET, need to end an IT
199 // block so check the instruction we just put in the block.
200 for (; MBBI != E && Pos &&
201 (!MI->isBranch() && !MI->isReturn()) ; ++MBBI) {
202 if (MBBI->isDebugValue())
205 MachineInstr *NMI = &*MBBI;
208 unsigned NPredReg = 0;
209 ARMCC::CondCodes NCC = llvm::getITInstrPredicate(NMI, NPredReg);
210 if (NCC == CC || NCC == OCC) {
211 Mask |= (NCC & 1) << Pos;
212 // Add implicit use of ITSTATE.
213 NMI->addOperand(MachineOperand::CreateReg(ARM::ITSTATE, false/*ifDef*/,
214 true/*isImp*/, false/*isKill*/));
217 if (NCC == ARMCC::AL &&
218 MoveCopyOutOfITBlock(NMI, CC, OCC, Defs, Uses)) {
221 MBB.insert(InsertPos, NMI);
227 TrackDefUses(NMI, Defs, Uses, TRI);
233 // Tag along (firstcond[0] << 4) with the mask.
234 Mask |= (CC & 1) << 4;
237 // Last instruction in IT block kills ITSTATE.
238 LastITMI->findRegisterUseOperand(ARM::ITSTATE)->setIsKill();
247 bool Thumb2ITBlockPass::runOnMachineFunction(MachineFunction &Fn) {
248 const TargetMachine &TM = Fn.getTarget();
249 AFI = Fn.getInfo<ARMFunctionInfo>();
250 TII = static_cast<const Thumb2InstrInfo*>(TM.getInstrInfo());
251 TRI = TM.getRegisterInfo();
253 if (!AFI->isThumbFunction())
256 bool Modified = false;
257 for (MachineFunction::iterator MFI = Fn.begin(), E = Fn.end(); MFI != E; ) {
258 MachineBasicBlock &MBB = *MFI;
260 Modified |= InsertITInstructions(MBB);
264 AFI->setHasITBlocks(true);
269 /// createThumb2ITBlockPass - Returns an instance of the Thumb2 IT blocks
271 FunctionPass *llvm::createThumb2ITBlockPass() {
272 return new Thumb2ITBlockPass();