1 //===- Thumb2InstrInfo.cpp - Thumb-2 Instruction Information --------*- C++ -*-===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file contains the Thumb-2 implementation of the TargetInstrInfo class.
12 //===----------------------------------------------------------------------===//
14 #include "ARMInstrInfo.h"
16 #include "ARMGenInstrInfo.inc"
17 #include "ARMMachineFunctionInfo.h"
18 #include "llvm/CodeGen/MachineFrameInfo.h"
19 #include "llvm/CodeGen/MachineInstrBuilder.h"
20 #include "llvm/ADT/SmallVector.h"
21 #include "Thumb2InstrInfo.h"
25 Thumb2InstrInfo::Thumb2InstrInfo(const ARMSubtarget &STI)
26 : ARMBaseInstrInfo(STI), RI(*this, STI) {
29 unsigned Thumb2InstrInfo::getUnindexedOpcode(unsigned Opc) const {
34 unsigned Thumb2InstrInfo::getOpcode(ARMII::Op Op) const {
36 case ARMII::ADDri: return ARM::t2ADDri;
37 case ARMII::ADDrs: return ARM::t2ADDrs;
38 case ARMII::ADDrr: return ARM::t2ADDrr;
39 case ARMII::B: return ARM::t2B;
40 case ARMII::Bcc: return ARM::t2Bcc;
41 case ARMII::BR_JTr: return ARM::t2BR_JTr;
42 case ARMII::BR_JTm: return ARM::t2BR_JTm;
43 case ARMII::BR_JTadd: return ARM::t2BR_JTadd;
44 case ARMII::BX_RET: return ARM::tBX_RET;
45 case ARMII::LDRrr: return ARM::t2LDRs;
46 case ARMII::LDRri: return ARM::t2LDRi12;
47 case ARMII::MOVr: return ARM::t2MOVr;
48 case ARMII::STRrr: return ARM::t2STRs;
49 case ARMII::STRri: return ARM::t2STRi12;
50 case ARMII::SUBri: return ARM::t2SUBri;
51 case ARMII::SUBrs: return ARM::t2SUBrs;
52 case ARMII::SUBrr: return ARM::t2SUBrr;
61 Thumb2InstrInfo::BlockHasNoFallThrough(const MachineBasicBlock &MBB) const {
62 if (MBB.empty()) return false;
64 switch (MBB.back().getOpcode()) {
66 case ARM::t2B: // Uncond branch.
67 case ARM::t2BR_JTr: // Jumptable branch.
68 case ARM::t2BR_JTm: // Jumptable branch through mem.
69 case ARM::t2BR_JTadd: // Jumptable branch add to pc.
70 case ARM::tBR_JTr: // Jumptable branch (16-bit version).
72 case ARM::tBX_RET_vararg:
84 Thumb2InstrInfo::copyRegToReg(MachineBasicBlock &MBB,
85 MachineBasicBlock::iterator I,
86 unsigned DestReg, unsigned SrcReg,
87 const TargetRegisterClass *DestRC,
88 const TargetRegisterClass *SrcRC) const {
89 DebugLoc DL = DebugLoc::getUnknownLoc();
90 if (I != MBB.end()) DL = I->getDebugLoc();
92 if ((DestRC == ARM::GPRRegisterClass &&
93 SrcRC == ARM::tGPRRegisterClass) ||
94 (DestRC == ARM::tGPRRegisterClass &&
95 SrcRC == ARM::GPRRegisterClass)) {
96 AddDefaultCC(AddDefaultPred(BuildMI(MBB, I, DL, get(getOpcode(ARMII::MOVr)),
97 DestReg).addReg(SrcReg)));
101 return ARMBaseInstrInfo::copyRegToReg(MBB, I, DestReg, SrcReg, DestRC, SrcRC);