1 //=====---- ARM64Subtarget.h - Define Subtarget for the ARM64 -*- C++ -*--====//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file declares the ARM64 specific subclass of TargetSubtarget.
12 //===----------------------------------------------------------------------===//
14 #ifndef ARM64SUBTARGET_H
15 #define ARM64SUBTARGET_H
17 #include "llvm/Target/TargetSubtargetInfo.h"
18 #include "ARM64RegisterInfo.h"
21 #define GET_SUBTARGETINFO_HEADER
22 #include "ARM64GenSubtargetInfo.inc"
28 class ARM64Subtarget : public ARM64GenSubtargetInfo {
30 enum ARMProcFamilyEnum {Others, CortexA53, CortexA57, Cyclone};
32 /// ARMProcFamily - ARM processor family: Cortex-A53, Cortex-A57, and others.
33 ARMProcFamilyEnum ARMProcFamily;
39 // HasZeroCycleRegMove - Has zero-cycle register mov instructions.
40 bool HasZeroCycleRegMove;
42 // HasZeroCycleZeroing - Has zero-cycle zeroing instructions.
43 bool HasZeroCycleZeroing;
45 /// CPUString - String name of used CPU.
46 std::string CPUString;
48 /// TargetTriple - What processor and OS we're targeting.
51 /// IsLittleEndian - Is the target little endian?
55 /// This constructor initializes the data members to match that
56 /// of the specified triple.
57 ARM64Subtarget(const std::string &TT, const std::string &CPU,
58 const std::string &FS, bool LittleEndian);
60 bool enableMachineScheduler() const override { return true; }
62 bool hasZeroCycleRegMove() const { return HasZeroCycleRegMove; }
64 bool hasZeroCycleZeroing() const { return HasZeroCycleZeroing; }
66 bool hasFPARMv8() const { return HasFPARMv8; }
67 bool hasNEON() const { return HasNEON; }
68 bool hasCrypto() const { return HasCrypto; }
70 bool isLittleEndian() const { return IsLittleEndian; }
72 bool isTargetDarwin() const { return TargetTriple.isOSDarwin(); }
74 bool isTargetELF() const { return TargetTriple.isOSBinFormatELF(); }
76 bool isTargetMachO() const { return TargetTriple.isOSBinFormatMachO(); }
78 bool isCyclone() const { return CPUString == "cyclone"; }
80 /// getMaxInlineSizeThreshold - Returns the maximum memset / memcpy size
81 /// that still makes it profitable to inline the call.
82 unsigned getMaxInlineSizeThreshold() const { return 64; }
84 /// ParseSubtargetFeatures - Parses features string setting specified
85 /// subtarget options. Definition of function is auto generated by tblgen.
86 void ParseSubtargetFeatures(StringRef CPU, StringRef FS);
88 /// ClassifyGlobalReference - Find the target operand flags that describe
89 /// how a global value should be referenced for the current subtarget.
90 unsigned char ClassifyGlobalReference(const GlobalValue *GV,
91 const TargetMachine &TM) const;
93 /// This function returns the name of a function which has an interface
94 /// like the non-standard bzero function, if such a function exists on
95 /// the current subtarget and it is considered prefereable over
96 /// memset with zero passed as the second argument. Otherwise it
98 const char *getBZeroEntry() const;
100 void overrideSchedPolicy(MachineSchedPolicy &Policy, MachineInstr *begin,
101 MachineInstr *end, unsigned NumRegionInstrs) const;
103 } // End llvm namespace
105 #endif // ARM64SUBTARGET_H