lib/Target/ARM64/MCTargetDesc/ARM64MCTargetDesc.cpp

   1 //===-- ARM64MCTargetDesc.cpp - ARM64 Target Descriptions -------*- C++ -*-===//
   2 //
   3 //                     The LLVM Compiler Infrastructure
   4 //
   5 // This file is distributed under the University of Illinois Open Source
   6 // License. See LICENSE.TXT for details.
   7 //
   8 //===----------------------------------------------------------------------===//
   9 //
  10 // This file provides ARM64 specific target descriptions.
  11 //
  12 //===----------------------------------------------------------------------===//
  13
  14 #include "ARM64MCTargetDesc.h"
  15 #include "ARM64ELFStreamer.h"
  16 #include "ARM64MCAsmInfo.h"
  17 #include "InstPrinter/ARM64InstPrinter.h"
  18 #include "llvm/MC/MCCodeGenInfo.h"
  19 #include "llvm/MC/MCInstrInfo.h"
  20 #include "llvm/MC/MCRegisterInfo.h"
  21 #include "llvm/MC/MCStreamer.h"
  22 #include "llvm/MC/MCSubtargetInfo.h"
  23 #include "llvm/Support/ErrorHandling.h"
  24 #include "llvm/Support/TargetRegistry.h"
  25
  26 #define GET_INSTRINFO_MC_DESC
  27 #include "ARM64GenInstrInfo.inc"
  28
  29 #define GET_SUBTARGETINFO_MC_DESC
  30 #include "ARM64GenSubtargetInfo.inc"
  31
  32 #define GET_REGINFO_MC_DESC
  33 #include "ARM64GenRegisterInfo.inc"
  34
  35 using namespace llvm;
  36
  37 static MCInstrInfo *createARM64MCInstrInfo() {
  38   MCInstrInfo *X = new MCInstrInfo();
  39   InitARM64MCInstrInfo(X);
  40   return X;
  41 }
  42
  43 static MCSubtargetInfo *createARM64MCSubtargetInfo(StringRef TT, StringRef CPU,
  44                                                    StringRef FS) {
  45   MCSubtargetInfo *X = new MCSubtargetInfo();
  46   InitARM64MCSubtargetInfo(X, TT, CPU, FS);
  47   return X;
  48 }
  49
  50 static MCRegisterInfo *createARM64MCRegisterInfo(StringRef Triple) {
  51   MCRegisterInfo *X = new MCRegisterInfo();
  52   InitARM64MCRegisterInfo(X, ARM64::LR);
  53   return X;
  54 }
  55
  56 static MCAsmInfo *createARM64MCAsmInfo(const MCRegisterInfo &MRI,
  57                                        StringRef TT) {
  58   Triple TheTriple(TT);
  59
  60   MCAsmInfo *MAI;
  61   if (TheTriple.isOSDarwin())
  62     MAI = new ARM64MCAsmInfoDarwin();
  63   else {
  64     assert(TheTriple.isOSBinFormatELF() && "Only expect Darwin or ELF");
  65     MAI = new ARM64MCAsmInfoELF();
  66   }
  67
  68   // Initial state of the frame pointer is SP.
  69   unsigned Reg = MRI.getDwarfRegNum(ARM64::SP, true);
  70   MCCFIInstruction Inst = MCCFIInstruction::createDefCfa(0, Reg, 0);
  71   MAI->addInitialFrameState(Inst);
  72
  73   return MAI;
  74 }
  75
  76 MCCodeGenInfo *createARM64MCCodeGenInfo(StringRef TT, Reloc::Model RM,
  77                                         CodeModel::Model CM,
  78                                         CodeGenOpt::Level OL) {
  79   Triple TheTriple(TT);
  80   assert((TheTriple.isOSBinFormatELF() || TheTriple.isOSBinFormatMachO()) &&
  81          "Only expect Darwin and ELF targets");
  82
  83   if (CM == CodeModel::Default)
  84     CM = CodeModel::Small;
  85   // The default MCJIT memory managers make no guarantees about where they can
  86   // find an executable page; JITed code needs to be able to refer to globals
  87   // no matter how far away they are.
  88   else if (CM == CodeModel::JITDefault)
  89     CM = CodeModel::Large;
  90   else if (CM != CodeModel::Small && CM != CodeModel::Large)
  91     report_fatal_error("Only small and large code models are allowed on ARM64");
  92
  93   // ARM64 Darwin is always PIC.
  94   if (TheTriple.isOSDarwin())
  95     RM = Reloc::PIC_;
  96   // On ELF platforms the default static relocation model has a smart enough
  97   // linker to cope with referencing external symbols defined in a shared
  98   // library. Hence DynamicNoPIC doesn't need to be promoted to PIC.
  99   else if (RM == Reloc::Default || RM == Reloc::DynamicNoPIC)
 100     RM = Reloc::Static;
 101
 102   MCCodeGenInfo *X = new MCCodeGenInfo();
 103   X->InitMCCodeGenInfo(RM, CM, OL);
 104   return X;
 105 }
 106
 107 static MCInstPrinter *createARM64MCInstPrinter(const Target &T,
 108                                                unsigned SyntaxVariant,
 109                                                const MCAsmInfo &MAI,
 110                                                const MCInstrInfo &MII,
 111                                                const MCRegisterInfo &MRI,
 112                                                const MCSubtargetInfo &STI) {
 113   if (SyntaxVariant == 0)
 114     return new ARM64InstPrinter(MAI, MII, MRI, STI);
 115   if (SyntaxVariant == 1)
 116     return new ARM64AppleInstPrinter(MAI, MII, MRI, STI);
 117
 118   return 0;
 119 }
 120
 121 static MCStreamer *createMCStreamer(const Target &T, StringRef TT,
 122                                     MCContext &Ctx, MCAsmBackend &TAB,
 123                                     raw_ostream &OS, MCCodeEmitter *Emitter,
 124                                     const MCSubtargetInfo &STI, bool RelaxAll,
 125                                     bool NoExecStack) {
 126   Triple TheTriple(TT);
 127
 128   if (TheTriple.isOSDarwin())
 129     return createMachOStreamer(Ctx, TAB, OS, Emitter, RelaxAll,
 130                                /*LabelSections*/ true);
 131
 132   return createARM64ELFStreamer(Ctx, TAB, OS, Emitter, RelaxAll, NoExecStack);
 133 }
 134
 135 // Force static initialization.
 136 extern "C" void LLVMInitializeARM64TargetMC() {
 137   // Register the MC asm info.
 138   RegisterMCAsmInfoFn X(TheARM64Target, createARM64MCAsmInfo);
 139
 140   // Register the MC codegen info.
 141   TargetRegistry::RegisterMCCodeGenInfo(TheARM64Target,
 142                                         createARM64MCCodeGenInfo);
 143
 144   // Register the MC instruction info.
 145   TargetRegistry::RegisterMCInstrInfo(TheARM64Target, createARM64MCInstrInfo);
 146
 147   // Register the MC register info.
 148   TargetRegistry::RegisterMCRegInfo(TheARM64Target, createARM64MCRegisterInfo);
 149
 150   // Register the MC subtarget info.
 151   TargetRegistry::RegisterMCSubtargetInfo(TheARM64Target,
 152                                           createARM64MCSubtargetInfo);
 153
 154   // Register the asm backend.
 155   TargetRegistry::RegisterMCAsmBackend(TheARM64Target, createARM64AsmBackend);
 156
 157   // Register the MC Code Emitter
 158   TargetRegistry::RegisterMCCodeEmitter(TheARM64Target,
 159                                         createARM64MCCodeEmitter);
 160
 161   // Register the object streamer.
 162   TargetRegistry::RegisterMCObjectStreamer(TheARM64Target, createMCStreamer);
 163
 164   // Register the MCInstPrinter.
 165   TargetRegistry::RegisterMCInstPrinter(TheARM64Target,
 166                                         createARM64MCInstPrinter);
 167 }