1 //===- Alpha.td - Describe the Alpha Target Machine --------*- tablegen -*-===//
3 // The LLVM Compiler Infrastructure
5 // This file was developed by the LLVM research group and is distributed under
6 // the University of Illinois Open Source License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
11 //===----------------------------------------------------------------------===//
13 // Get the target-independent interfaces which we are implementing...
15 include "../Target.td"
17 //Alpha is little endian
19 //===----------------------------------------------------------------------===//
21 //===----------------------------------------------------------------------===//
23 def FeatureCIX : SubtargetFeature<"CIX", "HasCT", "true",
24 "Enable CIX extentions">;
25 def FeatureFIX : SubtargetFeature<"FIX", "HasF2I", "true",
26 "Enable FIX extentions">;
28 //===----------------------------------------------------------------------===//
29 // Register File Description
30 //===----------------------------------------------------------------------===//
32 include "AlphaRegisterInfo.td"
34 //===----------------------------------------------------------------------===//
35 // Schedule Description
36 //===----------------------------------------------------------------------===//
38 include "AlphaSchedule.td"
40 //===----------------------------------------------------------------------===//
41 // Instruction Descriptions
42 //===----------------------------------------------------------------------===//
44 include "AlphaInstrInfo.td"
46 def AlphaInstrInfo : InstrInfo {
47 // Define how we want to layout our target-specific information field.
48 // let TSFlagsFields = [];
49 // let TSFlagsShifts = [];
52 //===----------------------------------------------------------------------===//
53 // Alpha Processor Definitions
54 //===----------------------------------------------------------------------===//
56 def : Processor<"generic", Alpha21264Itineraries, []>;
57 def : Processor<"pca56" , Alpha21264Itineraries, []>;
58 def : Processor<"ev56" , Alpha21264Itineraries, []>;
59 def : Processor<"ev6" , Alpha21264Itineraries, [FeatureFIX]>;
60 def : Processor<"ev67" , Alpha21264Itineraries, [FeatureFIX, FeatureCIX]>;
62 //===----------------------------------------------------------------------===//
64 //===----------------------------------------------------------------------===//
68 // Pointers on Alpha are 64-bits in size.
69 let PointerType = i64;
71 let CalleeSavedRegisters =
73 [R9, R10, R11, R12, R13, R14,
80 F2, F3, F4, F5, F6, F7, F8, F9];
82 // Pull in Instruction Info:
83 let InstructionSet = AlphaInstrInfo;