1 //===-- Alpha/AlphaCodeEmitter.cpp - Convert Alpha code to machine code ---===//
3 // The LLVM Compiler Infrastructure
5 // This file was developed by the LLVM research group and is distributed under
6 // the University of Illinois Open Source License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file contains the pass that transforms the Alpha machine instructions
11 // into relocatable machine code.
13 //===----------------------------------------------------------------------===//
15 #include "AlphaTargetMachine.h"
16 #include "AlphaRelocations.h"
18 #include "llvm/PassManager.h"
19 #include "llvm/CodeGen/MachineCodeEmitter.h"
20 #include "llvm/CodeGen/MachineFunctionPass.h"
21 #include "llvm/CodeGen/MachineInstr.h"
22 #include "llvm/CodeGen/Passes.h"
23 #include "llvm/Function.h"
24 #include "llvm/Support/Debug.h"
25 #include "llvm/ADT/Statistic.h"
30 NumEmitted("alpha-emitter", "Number of machine instructions emitted");
34 class AlphaCodeEmitter : public MachineFunctionPass {
35 const AlphaInstrInfo *II;
36 MachineCodeEmitter &MCE;
37 std::map<const MachineBasicBlock*, unsigned*> BasicBlockAddrs;
38 std::vector<std::pair<const MachineBasicBlock *, unsigned*> > BBRefs;
40 /// getMachineOpValue - evaluates the MachineOperand of a given MachineInstr
42 int getMachineOpValue(MachineInstr &MI, MachineOperand &MO);
45 explicit AlphaCodeEmitter(MachineCodeEmitter &mce) : II(0), MCE(mce) {}
46 AlphaCodeEmitter(MachineCodeEmitter &mce, const AlphaInstrInfo& ii)
47 : II(&ii), MCE(mce) {}
49 bool runOnMachineFunction(MachineFunction &MF);
51 virtual const char *getPassName() const {
52 return "Alpha Machine Code Emitter";
55 void emitInstruction(const MachineInstr &MI);
57 /// emitWord - write a 32-bit word to memory at the current PC
59 void emitWord(unsigned w) { MCE.emitWord(w); }
61 /// getBinaryCodeForInstr - This function, generated by the
62 /// CodeEmitterGenerator using TableGen, produces the binary encoding for
63 /// machine instructions.
65 unsigned getBinaryCodeForInstr(MachineInstr &MI);
68 void emitBasicBlock(MachineBasicBlock &MBB);
73 /// createAlphaCodeEmitterPass - Return a pass that emits the collected Alpha code
74 /// to the specified MCE object.
75 FunctionPass *llvm::createAlphaCodeEmitterPass(MachineCodeEmitter &MCE) {
76 return new AlphaCodeEmitter(MCE);
79 bool AlphaCodeEmitter::runOnMachineFunction(MachineFunction &MF) {
80 II = ((AlphaTargetMachine&)MF.getTarget()).getInstrInfo();
82 MCE.startFunction(MF);
83 MCE.emitConstantPool(MF.getConstantPool());
84 for (MachineFunction::iterator I = MF.begin(), E = MF.end(); I != E; ++I)
86 MCE.finishFunction(MF);
88 // Resolve all forward branches now...
89 for (unsigned i = 0, e = BBRefs.size(); i != e; ++i) {
90 unsigned* Location = (unsigned*)BasicBlockAddrs[BBRefs[i].first];
91 unsigned* Ref = (unsigned*)BBRefs[i].second;
92 intptr_t BranchTargetDisp =
93 (((unsigned char*)Location - (unsigned char*)Ref) >> 2) - 1;
94 DEBUG(std::cerr << "Fixup @ " << (void*)Ref << " to " << (void*)Location
95 << " Disp " << BranchTargetDisp
96 << " using " << (BranchTargetDisp & ((1 << 22)-1)) << "\n");
97 *Ref |= (BranchTargetDisp & ((1 << 21)-1));
100 BasicBlockAddrs.clear();
105 void AlphaCodeEmitter::emitBasicBlock(MachineBasicBlock &MBB) {
106 uintptr_t Addr = MCE.getCurrentPCValue();
107 BasicBlockAddrs[&MBB] = (unsigned*)Addr;
109 for (MachineBasicBlock::iterator I = MBB.begin(), E = MBB.end();
111 MachineInstr &MI = *I;
112 unsigned Opcode = MI.getOpcode();
113 switch(MI.getOpcode()) {
115 emitWord(getBinaryCodeForInstr(*I));
119 case Alpha::MEMLABEL:
121 case Alpha::IDEF_F32:
122 case Alpha::IDEF_F64:
128 static unsigned getAlphaRegNumber(unsigned Reg) {
130 case Alpha::R0 : case Alpha::F0 : return 0;
131 case Alpha::R1 : case Alpha::F1 : return 1;
132 case Alpha::R2 : case Alpha::F2 : return 2;
133 case Alpha::R3 : case Alpha::F3 : return 3;
134 case Alpha::R4 : case Alpha::F4 : return 4;
135 case Alpha::R5 : case Alpha::F5 : return 5;
136 case Alpha::R6 : case Alpha::F6 : return 6;
137 case Alpha::R7 : case Alpha::F7 : return 7;
138 case Alpha::R8 : case Alpha::F8 : return 8;
139 case Alpha::R9 : case Alpha::F9 : return 9;
140 case Alpha::R10 : case Alpha::F10 : return 10;
141 case Alpha::R11 : case Alpha::F11 : return 11;
142 case Alpha::R12 : case Alpha::F12 : return 12;
143 case Alpha::R13 : case Alpha::F13 : return 13;
144 case Alpha::R14 : case Alpha::F14 : return 14;
145 case Alpha::R15 : case Alpha::F15 : return 15;
146 case Alpha::R16 : case Alpha::F16 : return 16;
147 case Alpha::R17 : case Alpha::F17 : return 17;
148 case Alpha::R18 : case Alpha::F18 : return 18;
149 case Alpha::R19 : case Alpha::F19 : return 19;
150 case Alpha::R20 : case Alpha::F20 : return 20;
151 case Alpha::R21 : case Alpha::F21 : return 21;
152 case Alpha::R22 : case Alpha::F22 : return 22;
153 case Alpha::R23 : case Alpha::F23 : return 23;
154 case Alpha::R24 : case Alpha::F24 : return 24;
155 case Alpha::R25 : case Alpha::F25 : return 25;
156 case Alpha::R26 : case Alpha::F26 : return 26;
157 case Alpha::R27 : case Alpha::F27 : return 27;
158 case Alpha::R28 : case Alpha::F28 : return 28;
159 case Alpha::R29 : case Alpha::F29 : return 29;
160 case Alpha::R30 : case Alpha::F30 : return 30;
161 case Alpha::R31 : case Alpha::F31 : return 31;
163 assert(0 && "Unhandled reg");
168 int AlphaCodeEmitter::getMachineOpValue(MachineInstr &MI, MachineOperand &MO) {
170 int rv = 0; // Return value; defaults to 0 for unhandled cases
171 // or things that get fixed up later by the JIT.
173 if (MO.isRegister()) {
174 rv = getAlphaRegNumber(MO.getReg());
175 } else if (MO.isImmediate()) {
176 rv = MO.getImmedValue();
177 } else if (MO.isGlobalAddress() || MO.isExternalSymbol()
178 || MO.isConstantPoolIndex()) {
179 DEBUG(std::cerr << MO << " is a relocated op for " << MI << "\n";);
180 bool isExternal = MO.isExternalSymbol() ||
181 (MO.isGlobalAddress() &&
182 ( MO.getGlobal()->hasWeakLinkage() ||
183 MO.getGlobal()->isExternal()) );
187 switch (MI.getOpcode()) {
189 Reloc = Alpha::reloc_bsr;
204 Reloc = Alpha::reloc_gprellow;
207 Reloc = Alpha::reloc_gprelhigh;
210 Reloc = Alpha::reloc_literal;
215 Reloc = Alpha::reloc_gpdist;
216 Offset = MI.getOperand(3).getImmedValue();
219 assert(0 && "unknown relocatable instruction");
222 if (MO.isGlobalAddress())
223 MCE.addRelocation(MachineRelocation((unsigned)MCE.getCurrentPCOffset(),
224 Reloc, MO.getGlobal(), Offset,
226 else if (MO.isExternalSymbol())
227 MCE.addRelocation(MachineRelocation((unsigned)MCE.getCurrentPCOffset(),
228 Reloc, MO.getSymbolName(), Offset,
231 MCE.addRelocation(MachineRelocation((unsigned)MCE.getCurrentPCOffset(),
232 Reloc, MO.getConstantPoolIndex(),
234 } else if (MO.isMachineBasicBlock()) {
235 unsigned* CurrPC = (unsigned*)(intptr_t)MCE.getCurrentPCValue();
236 BBRefs.push_back(std::make_pair(MO.getMachineBasicBlock(), CurrPC));
238 std::cerr << "ERROR: Unknown type of MachineOperand: " << MO << "\n";
246 #include "AlphaGenCodeEmitter.inc"