1 //===-- Alpha/AlphaCodeEmitter.cpp - Convert Alpha code to machine code ---===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file contains the pass that transforms the Alpha machine instructions
11 // into relocatable machine code.
13 //===----------------------------------------------------------------------===//
15 #define DEBUG_TYPE "alpha-emitter"
16 #include "AlphaTargetMachine.h"
17 #include "AlphaRelocations.h"
19 #include "llvm/PassManager.h"
20 #include "llvm/CodeGen/MachineCodeEmitter.h"
21 #include "llvm/CodeGen/JITCodeEmitter.h"
22 #include "llvm/CodeGen/MachineFunctionPass.h"
23 #include "llvm/CodeGen/MachineInstr.h"
24 #include "llvm/CodeGen/Passes.h"
25 #include "llvm/Function.h"
26 #include "llvm/Support/Compiler.h"
27 #include "llvm/Support/Debug.h"
32 class AlphaCodeEmitter {
33 MachineCodeEmitter &MCE;
35 AlphaCodeEmitter(MachineCodeEmitter &mce) : MCE(mce) {}
37 /// getBinaryCodeForInstr - This function, generated by the
38 /// CodeEmitterGenerator using TableGen, produces the binary encoding for
39 /// machine instructions.
41 unsigned getBinaryCodeForInstr(const MachineInstr &MI);
43 /// getMachineOpValue - evaluates the MachineOperand of a given MachineInstr
45 unsigned getMachineOpValue(const MachineInstr &MI,
46 const MachineOperand &MO);
49 template <class CodeEmitter>
50 class VISIBILITY_HIDDEN Emitter : public MachineFunctionPass,
51 public AlphaCodeEmitter
53 const AlphaInstrInfo *II;
59 explicit Emitter(TargetMachine &tm, CodeEmitter &mce)
60 : MachineFunctionPass(&ID), AlphaCodeEmitter(mce),
61 II(0), TM(tm), MCE(mce) {}
62 Emitter(TargetMachine &tm, CodeEmitter &mce, const AlphaInstrInfo& ii)
63 : MachineFunctionPass(&ID), AlphaCodeEmitter(mce),
64 II(&ii), TM(tm), MCE(mce) {}
66 bool runOnMachineFunction(MachineFunction &MF);
68 virtual const char *getPassName() const {
69 return "Alpha Machine Code Emitter";
72 void emitInstruction(const MachineInstr &MI);
75 void emitBasicBlock(MachineBasicBlock &MBB);
78 template <class CodeEmitter>
79 char Emitter<CodeEmitter>::ID = 0;
82 /// createAlphaCodeEmitterPass - Return a pass that emits the collected Alpha
83 /// code to the specified MCE object.
85 FunctionPass *llvm::createAlphaCodeEmitterPass(AlphaTargetMachine &TM,
86 MachineCodeEmitter &MCE) {
87 return new Emitter<MachineCodeEmitter>(TM, MCE);
90 FunctionPass *llvm::createAlphaJITCodeEmitterPass(AlphaTargetMachine &TM,
91 JITCodeEmitter &JCE) {
92 return new Emitter<JITCodeEmitter>(TM, JCE);
95 template <class CodeEmitter>
96 bool Emitter<CodeEmitter>::runOnMachineFunction(MachineFunction &MF) {
97 II = ((AlphaTargetMachine&)MF.getTarget()).getInstrInfo();
100 MCE.startFunction(MF);
101 for (MachineFunction::iterator I = MF.begin(), E = MF.end(); I != E; ++I)
103 } while (MCE.finishFunction(MF));
108 template <class CodeEmitter>
109 void Emitter<CodeEmitter>::emitBasicBlock(MachineBasicBlock &MBB) {
110 MCE.StartMachineBasicBlock(&MBB);
111 for (MachineBasicBlock::iterator I = MBB.begin(), E = MBB.end();
113 const MachineInstr &MI = *I;
114 switch(MI.getOpcode()) {
116 MCE.emitWordLE(getBinaryCodeForInstr(*I));
120 case Alpha::MEMLABEL:
121 case TargetInstrInfo::IMPLICIT_DEF:
127 static unsigned getAlphaRegNumber(unsigned Reg) {
129 case Alpha::R0 : case Alpha::F0 : return 0;
130 case Alpha::R1 : case Alpha::F1 : return 1;
131 case Alpha::R2 : case Alpha::F2 : return 2;
132 case Alpha::R3 : case Alpha::F3 : return 3;
133 case Alpha::R4 : case Alpha::F4 : return 4;
134 case Alpha::R5 : case Alpha::F5 : return 5;
135 case Alpha::R6 : case Alpha::F6 : return 6;
136 case Alpha::R7 : case Alpha::F7 : return 7;
137 case Alpha::R8 : case Alpha::F8 : return 8;
138 case Alpha::R9 : case Alpha::F9 : return 9;
139 case Alpha::R10 : case Alpha::F10 : return 10;
140 case Alpha::R11 : case Alpha::F11 : return 11;
141 case Alpha::R12 : case Alpha::F12 : return 12;
142 case Alpha::R13 : case Alpha::F13 : return 13;
143 case Alpha::R14 : case Alpha::F14 : return 14;
144 case Alpha::R15 : case Alpha::F15 : return 15;
145 case Alpha::R16 : case Alpha::F16 : return 16;
146 case Alpha::R17 : case Alpha::F17 : return 17;
147 case Alpha::R18 : case Alpha::F18 : return 18;
148 case Alpha::R19 : case Alpha::F19 : return 19;
149 case Alpha::R20 : case Alpha::F20 : return 20;
150 case Alpha::R21 : case Alpha::F21 : return 21;
151 case Alpha::R22 : case Alpha::F22 : return 22;
152 case Alpha::R23 : case Alpha::F23 : return 23;
153 case Alpha::R24 : case Alpha::F24 : return 24;
154 case Alpha::R25 : case Alpha::F25 : return 25;
155 case Alpha::R26 : case Alpha::F26 : return 26;
156 case Alpha::R27 : case Alpha::F27 : return 27;
157 case Alpha::R28 : case Alpha::F28 : return 28;
158 case Alpha::R29 : case Alpha::F29 : return 29;
159 case Alpha::R30 : case Alpha::F30 : return 30;
160 case Alpha::R31 : case Alpha::F31 : return 31;
162 assert(0 && "Unhandled reg");
167 unsigned AlphaCodeEmitter::getMachineOpValue(const MachineInstr &MI,
168 const MachineOperand &MO) {
170 unsigned rv = 0; // Return value; defaults to 0 for unhandled cases
171 // or things that get fixed up later by the JIT.
174 rv = getAlphaRegNumber(MO.getReg());
175 } else if (MO.isImm()) {
177 } else if (MO.isGlobal() || MO.isSymbol() || MO.isCPI()) {
178 DOUT << MO << " is a relocated op for " << MI << "\n";
182 switch (MI.getOpcode()) {
184 Reloc = Alpha::reloc_bsr;
199 Reloc = Alpha::reloc_gprellow;
202 Reloc = Alpha::reloc_gprelhigh;
205 Reloc = Alpha::reloc_literal;
210 Reloc = Alpha::reloc_gpdist;
211 Offset = MI.getOperand(3).getImm();
214 assert(0 && "unknown relocatable instruction");
218 MCE.addRelocation(MachineRelocation::getGV(MCE.getCurrentPCOffset(),
219 Reloc, MO.getGlobal(), Offset,
220 isa<Function>(MO.getGlobal()),
222 else if (MO.isSymbol())
223 MCE.addRelocation(MachineRelocation::getExtSym(MCE.getCurrentPCOffset(),
224 Reloc, MO.getSymbolName(),
227 MCE.addRelocation(MachineRelocation::getConstPool(MCE.getCurrentPCOffset(),
228 Reloc, MO.getIndex(), Offset));
229 } else if (MO.isMBB()) {
230 MCE.addRelocation(MachineRelocation::getBB(MCE.getCurrentPCOffset(),
231 Alpha::reloc_bsr, MO.getMBB()));
233 cerr << "ERROR: Unknown type of MachineOperand: " << MO << "\n";
240 #include "AlphaGenCodeEmitter.inc"