1 //===-- Alpha/AlphaCodeEmitter.cpp - Convert Alpha code to machine code ---===//
3 // The LLVM Compiler Infrastructure
5 // This file was developed by the LLVM research group and is distributed under
6 // the University of Illinois Open Source License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file contains the pass that transforms the Alpha machine instructions
11 // into relocatable machine code.
13 //===----------------------------------------------------------------------===//
15 #include "AlphaTargetMachine.h"
16 #include "AlphaRelocations.h"
18 #include "llvm/PassManager.h"
19 #include "llvm/CodeGen/MachineCodeEmitter.h"
20 #include "llvm/CodeGen/MachineFunctionPass.h"
21 #include "llvm/CodeGen/MachineInstr.h"
22 #include "llvm/CodeGen/Passes.h"
23 #include "llvm/Function.h"
24 #include "llvm/Support/Debug.h"
25 #include "llvm/ADT/Statistic.h"
31 NumEmitted("alpha-emitter", "Number of machine instructions emitted");
35 class AlphaCodeEmitter : public MachineFunctionPass {
36 const AlphaInstrInfo *II;
37 MachineCodeEmitter &MCE;
38 std::map<const MachineBasicBlock*, unsigned*> BasicBlockAddrs;
39 std::vector<std::pair<const MachineBasicBlock *, unsigned*> > BBRefs;
41 /// getMachineOpValue - evaluates the MachineOperand of a given MachineInstr
43 int getMachineOpValue(MachineInstr &MI, MachineOperand &MO);
46 explicit AlphaCodeEmitter(MachineCodeEmitter &mce) : II(0), MCE(mce) {}
47 AlphaCodeEmitter(MachineCodeEmitter &mce, const AlphaInstrInfo& ii)
48 : II(&ii), MCE(mce) {}
50 bool runOnMachineFunction(MachineFunction &MF);
52 virtual const char *getPassName() const {
53 return "Alpha Machine Code Emitter";
56 void emitInstruction(const MachineInstr &MI);
58 /// emitWord - write a 32-bit word to memory at the current PC
60 void emitWord(unsigned w) { MCE.emitWord(w); }
62 /// getBinaryCodeForInstr - This function, generated by the
63 /// CodeEmitterGenerator using TableGen, produces the binary encoding for
64 /// machine instructions.
66 unsigned getBinaryCodeForInstr(MachineInstr &MI);
69 void emitBasicBlock(MachineBasicBlock &MBB);
74 /// createAlphaCodeEmitterPass - Return a pass that emits the collected Alpha code
75 /// to the specified MCE object.
76 FunctionPass *llvm::createAlphaCodeEmitterPass(MachineCodeEmitter &MCE) {
77 return new AlphaCodeEmitter(MCE);
80 bool AlphaCodeEmitter::runOnMachineFunction(MachineFunction &MF) {
81 II = ((AlphaTargetMachine&)MF.getTarget()).getInstrInfo();
83 MCE.startFunction(MF);
84 MCE.emitConstantPool(MF.getConstantPool());
85 for (MachineFunction::iterator I = MF.begin(), E = MF.end(); I != E; ++I)
87 MCE.finishFunction(MF);
89 // Resolve all forward branches now...
90 for (unsigned i = 0, e = BBRefs.size(); i != e; ++i) {
91 unsigned* Location = (unsigned*)BasicBlockAddrs[BBRefs[i].first];
92 unsigned* Ref = (unsigned*)BBRefs[i].second;
93 intptr_t BranchTargetDisp =
94 (((unsigned char*)Location - (unsigned char*)Ref) >> 2) - 1;
95 DEBUG(std::cerr << "Fixup @ " << (void*)Ref << " to " << (void*)Location
96 << " Disp " << BranchTargetDisp
97 << " using " << (BranchTargetDisp & ((1 << 22)-1)) << "\n");
98 *Ref |= (BranchTargetDisp & ((1 << 21)-1));
101 BasicBlockAddrs.clear();
106 void AlphaCodeEmitter::emitBasicBlock(MachineBasicBlock &MBB) {
107 uintptr_t Addr = MCE.getCurrentPCValue();
108 BasicBlockAddrs[&MBB] = (unsigned*)Addr;
110 for (MachineBasicBlock::iterator I = MBB.begin(), E = MBB.end();
112 MachineInstr &MI = *I;
113 unsigned Opcode = MI.getOpcode();
114 switch(MI.getOpcode()) {
116 emitWord(getBinaryCodeForInstr(*I));
120 case Alpha::MEMLABEL:
122 case Alpha::IDEF_F32:
123 case Alpha::IDEF_F64:
129 static unsigned getAlphaRegNumber(unsigned Reg) {
131 case Alpha::R0 : case Alpha::F0 : return 0;
132 case Alpha::R1 : case Alpha::F1 : return 1;
133 case Alpha::R2 : case Alpha::F2 : return 2;
134 case Alpha::R3 : case Alpha::F3 : return 3;
135 case Alpha::R4 : case Alpha::F4 : return 4;
136 case Alpha::R5 : case Alpha::F5 : return 5;
137 case Alpha::R6 : case Alpha::F6 : return 6;
138 case Alpha::R7 : case Alpha::F7 : return 7;
139 case Alpha::R8 : case Alpha::F8 : return 8;
140 case Alpha::R9 : case Alpha::F9 : return 9;
141 case Alpha::R10 : case Alpha::F10 : return 10;
142 case Alpha::R11 : case Alpha::F11 : return 11;
143 case Alpha::R12 : case Alpha::F12 : return 12;
144 case Alpha::R13 : case Alpha::F13 : return 13;
145 case Alpha::R14 : case Alpha::F14 : return 14;
146 case Alpha::R15 : case Alpha::F15 : return 15;
147 case Alpha::R16 : case Alpha::F16 : return 16;
148 case Alpha::R17 : case Alpha::F17 : return 17;
149 case Alpha::R18 : case Alpha::F18 : return 18;
150 case Alpha::R19 : case Alpha::F19 : return 19;
151 case Alpha::R20 : case Alpha::F20 : return 20;
152 case Alpha::R21 : case Alpha::F21 : return 21;
153 case Alpha::R22 : case Alpha::F22 : return 22;
154 case Alpha::R23 : case Alpha::F23 : return 23;
155 case Alpha::R24 : case Alpha::F24 : return 24;
156 case Alpha::R25 : case Alpha::F25 : return 25;
157 case Alpha::R26 : case Alpha::F26 : return 26;
158 case Alpha::R27 : case Alpha::F27 : return 27;
159 case Alpha::R28 : case Alpha::F28 : return 28;
160 case Alpha::R29 : case Alpha::F29 : return 29;
161 case Alpha::R30 : case Alpha::F30 : return 30;
162 case Alpha::R31 : case Alpha::F31 : return 31;
164 assert(0 && "Unhandled reg");
169 int AlphaCodeEmitter::getMachineOpValue(MachineInstr &MI, MachineOperand &MO) {
171 int rv = 0; // Return value; defaults to 0 for unhandled cases
172 // or things that get fixed up later by the JIT.
174 if (MO.isRegister()) {
175 rv = getAlphaRegNumber(MO.getReg());
176 } else if (MO.isImmediate()) {
177 rv = MO.getImmedValue();
178 } else if (MO.isGlobalAddress() || MO.isExternalSymbol()
179 || MO.isConstantPoolIndex()) {
180 DEBUG(std::cerr << MO << " is a relocated op for " << MI << "\n";);
181 bool isExternal = MO.isExternalSymbol() ||
182 (MO.isGlobalAddress() &&
183 ( MO.getGlobal()->hasWeakLinkage() ||
184 MO.getGlobal()->isExternal()) );
188 switch (MI.getOpcode()) {
190 Reloc = Alpha::reloc_bsr;
205 Reloc = Alpha::reloc_gprellow;
208 Reloc = Alpha::reloc_gprelhigh;
211 Reloc = Alpha::reloc_literal;
216 Reloc = Alpha::reloc_gpdist;
217 Offset = MI.getOperand(3).getImmedValue();
220 assert(0 && "unknown relocatable instruction");
223 if (MO.isGlobalAddress())
224 MCE.addRelocation(MachineRelocation((unsigned)MCE.getCurrentPCOffset(),
225 Reloc, MO.getGlobal(), Offset,
227 else if (MO.isExternalSymbol())
228 MCE.addRelocation(MachineRelocation((unsigned)MCE.getCurrentPCOffset(),
229 Reloc, MO.getSymbolName(), Offset,
232 MCE.addRelocation(MachineRelocation((unsigned)MCE.getCurrentPCOffset(),
233 Reloc, MO.getConstantPoolIndex(),
235 } else if (MO.isMachineBasicBlock()) {
236 unsigned* CurrPC = (unsigned*)(intptr_t)MCE.getCurrentPCValue();
237 BBRefs.push_back(std::make_pair(MO.getMachineBasicBlock(), CurrPC));
239 std::cerr << "ERROR: Unknown type of MachineOperand: " << MO << "\n";
247 #include "AlphaGenCodeEmitter.inc"