1 //===- AlphaInstrFormats.td - Alpha Instruction Formats ----*- tablegen -*-===//
3 // The LLVM Compiler Infrastructure
5 // This file was developed by the LLVM research group and is distributed under
6 // the University of Illinois Open Source License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
11 //===----------------------------------------------------------------------===//
20 def u8imm : Operand<i64>;
21 def s14imm : Operand<i64>;
22 def s16imm : Operand<i64>;
23 def s21imm : Operand<i64>;
24 def s64imm : Operand<i64>;
26 //===----------------------------------------------------------------------===//
27 // Instruction format superclass
28 //===----------------------------------------------------------------------===//
30 class InstAlpha<bits<6> op, dag OL, string asmstr> : Instruction { // Alpha instruction baseline
32 let Namespace = "Alpha";
34 let AsmString = asmstr;
41 class MForm<bits<6> opcode, string asmstr>
42 : InstAlpha<opcode, (ops GPRC:$RA, s16imm:$DISP, GPRC:$RB), asmstr> {
49 let Inst{15-0} = disp;
52 class MgForm<bits<6> opcode, string asmstr>
53 : InstAlpha<opcode, (ops GPRC:$RA, s16imm:$DISP, GPRC:$RB, s16imm:$NUM), asmstr> {
60 let Inst{15-0} = disp;
63 class MbrForm<bits<6> opcode, bits<2> TB, dag OL, string asmstr> : InstAlpha<opcode, OL, asmstr> {
71 let Inst{13-0} = disp;
75 let isBranch = 1, isTerminator = 1 in
76 class BForm<bits<6> opcode, string asmstr>
77 : InstAlpha<opcode, (ops GPRC:$RA, s21imm:$DISP), asmstr> {
82 let Inst{20-0} = disp;
85 let isBranch = 1, isTerminator = 1 in
86 class FBForm<bits<6> opcode, string asmstr>
87 : InstAlpha<opcode, (ops FPRC:$RA, s21imm:$DISP), asmstr> {
92 let Inst{20-0} = disp;
96 class OForm<bits<6> opcode, bits<7> fun, string asmstr, list<dag> pattern>
97 : InstAlpha<opcode, (ops GPRC:$RC, GPRC:$RA, GPRC:$RB), asmstr> {
98 let Pattern = pattern;
103 bits<7> Function = fun;
105 let Inst{25-21} = Ra;
106 let Inst{20-16} = Rb;
109 let Inst{11-5} = Function;
113 class OcmForm<bits<6> opcode, bits<7> fun, dag OL, string asmstr>
114 : InstAlpha<opcode, OL, asmstr> {
117 bits<7> Function = fun;
120 let Inst{25-21} = Ra;
121 let Inst{20-16} = Rb;
124 let Inst{11-5} = Function;
129 class OFormL<bits<6> opcode, bits<7> fun, string asmstr, list<dag> pattern>
130 : InstAlpha<opcode, (ops GPRC:$RC, GPRC:$RA, u8imm:$L), asmstr> {
131 let Pattern = pattern;
136 bits<7> Function = fun;
138 let Inst{25-21} = Ra;
139 let Inst{20-13} = LIT;
141 let Inst{11-5} = Function;
145 class OcmFormL<bits<6> opcode, bits<7> fun, dag OL, string asmstr>
146 : InstAlpha<opcode, OL, asmstr> {
149 bits<7> Function = fun;
152 let Inst{25-21} = Ra;
153 let Inst{20-13} = LIT;
155 let Inst{11-5} = Function;
160 class FPForm<bits<6> opcode, bits<11> fun, string asmstr>
161 : InstAlpha<opcode, (ops FPRC:$RC, FPRC:$RA, FPRC:$RB), asmstr> {
165 bits<11> Function = fun;
167 let Inst{25-21} = Fa;
168 let Inst{20-16} = Fb;
169 let Inst{15-5} = Function;
173 class FPFormCM<bits<6> opcode, bits<11> fun, dag OL, string asmstr>
174 : InstAlpha<opcode, OL, asmstr> {
178 bits<11> Function = fun;
180 let Inst{25-21} = Fa;
181 let Inst{20-16} = Fb;
182 let Inst{15-5} = Function;
187 class PALForm<bits<6> opcode, dag OL, string asmstr> : InstAlpha<opcode, OL, asmstr> {
190 let Inst{25-0} = Function;
194 // Pseudo instructions.
195 class PseudoInstAlpha<dag OL, string nm> : InstAlpha<0, OL, nm> {