1 //===- AlphaRegisterInfo.cpp - Alpha Register Information -------*- C++ -*-===//
3 // The LLVM Compiler Infrastructure
5 // This file is distributed under the University of Illinois Open Source
6 // License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file contains the Alpha implementation of the TargetRegisterInfo class.
12 //===----------------------------------------------------------------------===//
14 #define DEBUG_TYPE "reginfo"
16 #include "AlphaRegisterInfo.h"
17 #include "llvm/Constants.h"
18 #include "llvm/Type.h"
19 #include "llvm/Function.h"
20 #include "llvm/CodeGen/ValueTypes.h"
21 #include "llvm/CodeGen/MachineInstrBuilder.h"
22 #include "llvm/CodeGen/MachineFunction.h"
23 #include "llvm/CodeGen/MachineFrameInfo.h"
24 #include "llvm/CodeGen/MachineLocation.h"
25 #include "llvm/Target/TargetFrameInfo.h"
26 #include "llvm/Target/TargetMachine.h"
27 #include "llvm/Target/TargetOptions.h"
28 #include "llvm/Target/TargetInstrInfo.h"
29 #include "llvm/Support/CommandLine.h"
30 #include "llvm/Support/Debug.h"
31 #include "llvm/Support/ErrorHandling.h"
32 #include "llvm/Support/raw_ostream.h"
33 #include "llvm/ADT/BitVector.h"
34 #include "llvm/ADT/STLExtras.h"
39 static const int IMM_LOW = -32768;
40 static const int IMM_HIGH = 32767;
41 static const int IMM_MULT = 65536;
43 static long getUpper16(long l)
45 long y = l / IMM_MULT;
46 if (l % IMM_MULT > IMM_HIGH)
51 static long getLower16(long l)
53 long h = getUpper16(l);
54 return l - h * IMM_MULT;
57 AlphaRegisterInfo::AlphaRegisterInfo(const TargetInstrInfo &tii)
58 : AlphaGenRegisterInfo(Alpha::ADJUSTSTACKDOWN, Alpha::ADJUSTSTACKUP),
59 TII(tii), curgpdist(0)
63 const unsigned* AlphaRegisterInfo::getCalleeSavedRegs(const MachineFunction *MF)
65 static const unsigned CalleeSavedRegs[] = {
66 Alpha::R9, Alpha::R10,
67 Alpha::R11, Alpha::R12,
68 Alpha::R13, Alpha::R14,
72 Alpha::F8, Alpha::F9, 0
74 return CalleeSavedRegs;
77 BitVector AlphaRegisterInfo::getReservedRegs(const MachineFunction &MF) const {
78 BitVector Reserved(getNumRegs());
79 Reserved.set(Alpha::R15);
80 Reserved.set(Alpha::R30);
81 Reserved.set(Alpha::R31);
85 //===----------------------------------------------------------------------===//
86 // Stack Frame Processing methods
87 //===----------------------------------------------------------------------===//
89 // hasFP - Return true if the specified function should have a dedicated frame
90 // pointer register. This is true if the function has variable sized allocas or
91 // if frame pointer elimination is disabled.
93 bool AlphaRegisterInfo::hasFP(const MachineFunction &MF) const {
94 const MachineFrameInfo *MFI = MF.getFrameInfo();
95 return MFI->hasVarSizedObjects();
98 void AlphaRegisterInfo::
99 eliminateCallFramePseudoInstr(MachineFunction &MF, MachineBasicBlock &MBB,
100 MachineBasicBlock::iterator I) const {
102 // If we have a frame pointer, turn the adjcallstackup instruction into a
103 // 'sub ESP, <amt>' and the adjcallstackdown instruction into 'add ESP,
105 MachineInstr *Old = I;
106 uint64_t Amount = Old->getOperand(0).getImm();
108 // We need to keep the stack aligned properly. To do this, we round the
109 // amount of space needed for the outgoing arguments up to the next
110 // alignment boundary.
111 unsigned Align = MF.getTarget().getFrameInfo()->getStackAlignment();
112 Amount = (Amount+Align-1)/Align*Align;
115 if (Old->getOpcode() == Alpha::ADJUSTSTACKDOWN) {
116 New=BuildMI(MF, Old->getDebugLoc(), TII.get(Alpha::LDA), Alpha::R30)
117 .addImm(-Amount).addReg(Alpha::R30);
119 assert(Old->getOpcode() == Alpha::ADJUSTSTACKUP);
120 New=BuildMI(MF, Old->getDebugLoc(), TII.get(Alpha::LDA), Alpha::R30)
121 .addImm(Amount).addReg(Alpha::R30);
124 // Replace the pseudo instruction with a new instruction...
132 //Alpha has a slightly funny stack:
135 //fixed locals (and spills, callee saved, etc)
141 AlphaRegisterInfo::eliminateFrameIndex(MachineBasicBlock::iterator II,
142 int SPAdj, FrameIndexValue *Value,
143 RegScavenger *RS) const {
144 assert(SPAdj == 0 && "Unexpected");
147 MachineInstr &MI = *II;
148 MachineBasicBlock &MBB = *MI.getParent();
149 MachineFunction &MF = *MBB.getParent();
152 while (!MI.getOperand(i).isFI()) {
154 assert(i < MI.getNumOperands() && "Instr doesn't have FrameIndex operand!");
157 int FrameIndex = MI.getOperand(i).getIndex();
159 // Add the base register of R30 (SP) or R15 (FP).
160 MI.getOperand(i + 1).ChangeToRegister(FP ? Alpha::R15 : Alpha::R30, false);
162 // Now add the frame object offset to the offset from the virtual frame index.
163 int Offset = MF.getFrameInfo()->getObjectOffset(FrameIndex);
165 DEBUG(errs() << "FI: " << FrameIndex << " Offset: " << Offset << "\n");
167 Offset += MF.getFrameInfo()->getStackSize();
169 DEBUG(errs() << "Corrected Offset " << Offset
170 << " for stack size: " << MF.getFrameInfo()->getStackSize() << "\n");
172 if (Offset > IMM_HIGH || Offset < IMM_LOW) {
173 DEBUG(errs() << "Unconditionally using R28 for evil purposes Offset: "
175 //so in this case, we need to use a temporary register, and move the
176 //original inst off the SP/FP
178 MI.getOperand(i + 1).ChangeToRegister(Alpha::R28, false);
179 MI.getOperand(i).ChangeToImmediate(getLower16(Offset));
181 MachineInstr* nMI=BuildMI(MF, MI.getDebugLoc(),
182 TII.get(Alpha::LDAH), Alpha::R28)
183 .addImm(getUpper16(Offset)).addReg(FP ? Alpha::R15 : Alpha::R30);
186 MI.getOperand(i).ChangeToImmediate(Offset);
192 void AlphaRegisterInfo::emitPrologue(MachineFunction &MF) const {
193 MachineBasicBlock &MBB = MF.front(); // Prolog goes in entry BB
194 MachineBasicBlock::iterator MBBI = MBB.begin();
195 MachineFrameInfo *MFI = MF.getFrameInfo();
196 DebugLoc dl = (MBBI != MBB.end() ? MBBI->getDebugLoc() : DebugLoc());
200 BuildMI(MBB, MBBI, dl, TII.get(Alpha::LDAHg), Alpha::R29)
201 .addGlobalAddress(MF.getFunction())
202 .addReg(Alpha::R27).addImm(++curgpdist);
203 BuildMI(MBB, MBBI, dl, TII.get(Alpha::LDAg), Alpha::R29)
204 .addGlobalAddress(MF.getFunction())
205 .addReg(Alpha::R29).addImm(curgpdist);
207 BuildMI(MBB, MBBI, dl, TII.get(Alpha::ALTENT))
208 .addGlobalAddress(MF.getFunction());
210 // Get the number of bytes to allocate from the FrameInfo
211 long NumBytes = MFI->getStackSize();
214 NumBytes += 8; //reserve space for the old FP
216 // Do we need to allocate space on the stack?
217 if (NumBytes == 0) return;
219 unsigned Align = MF.getTarget().getFrameInfo()->getStackAlignment();
220 NumBytes = (NumBytes+Align-1)/Align*Align;
222 // Update frame info to pretend that this is part of the stack...
223 MFI->setStackSize(NumBytes);
225 // adjust stack pointer: r30 -= numbytes
226 NumBytes = -NumBytes;
227 if (NumBytes >= IMM_LOW) {
228 BuildMI(MBB, MBBI, dl, TII.get(Alpha::LDA), Alpha::R30).addImm(NumBytes)
230 } else if (getUpper16(NumBytes) >= IMM_LOW) {
231 BuildMI(MBB, MBBI, dl, TII.get(Alpha::LDAH), Alpha::R30)
232 .addImm(getUpper16(NumBytes)).addReg(Alpha::R30);
233 BuildMI(MBB, MBBI, dl, TII.get(Alpha::LDA), Alpha::R30)
234 .addImm(getLower16(NumBytes)).addReg(Alpha::R30);
236 report_fatal_error("Too big a stack frame at " + Twine(NumBytes));
239 //now if we need to, save the old FP and set the new
242 BuildMI(MBB, MBBI, dl, TII.get(Alpha::STQ))
243 .addReg(Alpha::R15).addImm(0).addReg(Alpha::R30);
244 //this must be the last instr in the prolog
245 BuildMI(MBB, MBBI, dl, TII.get(Alpha::BISr), Alpha::R15)
246 .addReg(Alpha::R30).addReg(Alpha::R30);
251 void AlphaRegisterInfo::emitEpilogue(MachineFunction &MF,
252 MachineBasicBlock &MBB) const {
253 const MachineFrameInfo *MFI = MF.getFrameInfo();
254 MachineBasicBlock::iterator MBBI = prior(MBB.end());
255 assert((MBBI->getOpcode() == Alpha::RETDAG ||
256 MBBI->getOpcode() == Alpha::RETDAGp)
257 && "Can only insert epilog into returning blocks");
258 DebugLoc dl = MBBI->getDebugLoc();
262 // Get the number of bytes allocated from the FrameInfo...
263 long NumBytes = MFI->getStackSize();
265 //now if we need to, restore the old FP
267 //copy the FP into the SP (discards allocas)
268 BuildMI(MBB, MBBI, dl, TII.get(Alpha::BISr), Alpha::R30).addReg(Alpha::R15)
271 BuildMI(MBB, MBBI, dl, TII.get(Alpha::LDQ), Alpha::R15)
272 .addImm(0).addReg(Alpha::R15);
276 if (NumBytes <= IMM_HIGH) {
277 BuildMI(MBB, MBBI, dl, TII.get(Alpha::LDA), Alpha::R30).addImm(NumBytes)
279 } else if (getUpper16(NumBytes) <= IMM_HIGH) {
280 BuildMI(MBB, MBBI, dl, TII.get(Alpha::LDAH), Alpha::R30)
281 .addImm(getUpper16(NumBytes)).addReg(Alpha::R30);
282 BuildMI(MBB, MBBI, dl, TII.get(Alpha::LDA), Alpha::R30)
283 .addImm(getLower16(NumBytes)).addReg(Alpha::R30);
285 report_fatal_error("Too big a stack frame at " + Twine(NumBytes));
290 unsigned AlphaRegisterInfo::getRARegister() const {
294 unsigned AlphaRegisterInfo::getFrameRegister(const MachineFunction &MF) const {
295 return hasFP(MF) ? Alpha::R15 : Alpha::R30;
298 unsigned AlphaRegisterInfo::getEHExceptionRegister() const {
299 llvm_unreachable("What is the exception register");
303 unsigned AlphaRegisterInfo::getEHHandlerRegister() const {
304 llvm_unreachable("What is the exception handler register");
308 int AlphaRegisterInfo::getDwarfRegNum(unsigned RegNum, bool isEH) const {
309 llvm_unreachable("What is the dwarf register number");
313 #include "AlphaGenRegisterInfo.inc"
315 std::string AlphaRegisterInfo::getPrettyName(unsigned reg)
317 std::string s(RegisterDescriptors[reg].Name);