1 //===- AlphaRegisterInfo.cpp - Alpha Register Information -------*- C++ -*-===//
3 // The LLVM Compiler Infrastructure
5 // This file was developed by the LLVM research group and is distributed under
6 // the University of Illinois Open Source License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file contains the Alpha implementation of the MRegisterInfo class.
12 //===----------------------------------------------------------------------===//
14 #define DEBUG_TYPE "reginfo"
16 #include "AlphaRegisterInfo.h"
17 #include "llvm/Constants.h"
18 #include "llvm/Type.h"
19 #include "llvm/CodeGen/ValueTypes.h"
20 #include "llvm/CodeGen/MachineInstrBuilder.h"
21 #include "llvm/CodeGen/MachineFunction.h"
22 #include "llvm/CodeGen/MachineFrameInfo.h"
23 #include "llvm/Target/TargetFrameInfo.h"
24 #include "llvm/Target/TargetMachine.h"
25 #include "llvm/Target/TargetOptions.h"
26 #include "llvm/Support/CommandLine.h"
27 #include "llvm/Support/Debug.h"
28 #include "llvm/ADT/STLExtras.h"
33 static long getLower16(long l)
36 if (l % 65536 > 32767)
41 static long getUpper16(long l)
44 if (l % 65536 > 32767)
49 AlphaRegisterInfo::AlphaRegisterInfo()
50 : AlphaGenRegisterInfo(Alpha::ADJUSTSTACKDOWN, Alpha::ADJUSTSTACKUP)
54 static const TargetRegisterClass *getClass(unsigned SrcReg) {
55 if (Alpha::FPRCRegisterClass->contains(SrcReg))
56 return Alpha::FPRCRegisterClass;
57 assert(Alpha::GPRCRegisterClass->contains(SrcReg) && "Reg not FPR or GPR");
58 return Alpha::GPRCRegisterClass;
62 AlphaRegisterInfo::storeRegToStackSlot(MachineBasicBlock &MBB,
63 MachineBasicBlock::iterator MI,
64 unsigned SrcReg, int FrameIdx) const {
65 //std::cerr << "Trying to store " << getPrettyName(SrcReg) << " to " << FrameIdx << "\n";
66 //BuildMI(MBB, MI, Alpha::WTF, 0).addReg(SrcReg);
67 if (getClass(SrcReg) == Alpha::FPRCRegisterClass)
68 BuildMI(MBB, MI, Alpha::STT, 3).addReg(SrcReg).addFrameIndex(FrameIdx).addReg(Alpha::F31);
69 else if (getClass(SrcReg) == Alpha::GPRCRegisterClass)
70 BuildMI(MBB, MI, Alpha::STQ, 3).addReg(SrcReg).addFrameIndex(FrameIdx).addReg(Alpha::F31);
76 AlphaRegisterInfo::loadRegFromStackSlot(MachineBasicBlock &MBB,
77 MachineBasicBlock::iterator MI,
78 unsigned DestReg, int FrameIdx) const{
79 //std::cerr << "Trying to load " << getPrettyName(DestReg) << " to " << FrameIdx << "\n";
80 if (getClass(DestReg) == Alpha::FPRCRegisterClass)
81 BuildMI(MBB, MI, Alpha::LDT, 2, DestReg).addFrameIndex(FrameIdx).addReg(Alpha::F31);
82 else if (getClass(DestReg) == Alpha::GPRCRegisterClass)
83 BuildMI(MBB, MI, Alpha::LDQ, 2, DestReg).addFrameIndex(FrameIdx).addReg(Alpha::F31);
88 void AlphaRegisterInfo::copyRegToReg(MachineBasicBlock &MBB,
89 MachineBasicBlock::iterator MI,
90 unsigned DestReg, unsigned SrcReg,
91 const TargetRegisterClass *RC) const {
92 // std::cerr << "copyRegToReg " << DestReg << " <- " << SrcReg << "\n";
93 if (RC == Alpha::GPRCRegisterClass) {
94 BuildMI(MBB, MI, Alpha::BIS, 2, DestReg).addReg(SrcReg).addReg(SrcReg);
95 } else if (RC == Alpha::FPRCRegisterClass) {
96 BuildMI(MBB, MI, Alpha::CPYS, 2, DestReg).addReg(SrcReg).addReg(SrcReg);
98 std::cerr << "Attempt to copy register that is not GPR or FPR";
103 //===----------------------------------------------------------------------===//
104 // Stack Frame Processing methods
105 //===----------------------------------------------------------------------===//
107 // hasFP - Return true if the specified function should have a dedicated frame
108 // pointer register. This is true if the function has variable sized allocas or
109 // if frame pointer elimination is disabled.
111 static bool hasFP(MachineFunction &MF) {
112 MachineFrameInfo *MFI = MF.getFrameInfo();
113 return MFI->hasVarSizedObjects();
116 void AlphaRegisterInfo::
117 eliminateCallFramePseudoInstr(MachineFunction &MF, MachineBasicBlock &MBB,
118 MachineBasicBlock::iterator I) const {
120 // If we have a frame pointer, turn the adjcallstackup instruction into a
121 // 'sub ESP, <amt>' and the adjcallstackdown instruction into 'add ESP,
123 MachineInstr *Old = I;
124 unsigned Amount = Old->getOperand(0).getImmedValue();
126 // We need to keep the stack aligned properly. To do this, we round the
127 // amount of space needed for the outgoing arguments up to the next
128 // alignment boundary.
129 unsigned Align = MF.getTarget().getFrameInfo()->getStackAlignment();
130 Amount = (Amount+Align-1)/Align*Align;
133 if (Old->getOpcode() == Alpha::ADJUSTSTACKDOWN) {
134 New=BuildMI(Alpha::LDA, 2, Alpha::R30)
135 .addImm(-Amount).addReg(Alpha::R30);
137 assert(Old->getOpcode() == Alpha::ADJUSTSTACKUP);
138 New=BuildMI(Alpha::LDA, 2, Alpha::R30)
139 .addImm(Amount).addReg(Alpha::R30);
142 // Replace the pseudo instruction with a new instruction...
150 //Alpha has a slightly funny stack:
153 //fixed locals (and spills, callee saved, etc)
159 AlphaRegisterInfo::eliminateFrameIndex(MachineBasicBlock::iterator II) const {
161 MachineInstr &MI = *II;
162 MachineBasicBlock &MBB = *MI.getParent();
163 MachineFunction &MF = *MBB.getParent();
166 while (!MI.getOperand(i).isFrameIndex()) {
168 assert(i < MI.getNumOperands() && "Instr doesn't have FrameIndex operand!");
171 int FrameIndex = MI.getOperand(i).getFrameIndex();
173 // Add the base register of R30 (SP) or R15 (FP).
174 MI.SetMachineOperandReg(i + 1, FP ? Alpha::R15 : Alpha::R30);
176 // Now add the frame object offset to the offset from the virtual frame index.
177 int Offset = MF.getFrameInfo()->getObjectOffset(FrameIndex);
179 DEBUG(std::cerr << "FI: " << FrameIndex << " Offset: " << Offset << "\n");
181 Offset += MF.getFrameInfo()->getStackSize();
183 DEBUG(std::cerr << "Corrected Offset " << Offset <<
184 " for stack size: " << MF.getFrameInfo()->getStackSize() << "\n");
186 if (Offset > 32767 || Offset < -32768) {
187 //so in this case, we need to use a temporary register, and move the original
190 MI.SetMachineOperandReg(i + 1, Alpha::R28);
191 MI.SetMachineOperandConst(i, MachineOperand::MO_SignExtendedImmed,
194 MachineInstr* nMI=BuildMI(Alpha::LDAH, 2, Alpha::R28)
195 .addImm(getUpper16(Offset)).addReg(FP ? Alpha::R15 : Alpha::R30);
196 MBB.insert(--II, nMI);
198 MI.SetMachineOperandConst(i, MachineOperand::MO_SignExtendedImmed, Offset);
203 void AlphaRegisterInfo::emitPrologue(MachineFunction &MF) const {
204 MachineBasicBlock &MBB = MF.front(); // Prolog goes in entry BB
205 MachineBasicBlock::iterator MBBI = MBB.begin();
206 MachineFrameInfo *MFI = MF.getFrameInfo();
211 MI = BuildMI(Alpha::LDGP, 0);
212 MBB.insert(MBBI, MI);
214 // Get the number of bytes to allocate from the FrameInfo
215 unsigned NumBytes = MFI->getStackSize();
217 if (MFI->hasCalls() && !FP) {
218 // We reserve argument space for call sites in the function immediately on
219 // entry to the current function. This eliminates the need for add/sub
220 // brackets around call sites.
221 //If there is a frame pointer, then we don't do this
222 NumBytes += MFI->getMaxCallFrameSize();
223 std::cerr << "Added " << MFI->getMaxCallFrameSize() << " to the stack due to calls\n";
227 NumBytes += 8; //reserve space for the old FP
229 // Do we need to allocate space on the stack?
230 if (NumBytes == 0) return;
232 // Update frame info to pretend that this is part of the stack...
233 MFI->setStackSize(NumBytes);
235 // adjust stack pointer: r30 -= numbytes
236 if (NumBytes <= 32767) {
237 MI=BuildMI(Alpha::LDA, 2, Alpha::R30).addImm(-NumBytes).addReg(Alpha::R30);
238 MBB.insert(MBBI, MI);
239 } else if ((unsigned long)NumBytes <= (unsigned long)32767 * (unsigned long)65536) {
240 MI=BuildMI(Alpha::LDAH, 2, Alpha::R30).addImm(getUpper16(-NumBytes)).addReg(Alpha::R30);
241 MBB.insert(MBBI, MI);
242 MI=BuildMI(Alpha::LDA, 2, Alpha::R30).addImm(getLower16(-NumBytes)).addReg(Alpha::R30);
243 MBB.insert(MBBI, MI);
245 std::cerr << "Too big a stack frame at " << NumBytes << "\n";
249 //now if we need to, save the old FP and set the new
252 MI=BuildMI(Alpha::STQ, 3).addReg(Alpha::R15).addImm(0).addReg(Alpha::R30);
253 MBB.insert(MBBI, MI);
254 //this must be the last instr in the prolog
255 MI=BuildMI(Alpha::BIS, 2, Alpha::R15).addReg(Alpha::R30).addReg(Alpha::R30);
256 MBB.insert(MBBI, MI);
261 void AlphaRegisterInfo::emitEpilogue(MachineFunction &MF,
262 MachineBasicBlock &MBB) const {
263 const MachineFrameInfo *MFI = MF.getFrameInfo();
264 MachineBasicBlock::iterator MBBI = prior(MBB.end());
266 assert((MBBI->getOpcode() == Alpha::RET || MBBI->getOpcode() == Alpha::RETURN) &&
267 "Can only insert epilog into returning blocks");
271 // Get the number of bytes allocated from the FrameInfo...
272 unsigned NumBytes = MFI->getStackSize();
274 //now if we need to, restore the old FP
277 MI=BuildMI(Alpha::LDQ, 2, Alpha::R15).addImm(0).addReg(Alpha::R15);
278 MBB.insert(MBBI, MI);
283 if (NumBytes <= 32767) {
284 MI=BuildMI(Alpha::LDA, 2, Alpha::R30).addImm(NumBytes).addReg(Alpha::R30);
285 MBB.insert(MBBI, MI);
286 } else if ((unsigned long)NumBytes <= (unsigned long)32767 * (unsigned long)65536) {
287 MI=BuildMI(Alpha::LDAH, 2, Alpha::R30).addImm(getUpper16(NumBytes)).addReg(Alpha::R30);
288 MBB.insert(MBBI, MI);
289 MI=BuildMI(Alpha::LDA, 2, Alpha::R30).addImm(getLower16(NumBytes)).addReg(Alpha::R30);
290 MBB.insert(MBBI, MI);
292 std::cerr << "Too big a stack frame at " << NumBytes << "\n";
298 #include "AlphaGenRegisterInfo.inc"
300 const TargetRegisterClass*
301 AlphaRegisterInfo::getRegClassForType(const Type* Ty) const {
302 switch (Ty->getTypeID()) {
303 default: assert(0 && "Invalid type to getClass!");
305 case Type::SByteTyID:
306 case Type::UByteTyID:
307 case Type::ShortTyID:
308 case Type::UShortTyID:
311 case Type::PointerTyID:
313 case Type::ULongTyID: return &GPRCInstance;
315 case Type::FloatTyID:
316 case Type::DoubleTyID: return &FPRCInstance;
320 std::string AlphaRegisterInfo::getPrettyName(unsigned reg)
322 std::string s(RegisterDescriptors[reg].Name);