1 //===- AlphaRegisterInfo.cpp - Alpha Register Information -------*- C++ -*-===//
3 // The LLVM Compiler Infrastructure
5 // This file was developed by the LLVM research group and is distributed under
6 // the University of Illinois Open Source License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file contains the Alpha implementation of the MRegisterInfo class.
12 //===----------------------------------------------------------------------===//
14 #define DEBUG_TYPE "reginfo"
16 #include "AlphaRegisterInfo.h"
17 #include "llvm/Constants.h"
18 #include "llvm/Type.h"
19 #include "llvm/Function.h"
20 #include "llvm/CodeGen/ValueTypes.h"
21 #include "llvm/CodeGen/MachineInstrBuilder.h"
22 #include "llvm/CodeGen/MachineFunction.h"
23 #include "llvm/CodeGen/MachineFrameInfo.h"
24 #include "llvm/Target/TargetFrameInfo.h"
25 #include "llvm/Target/TargetMachine.h"
26 #include "llvm/Target/TargetOptions.h"
27 #include "llvm/Support/CommandLine.h"
28 #include "llvm/Support/Debug.h"
29 #include "llvm/ADT/STLExtras.h"
35 extern cl::opt<bool> EnableAlphaLSMark;
39 static const int IMM_LOW = -32768;
40 static const int IMM_HIGH = 32767;
41 static const int IMM_MULT = 65536;
43 static long getUpper16(long l)
45 long y = l / IMM_MULT;
46 if (l % IMM_MULT > IMM_HIGH)
51 static long getLower16(long l)
53 long h = getUpper16(l);
54 return l - h * IMM_MULT;
63 AlphaRegisterInfo::AlphaRegisterInfo()
64 : AlphaGenRegisterInfo(Alpha::ADJUSTSTACKDOWN, Alpha::ADJUSTSTACKUP)
68 static const TargetRegisterClass *getClass(unsigned SrcReg) {
69 if (Alpha::FPRCRegisterClass->contains(SrcReg))
70 return Alpha::FPRCRegisterClass;
71 assert(Alpha::GPRCRegisterClass->contains(SrcReg) && "Reg not FPR or GPR");
72 return Alpha::GPRCRegisterClass;
76 AlphaRegisterInfo::storeRegToStackSlot(MachineBasicBlock &MBB,
77 MachineBasicBlock::iterator MI,
78 unsigned SrcReg, int FrameIdx) const {
79 //std::cerr << "Trying to store " << getPrettyName(SrcReg) << " to " << FrameIdx << "\n";
80 //BuildMI(MBB, MI, Alpha::WTF, 0).addReg(SrcReg);
81 if (EnableAlphaLSMark)
82 BuildMI(MBB, MI, Alpha::MEMLABEL, 4).addImm(4).addImm(0).addImm(1)
84 if (getClass(SrcReg) == Alpha::FPRCRegisterClass)
85 BuildMI(MBB, MI, Alpha::STT, 3).addReg(SrcReg).addFrameIndex(FrameIdx).addReg(Alpha::F31);
86 else if (getClass(SrcReg) == Alpha::GPRCRegisterClass)
87 BuildMI(MBB, MI, Alpha::STQ, 3).addReg(SrcReg).addFrameIndex(FrameIdx).addReg(Alpha::F31);
93 AlphaRegisterInfo::loadRegFromStackSlot(MachineBasicBlock &MBB,
94 MachineBasicBlock::iterator MI,
95 unsigned DestReg, int FrameIdx) const{
96 //std::cerr << "Trying to load " << getPrettyName(DestReg) << " to " << FrameIdx << "\n";
97 if (EnableAlphaLSMark)
98 BuildMI(MBB, MI, Alpha::MEMLABEL, 4).addImm(4).addImm(0).addImm(2)
100 if (getClass(DestReg) == Alpha::FPRCRegisterClass)
101 BuildMI(MBB, MI, Alpha::LDT, 2, DestReg).addFrameIndex(FrameIdx).addReg(Alpha::F31);
102 else if (getClass(DestReg) == Alpha::GPRCRegisterClass)
103 BuildMI(MBB, MI, Alpha::LDQ, 2, DestReg).addFrameIndex(FrameIdx).addReg(Alpha::F31);
108 void AlphaRegisterInfo::copyRegToReg(MachineBasicBlock &MBB,
109 MachineBasicBlock::iterator MI,
110 unsigned DestReg, unsigned SrcReg,
111 const TargetRegisterClass *RC) const {
112 // std::cerr << "copyRegToReg " << DestReg << " <- " << SrcReg << "\n";
113 if (RC == Alpha::GPRCRegisterClass) {
114 BuildMI(MBB, MI, Alpha::BIS, 2, DestReg).addReg(SrcReg).addReg(SrcReg);
115 } else if (RC == Alpha::FPRCRegisterClass) {
116 BuildMI(MBB, MI, Alpha::CPYS, 2, DestReg).addReg(SrcReg).addReg(SrcReg);
118 std::cerr << "Attempt to copy register that is not GPR or FPR";
123 //===----------------------------------------------------------------------===//
124 // Stack Frame Processing methods
125 //===----------------------------------------------------------------------===//
127 // hasFP - Return true if the specified function should have a dedicated frame
128 // pointer register. This is true if the function has variable sized allocas or
129 // if frame pointer elimination is disabled.
131 static bool hasFP(MachineFunction &MF) {
132 MachineFrameInfo *MFI = MF.getFrameInfo();
133 return MFI->hasVarSizedObjects();
136 void AlphaRegisterInfo::
137 eliminateCallFramePseudoInstr(MachineFunction &MF, MachineBasicBlock &MBB,
138 MachineBasicBlock::iterator I) const {
140 // If we have a frame pointer, turn the adjcallstackup instruction into a
141 // 'sub ESP, <amt>' and the adjcallstackdown instruction into 'add ESP,
143 MachineInstr *Old = I;
144 unsigned Amount = Old->getOperand(0).getImmedValue();
146 // We need to keep the stack aligned properly. To do this, we round the
147 // amount of space needed for the outgoing arguments up to the next
148 // alignment boundary.
149 unsigned Align = MF.getTarget().getFrameInfo()->getStackAlignment();
150 Amount = (Amount+Align-1)/Align*Align;
153 if (Old->getOpcode() == Alpha::ADJUSTSTACKDOWN) {
154 New=BuildMI(Alpha::LDA, 2, Alpha::R30)
155 .addImm(-Amount).addReg(Alpha::R30);
157 assert(Old->getOpcode() == Alpha::ADJUSTSTACKUP);
158 New=BuildMI(Alpha::LDA, 2, Alpha::R30)
159 .addImm(Amount).addReg(Alpha::R30);
162 // Replace the pseudo instruction with a new instruction...
170 //Alpha has a slightly funny stack:
173 //fixed locals (and spills, callee saved, etc)
179 AlphaRegisterInfo::eliminateFrameIndex(MachineBasicBlock::iterator II) const {
181 MachineInstr &MI = *II;
182 MachineBasicBlock &MBB = *MI.getParent();
183 MachineFunction &MF = *MBB.getParent();
186 while (!MI.getOperand(i).isFrameIndex()) {
188 assert(i < MI.getNumOperands() && "Instr doesn't have FrameIndex operand!");
191 int FrameIndex = MI.getOperand(i).getFrameIndex();
193 // Add the base register of R30 (SP) or R15 (FP).
194 MI.SetMachineOperandReg(i + 1, FP ? Alpha::R15 : Alpha::R30);
196 // Now add the frame object offset to the offset from the virtual frame index.
197 int Offset = MF.getFrameInfo()->getObjectOffset(FrameIndex);
199 DEBUG(std::cerr << "FI: " << FrameIndex << " Offset: " << Offset << "\n");
201 Offset += MF.getFrameInfo()->getStackSize();
203 DEBUG(std::cerr << "Corrected Offset " << Offset <<
204 " for stack size: " << MF.getFrameInfo()->getStackSize() << "\n");
206 if (Offset > IMM_HIGH || Offset < IMM_LOW) {
207 //so in this case, we need to use a temporary register, and move the original
210 MI.SetMachineOperandReg(i + 1, Alpha::R28);
211 MI.SetMachineOperandConst(i, MachineOperand::MO_SignExtendedImmed,
214 MachineInstr* nMI=BuildMI(Alpha::LDAH, 2, Alpha::R28)
215 .addImm(getUpper16(Offset)).addReg(FP ? Alpha::R15 : Alpha::R30);
218 MI.SetMachineOperandConst(i, MachineOperand::MO_SignExtendedImmed, Offset);
223 void AlphaRegisterInfo::emitPrologue(MachineFunction &MF) const {
224 MachineBasicBlock &MBB = MF.front(); // Prolog goes in entry BB
225 MachineBasicBlock::iterator MBBI = MBB.begin();
226 MachineFrameInfo *MFI = MF.getFrameInfo();
229 static int curgpdist = 0;
232 BuildMI(MBB, MBBI, Alpha::LDAHg, 3, Alpha::R29)
233 .addGlobalAddress(const_cast<Function*>(MF.getFunction()))
234 .addReg(Alpha::R27).addImm(++curgpdist);
235 BuildMI(MBB, MBBI, Alpha::LDAg, 3, Alpha::R29)
236 .addGlobalAddress(const_cast<Function*>(MF.getFunction()))
237 .addReg(Alpha::R29).addImm(curgpdist);
239 //evil const_cast until MO stuff setup to handle const
240 BuildMI(MBB, MBBI, Alpha::ALTENT, 1).addGlobalAddress(const_cast<Function*>(MF.getFunction()), true);
242 // Get the number of bytes to allocate from the FrameInfo
243 long NumBytes = MFI->getStackSize();
245 if (MFI->hasCalls() && !FP) {
246 // We reserve argument space for call sites in the function immediately on
247 // entry to the current function. This eliminates the need for add/sub
248 // brackets around call sites.
249 //If there is a frame pointer, then we don't do this
250 NumBytes += MFI->getMaxCallFrameSize();
251 DEBUG(std::cerr << "Added " << MFI->getMaxCallFrameSize()
252 << " to the stack due to calls\n");
256 NumBytes += 8; //reserve space for the old FP
258 // Do we need to allocate space on the stack?
259 if (NumBytes == 0) return;
261 // Update frame info to pretend that this is part of the stack...
262 MFI->setStackSize(NumBytes);
264 // adjust stack pointer: r30 -= numbytes
265 NumBytes = -NumBytes;
266 if (NumBytes >= IMM_LOW) {
267 BuildMI(MBB, MBBI, Alpha::LDA, 2, Alpha::R30).addImm(NumBytes)
269 } else if (getUpper16(NumBytes) >= IMM_LOW) {
270 BuildMI(MBB, MBBI, Alpha::LDAH, 2, Alpha::R30).addImm(getUpper16(NumBytes))
272 BuildMI(MBB, MBBI, Alpha::LDA, 2, Alpha::R30).addImm(getLower16(NumBytes))
275 std::cerr << "Too big a stack frame at " << NumBytes << "\n";
279 //now if we need to, save the old FP and set the new
282 if (EnableAlphaLSMark)
283 BuildMI(MBB, MBBI, Alpha::MEMLABEL, 4).addImm(4).addImm(0).addImm(1)
285 BuildMI(MBB, MBBI, Alpha::STQ, 3).addReg(Alpha::R15).addImm(0).addReg(Alpha::R30);
286 //this must be the last instr in the prolog
287 BuildMI(MBB, MBBI, Alpha::BIS, 2, Alpha::R15).addReg(Alpha::R30).addReg(Alpha::R30);
292 void AlphaRegisterInfo::emitEpilogue(MachineFunction &MF,
293 MachineBasicBlock &MBB) const {
294 const MachineFrameInfo *MFI = MF.getFrameInfo();
295 MachineBasicBlock::iterator MBBI = prior(MBB.end());
296 assert((MBBI->getOpcode() == Alpha::RET)
297 && "Can only insert epilog into returning blocks");
301 // Get the number of bytes allocated from the FrameInfo...
302 long NumBytes = MFI->getStackSize();
304 //now if we need to, restore the old FP
307 //copy the FP into the SP (discards allocas)
308 BuildMI(MBB, MBBI, Alpha::BIS, 2, Alpha::R30).addReg(Alpha::R15)
311 if (EnableAlphaLSMark)
312 BuildMI(MBB, MBBI, Alpha::MEMLABEL, 4).addImm(4).addImm(0).addImm(2)
314 BuildMI(MBB, MBBI, Alpha::LDQ, 2, Alpha::R15).addImm(0).addReg(Alpha::R15);
319 if (NumBytes <= IMM_HIGH) {
320 BuildMI(MBB, MBBI, Alpha::LDA, 2, Alpha::R30).addImm(NumBytes)
322 } else if (getUpper16(NumBytes) <= IMM_HIGH) {
323 BuildMI(MBB, MBBI, Alpha::LDAH, 2, Alpha::R30)
324 .addImm(getUpper16(NumBytes)).addReg(Alpha::R30);
325 BuildMI(MBB, MBBI, Alpha::LDA, 2, Alpha::R30)
326 .addImm(getLower16(NumBytes)).addReg(Alpha::R30);
328 std::cerr << "Too big a stack frame at " << NumBytes << "\n";
334 #include "AlphaGenRegisterInfo.inc"
336 const TargetRegisterClass*
337 AlphaRegisterInfo::getRegClassForType(const Type* Ty) const {
338 switch (Ty->getTypeID()) {
339 default: assert(0 && "Invalid type to getClass!");
341 case Type::SByteTyID:
342 case Type::UByteTyID:
343 case Type::ShortTyID:
344 case Type::UShortTyID:
347 case Type::PointerTyID:
349 case Type::ULongTyID: return &GPRCInstance;
351 case Type::FloatTyID:
352 case Type::DoubleTyID: return &FPRCInstance;
356 std::string AlphaRegisterInfo::getPrettyName(unsigned reg)
358 std::string s(RegisterDescriptors[reg].Name);