1 //===- AlphaRegisterInfo.cpp - Alpha Register Information -------*- C++ -*-===//
3 // The LLVM Compiler Infrastructure
5 // This file was developed by the LLVM research group and is distributed under
6 // the University of Illinois Open Source License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file contains the Alpha implementation of the MRegisterInfo class.
12 //===----------------------------------------------------------------------===//
14 #define DEBUG_TYPE "reginfo"
16 #include "AlphaRegisterInfo.h"
17 #include "llvm/Constants.h"
18 #include "llvm/Type.h"
19 #include "llvm/Function.h"
20 #include "llvm/CodeGen/ValueTypes.h"
21 #include "llvm/CodeGen/MachineInstrBuilder.h"
22 #include "llvm/CodeGen/MachineFunction.h"
23 #include "llvm/CodeGen/MachineFrameInfo.h"
24 #include "llvm/Target/TargetFrameInfo.h"
25 #include "llvm/Target/TargetMachine.h"
26 #include "llvm/Target/TargetOptions.h"
27 #include "llvm/Support/CommandLine.h"
28 #include "llvm/Support/Debug.h"
29 #include "llvm/ADT/STLExtras.h"
35 extern cl::opt<bool> EnableAlphaLSMark;
39 static const int IMM_LOW = -32768;
40 static const int IMM_HIGH = 32767;
41 static const int IMM_MULT = 65536;
43 static long getUpper16(long l)
45 long y = l / IMM_MULT;
46 if (l % IMM_MULT > IMM_HIGH)
51 static long getLower16(long l)
53 long h = getUpper16(l);
54 return l - h * IMM_MULT;
63 AlphaRegisterInfo::AlphaRegisterInfo()
64 : AlphaGenRegisterInfo(Alpha::ADJUSTSTACKDOWN, Alpha::ADJUSTSTACKUP)
69 AlphaRegisterInfo::storeRegToStackSlot(MachineBasicBlock &MBB,
70 MachineBasicBlock::iterator MI,
71 unsigned SrcReg, int FrameIdx,
72 const TargetRegisterClass *RC) const {
73 //std::cerr << "Trying to store " << getPrettyName(SrcReg) << " to " << FrameIdx << "\n";
74 //BuildMI(MBB, MI, Alpha::WTF, 0).addReg(SrcReg);
75 if (EnableAlphaLSMark)
76 BuildMI(MBB, MI, Alpha::MEMLABEL, 4).addImm(4).addImm(0).addImm(1)
78 if (RC == Alpha::F4RCRegisterClass)
79 BuildMI(MBB, MI, Alpha::STS, 3).addReg(SrcReg).addFrameIndex(FrameIdx).addReg(Alpha::F31);
80 else if (RC == Alpha::F8RCRegisterClass)
81 BuildMI(MBB, MI, Alpha::STT, 3).addReg(SrcReg).addFrameIndex(FrameIdx).addReg(Alpha::F31);
82 else if (RC == Alpha::GPRCRegisterClass)
83 BuildMI(MBB, MI, Alpha::STQ, 3).addReg(SrcReg).addFrameIndex(FrameIdx).addReg(Alpha::F31);
89 AlphaRegisterInfo::loadRegFromStackSlot(MachineBasicBlock &MBB,
90 MachineBasicBlock::iterator MI,
91 unsigned DestReg, int FrameIdx,
92 const TargetRegisterClass *RC) const {
93 //std::cerr << "Trying to load " << getPrettyName(DestReg) << " to " << FrameIdx << "\n";
94 if (EnableAlphaLSMark)
95 BuildMI(MBB, MI, Alpha::MEMLABEL, 4).addImm(4).addImm(0).addImm(2)
97 if (RC == Alpha::F4RCRegisterClass)
98 BuildMI(MBB, MI, Alpha::LDS, 2, DestReg).addFrameIndex(FrameIdx).addReg(Alpha::F31);
99 else if (RC == Alpha::F8RCRegisterClass)
100 BuildMI(MBB, MI, Alpha::LDT, 2, DestReg).addFrameIndex(FrameIdx).addReg(Alpha::F31);
101 else if (RC == Alpha::GPRCRegisterClass)
102 BuildMI(MBB, MI, Alpha::LDQ, 2, DestReg).addFrameIndex(FrameIdx).addReg(Alpha::F31);
108 AlphaRegisterInfo::isLoadFromStackSlot(MachineInstr *MI, int &FrameIndex) const
110 switch (MI->getOpcode()) {
117 if (MI->getOperand(1).isFrameIndex()) {
118 FrameIndex = MI->getOperand(1).getFrameIndex();
119 return MI->getOperand(0).getReg();
126 MachineInstr *AlphaRegisterInfo::foldMemoryOperand(MachineInstr *MI,
128 int FrameIndex) const {
129 // Make sure this is a reg-reg copy.
130 unsigned Opc = MI->getOpcode();
138 if (MI->getOperand(1).getReg() == MI->getOperand(2).getReg()) {
139 if (OpNum == 0) { // move -> store
140 unsigned InReg = MI->getOperand(1).getReg();
141 Opc = (Opc == Alpha::BIS) ? Alpha::STQ :
142 ((Opc == Alpha::CPYSS) ? Alpha::STS : Alpha::STT);
143 return BuildMI(Opc, 3).addReg(InReg).addFrameIndex(FrameIndex)
145 } else { // load -> move
146 unsigned OutReg = MI->getOperand(0).getReg();
147 Opc = (Opc == Alpha::BIS) ? Alpha::LDQ :
148 ((Opc == Alpha::CPYSS) ? Alpha::LDS : Alpha::LDT);
149 return BuildMI(Opc, 2, OutReg).addFrameIndex(FrameIndex)
159 void AlphaRegisterInfo::copyRegToReg(MachineBasicBlock &MBB,
160 MachineBasicBlock::iterator MI,
161 unsigned DestReg, unsigned SrcReg,
162 const TargetRegisterClass *RC) const {
163 // std::cerr << "copyRegToReg " << DestReg << " <- " << SrcReg << "\n";
164 if (RC == Alpha::GPRCRegisterClass) {
165 BuildMI(MBB, MI, Alpha::BIS, 2, DestReg).addReg(SrcReg).addReg(SrcReg);
166 } else if (RC == Alpha::F4RCRegisterClass) {
167 BuildMI(MBB, MI, Alpha::CPYSS, 2, DestReg).addReg(SrcReg).addReg(SrcReg);
168 } else if (RC == Alpha::F8RCRegisterClass) {
169 BuildMI(MBB, MI, Alpha::CPYST, 2, DestReg).addReg(SrcReg).addReg(SrcReg);
171 std::cerr << "Attempt to copy register that is not GPR or FPR";
176 //===----------------------------------------------------------------------===//
177 // Stack Frame Processing methods
178 //===----------------------------------------------------------------------===//
180 // hasFP - Return true if the specified function should have a dedicated frame
181 // pointer register. This is true if the function has variable sized allocas or
182 // if frame pointer elimination is disabled.
184 static bool hasFP(MachineFunction &MF) {
185 MachineFrameInfo *MFI = MF.getFrameInfo();
186 return MFI->hasVarSizedObjects();
189 void AlphaRegisterInfo::
190 eliminateCallFramePseudoInstr(MachineFunction &MF, MachineBasicBlock &MBB,
191 MachineBasicBlock::iterator I) const {
193 // If we have a frame pointer, turn the adjcallstackup instruction into a
194 // 'sub ESP, <amt>' and the adjcallstackdown instruction into 'add ESP,
196 MachineInstr *Old = I;
197 unsigned Amount = Old->getOperand(0).getImmedValue();
199 // We need to keep the stack aligned properly. To do this, we round the
200 // amount of space needed for the outgoing arguments up to the next
201 // alignment boundary.
202 unsigned Align = MF.getTarget().getFrameInfo()->getStackAlignment();
203 Amount = (Amount+Align-1)/Align*Align;
206 if (Old->getOpcode() == Alpha::ADJUSTSTACKDOWN) {
207 New=BuildMI(Alpha::LDA, 2, Alpha::R30)
208 .addImm(-Amount).addReg(Alpha::R30);
210 assert(Old->getOpcode() == Alpha::ADJUSTSTACKUP);
211 New=BuildMI(Alpha::LDA, 2, Alpha::R30)
212 .addImm(Amount).addReg(Alpha::R30);
215 // Replace the pseudo instruction with a new instruction...
223 //Alpha has a slightly funny stack:
226 //fixed locals (and spills, callee saved, etc)
232 AlphaRegisterInfo::eliminateFrameIndex(MachineBasicBlock::iterator II) const {
234 MachineInstr &MI = *II;
235 MachineBasicBlock &MBB = *MI.getParent();
236 MachineFunction &MF = *MBB.getParent();
239 while (!MI.getOperand(i).isFrameIndex()) {
241 assert(i < MI.getNumOperands() && "Instr doesn't have FrameIndex operand!");
244 int FrameIndex = MI.getOperand(i).getFrameIndex();
246 // Add the base register of R30 (SP) or R15 (FP).
247 MI.SetMachineOperandReg(i + 1, FP ? Alpha::R15 : Alpha::R30);
249 // Now add the frame object offset to the offset from the virtual frame index.
250 int Offset = MF.getFrameInfo()->getObjectOffset(FrameIndex);
252 DEBUG(std::cerr << "FI: " << FrameIndex << " Offset: " << Offset << "\n");
254 Offset += MF.getFrameInfo()->getStackSize();
256 DEBUG(std::cerr << "Corrected Offset " << Offset <<
257 " for stack size: " << MF.getFrameInfo()->getStackSize() << "\n");
259 if (Offset > IMM_HIGH || Offset < IMM_LOW) {
260 std::cerr << "Unconditionally using R28 for evil purposes\n";
261 //so in this case, we need to use a temporary register, and move the original
264 MI.SetMachineOperandReg(i + 1, Alpha::R28);
265 MI.SetMachineOperandConst(i, MachineOperand::MO_SignExtendedImmed,
268 MachineInstr* nMI=BuildMI(Alpha::LDAH, 2, Alpha::R28)
269 .addImm(getUpper16(Offset)).addReg(FP ? Alpha::R15 : Alpha::R30);
272 MI.SetMachineOperandConst(i, MachineOperand::MO_SignExtendedImmed, Offset);
277 void AlphaRegisterInfo::emitPrologue(MachineFunction &MF) const {
278 MachineBasicBlock &MBB = MF.front(); // Prolog goes in entry BB
279 MachineBasicBlock::iterator MBBI = MBB.begin();
280 MachineFrameInfo *MFI = MF.getFrameInfo();
283 static int curgpdist = 0;
286 BuildMI(MBB, MBBI, Alpha::LDAHg, 3, Alpha::R29)
287 .addGlobalAddress(const_cast<Function*>(MF.getFunction()))
288 .addReg(Alpha::R27).addImm(++curgpdist);
289 BuildMI(MBB, MBBI, Alpha::LDAg, 3, Alpha::R29)
290 .addGlobalAddress(const_cast<Function*>(MF.getFunction()))
291 .addReg(Alpha::R29).addImm(curgpdist);
293 //evil const_cast until MO stuff setup to handle const
294 BuildMI(MBB, MBBI, Alpha::ALTENT, 1).addGlobalAddress(const_cast<Function*>(MF.getFunction()), true);
296 // Get the number of bytes to allocate from the FrameInfo
297 long NumBytes = MFI->getStackSize();
299 if (MFI->hasCalls() && !FP) {
300 // We reserve argument space for call sites in the function immediately on
301 // entry to the current function. This eliminates the need for add/sub
302 // brackets around call sites.
303 //If there is a frame pointer, then we don't do this
304 NumBytes += MFI->getMaxCallFrameSize();
305 DEBUG(std::cerr << "Added " << MFI->getMaxCallFrameSize()
306 << " to the stack due to calls\n");
310 NumBytes += 8; //reserve space for the old FP
312 // Do we need to allocate space on the stack?
313 if (NumBytes == 0) return;
315 unsigned Align = MF.getTarget().getFrameInfo()->getStackAlignment();
316 NumBytes = (NumBytes+Align-1)/Align*Align;
318 // Update frame info to pretend that this is part of the stack...
319 MFI->setStackSize(NumBytes);
321 // adjust stack pointer: r30 -= numbytes
322 NumBytes = -NumBytes;
323 if (NumBytes >= IMM_LOW) {
324 BuildMI(MBB, MBBI, Alpha::LDA, 2, Alpha::R30).addImm(NumBytes)
326 } else if (getUpper16(NumBytes) >= IMM_LOW) {
327 BuildMI(MBB, MBBI, Alpha::LDAH, 2, Alpha::R30).addImm(getUpper16(NumBytes))
329 BuildMI(MBB, MBBI, Alpha::LDA, 2, Alpha::R30).addImm(getLower16(NumBytes))
332 std::cerr << "Too big a stack frame at " << NumBytes << "\n";
336 //now if we need to, save the old FP and set the new
339 if (EnableAlphaLSMark)
340 BuildMI(MBB, MBBI, Alpha::MEMLABEL, 4).addImm(4).addImm(0).addImm(1)
342 BuildMI(MBB, MBBI, Alpha::STQ, 3).addReg(Alpha::R15).addImm(0).addReg(Alpha::R30);
343 //this must be the last instr in the prolog
344 BuildMI(MBB, MBBI, Alpha::BIS, 2, Alpha::R15).addReg(Alpha::R30).addReg(Alpha::R30);
349 void AlphaRegisterInfo::emitEpilogue(MachineFunction &MF,
350 MachineBasicBlock &MBB) const {
351 const MachineFrameInfo *MFI = MF.getFrameInfo();
352 MachineBasicBlock::iterator MBBI = prior(MBB.end());
353 assert(((MBBI->getOpcode() == Alpha::RET) || (MBBI->getOpcode() == Alpha::RETDAG))
354 && "Can only insert epilog into returning blocks");
358 // Get the number of bytes allocated from the FrameInfo...
359 long NumBytes = MFI->getStackSize();
361 //now if we need to, restore the old FP
364 //copy the FP into the SP (discards allocas)
365 BuildMI(MBB, MBBI, Alpha::BIS, 2, Alpha::R30).addReg(Alpha::R15)
368 if (EnableAlphaLSMark)
369 BuildMI(MBB, MBBI, Alpha::MEMLABEL, 4).addImm(4).addImm(0).addImm(2)
371 BuildMI(MBB, MBBI, Alpha::LDQ, 2, Alpha::R15).addImm(0).addReg(Alpha::R15);
376 if (NumBytes <= IMM_HIGH) {
377 BuildMI(MBB, MBBI, Alpha::LDA, 2, Alpha::R30).addImm(NumBytes)
379 } else if (getUpper16(NumBytes) <= IMM_HIGH) {
380 BuildMI(MBB, MBBI, Alpha::LDAH, 2, Alpha::R30)
381 .addImm(getUpper16(NumBytes)).addReg(Alpha::R30);
382 BuildMI(MBB, MBBI, Alpha::LDA, 2, Alpha::R30)
383 .addImm(getLower16(NumBytes)).addReg(Alpha::R30);
385 std::cerr << "Too big a stack frame at " << NumBytes << "\n";
391 #include "AlphaGenRegisterInfo.inc"
393 std::string AlphaRegisterInfo::getPrettyName(unsigned reg)
395 std::string s(RegisterDescriptors[reg].Name);