1 //===- AlphaRegisterInfo.cpp - Alpha Register Information -------*- C++ -*-===//
3 // The LLVM Compiler Infrastructure
5 // This file was developed by the LLVM research group and is distributed under
6 // the University of Illinois Open Source License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file contains the Alpha implementation of the MRegisterInfo class.
12 //===----------------------------------------------------------------------===//
14 #define DEBUG_TYPE "reginfo"
16 #include "AlphaRegisterInfo.h"
17 #include "llvm/Constants.h"
18 #include "llvm/Type.h"
19 #include "llvm/Function.h"
20 #include "llvm/CodeGen/ValueTypes.h"
21 #include "llvm/CodeGen/MachineInstrBuilder.h"
22 #include "llvm/CodeGen/MachineFunction.h"
23 #include "llvm/CodeGen/MachineFrameInfo.h"
24 #include "llvm/Target/TargetFrameInfo.h"
25 #include "llvm/Target/TargetMachine.h"
26 #include "llvm/Target/TargetOptions.h"
27 #include "llvm/Support/CommandLine.h"
28 #include "llvm/Support/Debug.h"
29 #include "llvm/ADT/STLExtras.h"
35 static const int IMM_LOW = -32768;
36 static const int IMM_HIGH = 32767;
37 static const int IMM_MULT = 65536;
39 static long getUpper16(long l)
41 long y = l / IMM_MULT;
42 if (l % IMM_MULT > IMM_HIGH)
47 static long getLower16(long l)
49 long h = getUpper16(l);
50 return l - h * IMM_MULT;
59 AlphaRegisterInfo::AlphaRegisterInfo()
60 : AlphaGenRegisterInfo(Alpha::ADJUSTSTACKDOWN, Alpha::ADJUSTSTACKUP)
65 AlphaRegisterInfo::storeRegToStackSlot(MachineBasicBlock &MBB,
66 MachineBasicBlock::iterator MI,
67 unsigned SrcReg, int FrameIdx,
68 const TargetRegisterClass *RC) const {
69 //std::cerr << "Trying to store " << getPrettyName(SrcReg) << " to " << FrameIdx << "\n";
70 //BuildMI(MBB, MI, Alpha::WTF, 0).addReg(SrcReg);
71 if (RC == Alpha::F4RCRegisterClass)
72 BuildMI(MBB, MI, Alpha::STS, 3).addReg(SrcReg).addFrameIndex(FrameIdx).addReg(Alpha::F31);
73 else if (RC == Alpha::F8RCRegisterClass)
74 BuildMI(MBB, MI, Alpha::STT, 3).addReg(SrcReg).addFrameIndex(FrameIdx).addReg(Alpha::F31);
75 else if (RC == Alpha::GPRCRegisterClass)
76 BuildMI(MBB, MI, Alpha::STQ, 3).addReg(SrcReg).addFrameIndex(FrameIdx).addReg(Alpha::F31);
82 AlphaRegisterInfo::loadRegFromStackSlot(MachineBasicBlock &MBB,
83 MachineBasicBlock::iterator MI,
84 unsigned DestReg, int FrameIdx,
85 const TargetRegisterClass *RC) const {
86 //std::cerr << "Trying to load " << getPrettyName(DestReg) << " to " << FrameIdx << "\n";
87 if (RC == Alpha::F4RCRegisterClass)
88 BuildMI(MBB, MI, Alpha::LDS, 2, DestReg).addFrameIndex(FrameIdx).addReg(Alpha::F31);
89 else if (RC == Alpha::F8RCRegisterClass)
90 BuildMI(MBB, MI, Alpha::LDT, 2, DestReg).addFrameIndex(FrameIdx).addReg(Alpha::F31);
91 else if (RC == Alpha::GPRCRegisterClass)
92 BuildMI(MBB, MI, Alpha::LDQ, 2, DestReg).addFrameIndex(FrameIdx).addReg(Alpha::F31);
97 MachineInstr *AlphaRegisterInfo::foldMemoryOperand(MachineInstr *MI,
99 int FrameIndex) const {
100 // Make sure this is a reg-reg copy.
101 unsigned Opc = MI->getOpcode();
109 if (MI->getOperand(1).getReg() == MI->getOperand(2).getReg()) {
110 if (OpNum == 0) { // move -> store
111 unsigned InReg = MI->getOperand(1).getReg();
112 Opc = (Opc == Alpha::BIS) ? Alpha::STQ :
113 ((Opc == Alpha::CPYSS) ? Alpha::STS : Alpha::STT);
114 return BuildMI(Opc, 3).addReg(InReg).addFrameIndex(FrameIndex)
116 } else { // load -> move
117 unsigned OutReg = MI->getOperand(0).getReg();
118 Opc = (Opc == Alpha::BIS) ? Alpha::LDQ :
119 ((Opc == Alpha::CPYSS) ? Alpha::LDS : Alpha::LDT);
120 return BuildMI(Opc, 2, OutReg).addFrameIndex(FrameIndex)
130 void AlphaRegisterInfo::copyRegToReg(MachineBasicBlock &MBB,
131 MachineBasicBlock::iterator MI,
132 unsigned DestReg, unsigned SrcReg,
133 const TargetRegisterClass *RC) const {
134 // std::cerr << "copyRegToReg " << DestReg << " <- " << SrcReg << "\n";
135 if (RC == Alpha::GPRCRegisterClass) {
136 BuildMI(MBB, MI, Alpha::BIS, 2, DestReg).addReg(SrcReg).addReg(SrcReg);
137 } else if (RC == Alpha::F4RCRegisterClass) {
138 BuildMI(MBB, MI, Alpha::CPYSS, 2, DestReg).addReg(SrcReg).addReg(SrcReg);
139 } else if (RC == Alpha::F8RCRegisterClass) {
140 BuildMI(MBB, MI, Alpha::CPYST, 2, DestReg).addReg(SrcReg).addReg(SrcReg);
142 std::cerr << "Attempt to copy register that is not GPR or FPR";
147 //===----------------------------------------------------------------------===//
148 // Stack Frame Processing methods
149 //===----------------------------------------------------------------------===//
151 // hasFP - Return true if the specified function should have a dedicated frame
152 // pointer register. This is true if the function has variable sized allocas or
153 // if frame pointer elimination is disabled.
155 static bool hasFP(MachineFunction &MF) {
156 MachineFrameInfo *MFI = MF.getFrameInfo();
157 return MFI->hasVarSizedObjects();
160 void AlphaRegisterInfo::
161 eliminateCallFramePseudoInstr(MachineFunction &MF, MachineBasicBlock &MBB,
162 MachineBasicBlock::iterator I) const {
164 // If we have a frame pointer, turn the adjcallstackup instruction into a
165 // 'sub ESP, <amt>' and the adjcallstackdown instruction into 'add ESP,
167 MachineInstr *Old = I;
168 unsigned Amount = Old->getOperand(0).getImmedValue();
170 // We need to keep the stack aligned properly. To do this, we round the
171 // amount of space needed for the outgoing arguments up to the next
172 // alignment boundary.
173 unsigned Align = MF.getTarget().getFrameInfo()->getStackAlignment();
174 Amount = (Amount+Align-1)/Align*Align;
177 if (Old->getOpcode() == Alpha::ADJUSTSTACKDOWN) {
178 New=BuildMI(Alpha::LDA, 2, Alpha::R30)
179 .addImm(-Amount).addReg(Alpha::R30);
181 assert(Old->getOpcode() == Alpha::ADJUSTSTACKUP);
182 New=BuildMI(Alpha::LDA, 2, Alpha::R30)
183 .addImm(Amount).addReg(Alpha::R30);
186 // Replace the pseudo instruction with a new instruction...
194 //Alpha has a slightly funny stack:
197 //fixed locals (and spills, callee saved, etc)
203 AlphaRegisterInfo::eliminateFrameIndex(MachineBasicBlock::iterator II) const {
205 MachineInstr &MI = *II;
206 MachineBasicBlock &MBB = *MI.getParent();
207 MachineFunction &MF = *MBB.getParent();
210 while (!MI.getOperand(i).isFrameIndex()) {
212 assert(i < MI.getNumOperands() && "Instr doesn't have FrameIndex operand!");
215 int FrameIndex = MI.getOperand(i).getFrameIndex();
217 // Add the base register of R30 (SP) or R15 (FP).
218 MI.SetMachineOperandReg(i + 1, FP ? Alpha::R15 : Alpha::R30);
220 // Now add the frame object offset to the offset from the virtual frame index.
221 int Offset = MF.getFrameInfo()->getObjectOffset(FrameIndex);
223 DEBUG(std::cerr << "FI: " << FrameIndex << " Offset: " << Offset << "\n");
225 Offset += MF.getFrameInfo()->getStackSize();
227 DEBUG(std::cerr << "Corrected Offset " << Offset <<
228 " for stack size: " << MF.getFrameInfo()->getStackSize() << "\n");
230 if (Offset > IMM_HIGH || Offset < IMM_LOW) {
231 DEBUG(std::cerr << "Unconditionally using R28 for evil purposes Offset: " << Offset << "\n");
232 //so in this case, we need to use a temporary register, and move the original
235 MI.SetMachineOperandReg(i + 1, Alpha::R28);
236 MI.SetMachineOperandConst(i, MachineOperand::MO_SignExtendedImmed,
239 MachineInstr* nMI=BuildMI(Alpha::LDAH, 2, Alpha::R28)
240 .addImm(getUpper16(Offset)).addReg(FP ? Alpha::R15 : Alpha::R30);
243 MI.SetMachineOperandConst(i, MachineOperand::MO_SignExtendedImmed, Offset);
248 void AlphaRegisterInfo::emitPrologue(MachineFunction &MF) const {
249 MachineBasicBlock &MBB = MF.front(); // Prolog goes in entry BB
250 MachineBasicBlock::iterator MBBI = MBB.begin();
251 MachineFrameInfo *MFI = MF.getFrameInfo();
254 static int curgpdist = 0;
257 BuildMI(MBB, MBBI, Alpha::LDAHg, 3, Alpha::R29)
258 .addGlobalAddress(const_cast<Function*>(MF.getFunction()))
259 .addReg(Alpha::R27).addImm(++curgpdist);
260 BuildMI(MBB, MBBI, Alpha::LDAg, 3, Alpha::R29)
261 .addGlobalAddress(const_cast<Function*>(MF.getFunction()))
262 .addReg(Alpha::R29).addImm(curgpdist);
264 //evil const_cast until MO stuff setup to handle const
265 BuildMI(MBB, MBBI, Alpha::ALTENT, 1).addGlobalAddress(const_cast<Function*>(MF.getFunction()), true);
267 // Get the number of bytes to allocate from the FrameInfo
268 long NumBytes = MFI->getStackSize();
270 if (MFI->hasCalls() && !FP) {
271 // We reserve argument space for call sites in the function immediately on
272 // entry to the current function. This eliminates the need for add/sub
273 // brackets around call sites.
274 //If there is a frame pointer, then we don't do this
275 NumBytes += MFI->getMaxCallFrameSize();
276 DEBUG(std::cerr << "Added " << MFI->getMaxCallFrameSize()
277 << " to the stack due to calls\n");
281 NumBytes += 8; //reserve space for the old FP
283 // Do we need to allocate space on the stack?
284 if (NumBytes == 0) return;
286 unsigned Align = MF.getTarget().getFrameInfo()->getStackAlignment();
287 NumBytes = (NumBytes+Align-1)/Align*Align;
289 // Update frame info to pretend that this is part of the stack...
290 MFI->setStackSize(NumBytes);
292 // adjust stack pointer: r30 -= numbytes
293 NumBytes = -NumBytes;
294 if (NumBytes >= IMM_LOW) {
295 BuildMI(MBB, MBBI, Alpha::LDA, 2, Alpha::R30).addImm(NumBytes)
297 } else if (getUpper16(NumBytes) >= IMM_LOW) {
298 BuildMI(MBB, MBBI, Alpha::LDAH, 2, Alpha::R30).addImm(getUpper16(NumBytes))
300 BuildMI(MBB, MBBI, Alpha::LDA, 2, Alpha::R30).addImm(getLower16(NumBytes))
303 std::cerr << "Too big a stack frame at " << NumBytes << "\n";
307 //now if we need to, save the old FP and set the new
310 BuildMI(MBB, MBBI, Alpha::STQ, 3).addReg(Alpha::R15).addImm(0).addReg(Alpha::R30);
311 //this must be the last instr in the prolog
312 BuildMI(MBB, MBBI, Alpha::BIS, 2, Alpha::R15).addReg(Alpha::R30).addReg(Alpha::R30);
317 void AlphaRegisterInfo::emitEpilogue(MachineFunction &MF,
318 MachineBasicBlock &MBB) const {
319 const MachineFrameInfo *MFI = MF.getFrameInfo();
320 MachineBasicBlock::iterator MBBI = prior(MBB.end());
321 assert(MBBI->getOpcode() == Alpha::RETDAG
322 && "Can only insert epilog into returning blocks");
326 // Get the number of bytes allocated from the FrameInfo...
327 long NumBytes = MFI->getStackSize();
329 //now if we need to, restore the old FP
332 //copy the FP into the SP (discards allocas)
333 BuildMI(MBB, MBBI, Alpha::BIS, 2, Alpha::R30).addReg(Alpha::R15)
336 BuildMI(MBB, MBBI, Alpha::LDQ, 2, Alpha::R15).addImm(0).addReg(Alpha::R15);
341 if (NumBytes <= IMM_HIGH) {
342 BuildMI(MBB, MBBI, Alpha::LDA, 2, Alpha::R30).addImm(NumBytes)
344 } else if (getUpper16(NumBytes) <= IMM_HIGH) {
345 BuildMI(MBB, MBBI, Alpha::LDAH, 2, Alpha::R30)
346 .addImm(getUpper16(NumBytes)).addReg(Alpha::R30);
347 BuildMI(MBB, MBBI, Alpha::LDA, 2, Alpha::R30)
348 .addImm(getLower16(NumBytes)).addReg(Alpha::R30);
350 std::cerr << "Too big a stack frame at " << NumBytes << "\n";
356 #include "AlphaGenRegisterInfo.inc"
358 std::string AlphaRegisterInfo::getPrettyName(unsigned reg)
360 std::string s(RegisterDescriptors[reg].Name);