1 //===- AlphaRegisterInfo.cpp - Alpha Register Information -------*- C++ -*-===//
3 // The LLVM Compiler Infrastructure
5 // This file was developed by the LLVM research group and is distributed under
6 // the University of Illinois Open Source License. See LICENSE.TXT for details.
8 //===----------------------------------------------------------------------===//
10 // This file contains the Alpha implementation of the MRegisterInfo class.
12 //===----------------------------------------------------------------------===//
14 #define DEBUG_TYPE "reginfo"
16 #include "AlphaRegisterInfo.h"
17 #include "llvm/Constants.h"
18 #include "llvm/Type.h"
19 #include "llvm/Function.h"
20 #include "llvm/CodeGen/ValueTypes.h"
21 #include "llvm/CodeGen/MachineInstrBuilder.h"
22 #include "llvm/CodeGen/MachineFunction.h"
23 #include "llvm/CodeGen/MachineFrameInfo.h"
24 #include "llvm/CodeGen/MachineLocation.h"
25 #include "llvm/Target/TargetFrameInfo.h"
26 #include "llvm/Target/TargetMachine.h"
27 #include "llvm/Target/TargetOptions.h"
28 #include "llvm/Support/CommandLine.h"
29 #include "llvm/Support/Debug.h"
30 #include "llvm/ADT/STLExtras.h"
36 static const int IMM_LOW = -32768;
37 static const int IMM_HIGH = 32767;
38 static const int IMM_MULT = 65536;
40 static long getUpper16(long l)
42 long y = l / IMM_MULT;
43 if (l % IMM_MULT > IMM_HIGH)
48 static long getLower16(long l)
50 long h = getUpper16(l);
51 return l - h * IMM_MULT;
60 AlphaRegisterInfo::AlphaRegisterInfo()
61 : AlphaGenRegisterInfo(Alpha::ADJUSTSTACKDOWN, Alpha::ADJUSTSTACKUP)
66 AlphaRegisterInfo::storeRegToStackSlot(MachineBasicBlock &MBB,
67 MachineBasicBlock::iterator MI,
68 unsigned SrcReg, int FrameIdx,
69 const TargetRegisterClass *RC) const {
70 //std::cerr << "Trying to store " << getPrettyName(SrcReg) << " to " << FrameIdx << "\n";
71 //BuildMI(MBB, MI, Alpha::WTF, 0).addReg(SrcReg);
72 if (RC == Alpha::F4RCRegisterClass)
73 BuildMI(MBB, MI, Alpha::STS, 3).addReg(SrcReg).addFrameIndex(FrameIdx).addReg(Alpha::F31);
74 else if (RC == Alpha::F8RCRegisterClass)
75 BuildMI(MBB, MI, Alpha::STT, 3).addReg(SrcReg).addFrameIndex(FrameIdx).addReg(Alpha::F31);
76 else if (RC == Alpha::GPRCRegisterClass)
77 BuildMI(MBB, MI, Alpha::STQ, 3).addReg(SrcReg).addFrameIndex(FrameIdx).addReg(Alpha::F31);
83 AlphaRegisterInfo::loadRegFromStackSlot(MachineBasicBlock &MBB,
84 MachineBasicBlock::iterator MI,
85 unsigned DestReg, int FrameIdx,
86 const TargetRegisterClass *RC) const {
87 //std::cerr << "Trying to load " << getPrettyName(DestReg) << " to " << FrameIdx << "\n";
88 if (RC == Alpha::F4RCRegisterClass)
89 BuildMI(MBB, MI, Alpha::LDS, 2, DestReg).addFrameIndex(FrameIdx).addReg(Alpha::F31);
90 else if (RC == Alpha::F8RCRegisterClass)
91 BuildMI(MBB, MI, Alpha::LDT, 2, DestReg).addFrameIndex(FrameIdx).addReg(Alpha::F31);
92 else if (RC == Alpha::GPRCRegisterClass)
93 BuildMI(MBB, MI, Alpha::LDQ, 2, DestReg).addFrameIndex(FrameIdx).addReg(Alpha::F31);
98 MachineInstr *AlphaRegisterInfo::foldMemoryOperand(MachineInstr *MI,
100 int FrameIndex) const {
101 // Make sure this is a reg-reg copy.
102 unsigned Opc = MI->getOpcode();
110 if (MI->getOperand(1).getReg() == MI->getOperand(2).getReg()) {
111 if (OpNum == 0) { // move -> store
112 unsigned InReg = MI->getOperand(1).getReg();
113 Opc = (Opc == Alpha::BIS) ? Alpha::STQ :
114 ((Opc == Alpha::CPYSS) ? Alpha::STS : Alpha::STT);
115 return BuildMI(Opc, 3).addReg(InReg).addFrameIndex(FrameIndex)
117 } else { // load -> move
118 unsigned OutReg = MI->getOperand(0).getReg();
119 Opc = (Opc == Alpha::BIS) ? Alpha::LDQ :
120 ((Opc == Alpha::CPYSS) ? Alpha::LDS : Alpha::LDT);
121 return BuildMI(Opc, 2, OutReg).addFrameIndex(FrameIndex)
131 void AlphaRegisterInfo::copyRegToReg(MachineBasicBlock &MBB,
132 MachineBasicBlock::iterator MI,
133 unsigned DestReg, unsigned SrcReg,
134 const TargetRegisterClass *RC) const {
135 // std::cerr << "copyRegToReg " << DestReg << " <- " << SrcReg << "\n";
136 if (RC == Alpha::GPRCRegisterClass) {
137 BuildMI(MBB, MI, Alpha::BIS, 2, DestReg).addReg(SrcReg).addReg(SrcReg);
138 } else if (RC == Alpha::F4RCRegisterClass) {
139 BuildMI(MBB, MI, Alpha::CPYSS, 2, DestReg).addReg(SrcReg).addReg(SrcReg);
140 } else if (RC == Alpha::F8RCRegisterClass) {
141 BuildMI(MBB, MI, Alpha::CPYST, 2, DestReg).addReg(SrcReg).addReg(SrcReg);
143 std::cerr << "Attempt to copy register that is not GPR or FPR";
148 const unsigned* AlphaRegisterInfo::getCalleeSaveRegs() const {
149 static const unsigned CalleeSaveRegs[] = {
150 Alpha::R9, Alpha::R10,
151 Alpha::R11, Alpha::R12,
152 Alpha::R13, Alpha::R14,
153 Alpha::F2, Alpha::F3,
154 Alpha::F4, Alpha::F5,
155 Alpha::F6, Alpha::F7,
156 Alpha::F8, Alpha::F9, 0
158 return CalleeSaveRegs;
161 const TargetRegisterClass* const*
162 AlphaRegisterInfo::getCalleeSaveRegClasses() const {
163 static const TargetRegisterClass * const CalleeSaveRegClasses[] = {
164 &Alpha::GPRCRegClass, &Alpha::GPRCRegClass,
165 &Alpha::GPRCRegClass, &Alpha::GPRCRegClass,
166 &Alpha::GPRCRegClass, &Alpha::GPRCRegClass,
167 &Alpha::F8RCRegClass, &Alpha::F8RCRegClass,
168 &Alpha::F8RCRegClass, &Alpha::F8RCRegClass,
169 &Alpha::F8RCRegClass, &Alpha::F8RCRegClass,
170 &Alpha::F8RCRegClass, &Alpha::F8RCRegClass, 0
172 return CalleeSaveRegClasses;
175 //===----------------------------------------------------------------------===//
176 // Stack Frame Processing methods
177 //===----------------------------------------------------------------------===//
179 // hasFP - Return true if the specified function should have a dedicated frame
180 // pointer register. This is true if the function has variable sized allocas or
181 // if frame pointer elimination is disabled.
183 static bool hasFP(MachineFunction &MF) {
184 MachineFrameInfo *MFI = MF.getFrameInfo();
185 return MFI->hasVarSizedObjects();
188 void AlphaRegisterInfo::
189 eliminateCallFramePseudoInstr(MachineFunction &MF, MachineBasicBlock &MBB,
190 MachineBasicBlock::iterator I) const {
192 // If we have a frame pointer, turn the adjcallstackup instruction into a
193 // 'sub ESP, <amt>' and the adjcallstackdown instruction into 'add ESP,
195 MachineInstr *Old = I;
196 uint64_t Amount = Old->getOperand(0).getImmedValue();
198 // We need to keep the stack aligned properly. To do this, we round the
199 // amount of space needed for the outgoing arguments up to the next
200 // alignment boundary.
201 unsigned Align = MF.getTarget().getFrameInfo()->getStackAlignment();
202 Amount = (Amount+Align-1)/Align*Align;
205 if (Old->getOpcode() == Alpha::ADJUSTSTACKDOWN) {
206 New=BuildMI(Alpha::LDA, 2, Alpha::R30)
207 .addImm(-Amount).addReg(Alpha::R30);
209 assert(Old->getOpcode() == Alpha::ADJUSTSTACKUP);
210 New=BuildMI(Alpha::LDA, 2, Alpha::R30)
211 .addImm(Amount).addReg(Alpha::R30);
214 // Replace the pseudo instruction with a new instruction...
222 //Alpha has a slightly funny stack:
225 //fixed locals (and spills, callee saved, etc)
231 AlphaRegisterInfo::eliminateFrameIndex(MachineBasicBlock::iterator II) const {
233 MachineInstr &MI = *II;
234 MachineBasicBlock &MBB = *MI.getParent();
235 MachineFunction &MF = *MBB.getParent();
238 while (!MI.getOperand(i).isFrameIndex()) {
240 assert(i < MI.getNumOperands() && "Instr doesn't have FrameIndex operand!");
243 int FrameIndex = MI.getOperand(i).getFrameIndex();
245 // Add the base register of R30 (SP) or R15 (FP).
246 MI.getOperand(i + 1).ChangeToRegister(FP ? Alpha::R15 : Alpha::R30);
248 // Now add the frame object offset to the offset from the virtual frame index.
249 int Offset = MF.getFrameInfo()->getObjectOffset(FrameIndex);
251 DEBUG(std::cerr << "FI: " << FrameIndex << " Offset: " << Offset << "\n");
253 Offset += MF.getFrameInfo()->getStackSize();
255 DEBUG(std::cerr << "Corrected Offset " << Offset <<
256 " for stack size: " << MF.getFrameInfo()->getStackSize() << "\n");
258 if (Offset > IMM_HIGH || Offset < IMM_LOW) {
259 DEBUG(std::cerr << "Unconditionally using R28 for evil purposes Offset: " << Offset << "\n");
260 //so in this case, we need to use a temporary register, and move the original
263 MI.getOperand(i + 1).ChangeToRegister(Alpha::R28);
264 MI.getOperand(i).ChangeToImmediate(getLower16(Offset));
266 MachineInstr* nMI=BuildMI(Alpha::LDAH, 2, Alpha::R28)
267 .addImm(getUpper16(Offset)).addReg(FP ? Alpha::R15 : Alpha::R30);
270 MI.getOperand(i).ChangeToImmediate(Offset);
275 void AlphaRegisterInfo::emitPrologue(MachineFunction &MF) const {
276 MachineBasicBlock &MBB = MF.front(); // Prolog goes in entry BB
277 MachineBasicBlock::iterator MBBI = MBB.begin();
278 MachineFrameInfo *MFI = MF.getFrameInfo();
281 static int curgpdist = 0;
284 BuildMI(MBB, MBBI, Alpha::LDAHg, 3, Alpha::R29)
285 .addGlobalAddress(const_cast<Function*>(MF.getFunction()))
286 .addReg(Alpha::R27).addImm(++curgpdist);
287 BuildMI(MBB, MBBI, Alpha::LDAg, 3, Alpha::R29)
288 .addGlobalAddress(const_cast<Function*>(MF.getFunction()))
289 .addReg(Alpha::R29).addImm(curgpdist);
291 //evil const_cast until MO stuff setup to handle const
292 BuildMI(MBB, MBBI, Alpha::ALTENT, 1)
293 .addGlobalAddress(const_cast<Function*>(MF.getFunction()));
295 // Get the number of bytes to allocate from the FrameInfo
296 long NumBytes = MFI->getStackSize();
298 if (MFI->hasCalls() && !FP) {
299 // We reserve argument space for call sites in the function immediately on
300 // entry to the current function. This eliminates the need for add/sub
301 // brackets around call sites.
302 //If there is a frame pointer, then we don't do this
303 NumBytes += MFI->getMaxCallFrameSize();
304 DEBUG(std::cerr << "Added " << MFI->getMaxCallFrameSize()
305 << " to the stack due to calls\n");
309 NumBytes += 8; //reserve space for the old FP
311 // Do we need to allocate space on the stack?
312 if (NumBytes == 0) return;
314 unsigned Align = MF.getTarget().getFrameInfo()->getStackAlignment();
315 NumBytes = (NumBytes+Align-1)/Align*Align;
317 // Update frame info to pretend that this is part of the stack...
318 MFI->setStackSize(NumBytes);
320 // adjust stack pointer: r30 -= numbytes
321 NumBytes = -NumBytes;
322 if (NumBytes >= IMM_LOW) {
323 BuildMI(MBB, MBBI, Alpha::LDA, 2, Alpha::R30).addImm(NumBytes)
325 } else if (getUpper16(NumBytes) >= IMM_LOW) {
326 BuildMI(MBB, MBBI, Alpha::LDAH, 2, Alpha::R30).addImm(getUpper16(NumBytes))
328 BuildMI(MBB, MBBI, Alpha::LDA, 2, Alpha::R30).addImm(getLower16(NumBytes))
331 std::cerr << "Too big a stack frame at " << NumBytes << "\n";
335 //now if we need to, save the old FP and set the new
338 BuildMI(MBB, MBBI, Alpha::STQ, 3).addReg(Alpha::R15).addImm(0).addReg(Alpha::R30);
339 //this must be the last instr in the prolog
340 BuildMI(MBB, MBBI, Alpha::BIS, 2, Alpha::R15).addReg(Alpha::R30).addReg(Alpha::R30);
345 void AlphaRegisterInfo::emitEpilogue(MachineFunction &MF,
346 MachineBasicBlock &MBB) const {
347 const MachineFrameInfo *MFI = MF.getFrameInfo();
348 MachineBasicBlock::iterator MBBI = prior(MBB.end());
349 assert(MBBI->getOpcode() == Alpha::RETDAG || MBBI->getOpcode() == Alpha::RETDAGp
350 && "Can only insert epilog into returning blocks");
354 // Get the number of bytes allocated from the FrameInfo...
355 long NumBytes = MFI->getStackSize();
357 //now if we need to, restore the old FP
360 //copy the FP into the SP (discards allocas)
361 BuildMI(MBB, MBBI, Alpha::BIS, 2, Alpha::R30).addReg(Alpha::R15)
364 BuildMI(MBB, MBBI, Alpha::LDQ, 2, Alpha::R15).addImm(0).addReg(Alpha::R15);
369 if (NumBytes <= IMM_HIGH) {
370 BuildMI(MBB, MBBI, Alpha::LDA, 2, Alpha::R30).addImm(NumBytes)
372 } else if (getUpper16(NumBytes) <= IMM_HIGH) {
373 BuildMI(MBB, MBBI, Alpha::LDAH, 2, Alpha::R30)
374 .addImm(getUpper16(NumBytes)).addReg(Alpha::R30);
375 BuildMI(MBB, MBBI, Alpha::LDA, 2, Alpha::R30)
376 .addImm(getLower16(NumBytes)).addReg(Alpha::R30);
378 std::cerr << "Too big a stack frame at " << NumBytes << "\n";
384 unsigned AlphaRegisterInfo::getRARegister() const {
385 assert(0 && "What is the return address register");
389 unsigned AlphaRegisterInfo::getFrameRegister(MachineFunction &MF) const {
390 return hasFP(MF) ? Alpha::R15 : Alpha::R30;
393 #include "AlphaGenRegisterInfo.inc"
395 std::string AlphaRegisterInfo::getPrettyName(unsigned reg)
397 std::string s(RegisterDescriptors[reg].Name);